wolfBoot/config/examples/zynq7000_sdcard.config

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ARCH?=ARM
TARGET?=zynq7000
SIGN?=ECC256
HASH?=SHA256
# Cortex-A9 Zynq-7000 SD-card boot variant. Uses the generic SDHCI driver
# (src/sdhci.c) with HAL hooks in hal/zynq7000.c that translate between the
# driver's Cadence SD4HC register layout and the Arasan SDHCI v2.0 standard
# layout used by the Zynq-7000 controller (same IP family as ZynqMP's v3.0,
# just an older revision; the translation is reused from hal/zynq.c).
#
# wolfBoot replaces U-Boot in the Z7 boot flow (BootROM -> FSBL -> wolfBoot
# -> kernel/app, no U-Boot stage). This single config supports both
# bare-metal and Linux payloads from SD card -- see the MMU/ELF block below.
DEBUG?=0
DEBUG_UART?=1
V?=0
SPMATH?=1
# SD card boot - swaps update_ram.o for update_disk.o + GPT/disk support.
DISK_SDCARD=1
NO_XIP=1
# One config for both bare-metal and Linux payloads. do_boot in
# src/boot_arm32.c always emits the ARM Linux boot ABI (r0=0, r1=~0,
# r2=DTB_phys, r3=0) when MMU=1; bare-metal apps simply ignore r0..r3,
# so a single register-handoff covers both payload types.
# MMU=1 -> pulls in src/fdt.o for FDT-aware paths in update_disk.c.
# wolfBoot does NOT manage page tables; it inherits FSBL's
# flat 1:1 DDR mapping.
# ELF=1 -> wolfBoot understands ELF inputs (e.g. vmlinux) and loads
# only their LOAD segments. Flat binaries (zImage, bare-metal
# .bin) fall through to raw-binary boot.
# For Linux from SD use tools/scripts/zynq7000/prepare_linux.sh APPENDED=1
# (DTB concatenated to zImage and signed as one image). update_disk.c does
# not read a separate PART_DTS_BOOT partition; the appended-DTB path is
# what carries the device tree to the kernel via CONFIG_ARM_APPENDED_DTB.
MMU=1
ELF=1
# Stage payload at low DDR (clear of wolfBoot at 0x04000000-0x040FFFFF).
WOLFBOOT_LOAD_ADDRESS=0x10000000
# Cap on the RAM load region. The disk image payload is copied to
# WOLFBOOT_LOAD_ADDRESS before its header is authenticated, so the on-disk
# fw_size must be bounded first (see src/update_disk.c). This is an example
# config not tied to a real board, so the cap is just a sane sanity bound:
# 700 MB is far larger than any realistic FIT image yet keeps the load well
# clear of a 32-bit wrap back onto wolfBoot at 0x04000000. Size it to your
# board's DDR (top_of_DDR - WOLFBOOT_LOAD_ADDRESS) for a real target.
WOLFBOOT_RAMBOOT_MAX_SIZE=0x2BC00000
# DTB load address (Linux only, used by update_disk.c when a FIT image
# carries a DTB). Ignored for bare-metal and for the appended-DTB Linux
# flow. 16 MB clear of WOLFBOOT_LOAD_ADDRESS.
WOLFBOOT_LOAD_DTS_ADDRESS=0x11000000
# MBR partition layout on the SD card. Pure MBR (no GPT) - the Zynq-7000
# BootROM (UG821 ch.6.3) only accepts MBR with the first partition as
# FAT32 and the Active flag set. wolfBoot's src/disk.c falls back to MBR
# parsing when no protective-GPT entry is present.
# MBR p1 (wolfBoot idx 0): FAT32-LBA Active - holds BOOT.BIN for BootROM.
# MBR p2 (wolfBoot idx 1): Linux raw (0x83) - signed boot image.
# MBR p3 (wolfBoot idx 2): Linux raw (0x83) - signed update image.
# tools/scripts/zynq7000/prepare_sdcard.sh lays this out; BOOT_PART_A/B tell
# update_disk.c which MBR entries (0-indexed) to use for boot/update.
CFLAGS_EXTRA+=-DBOOT_PART_A=1 -DBOOT_PART_B=2
# Arasan SDHCI v2.0 on Zynq-7000 is 3.3V-only, no UHS-I. The generic
# driver tries to push the card to UHS-I SDR25 / 50 MHz / High Speed mode
# which is invalid for our v2.0 + 3.3V combo and causes DTOE on the first
# data transfer (MBR read). Cap the post-init clock at SD default-speed
# 25 MHz; the HSE bit is also masked in hal/zynq7000.c sdhci_reg_write so
# the controller stays in single-edge timing the card matches.
# Cap the post-init SDHCI clock at 6 MHz. The Arasan SDHCI v2.0 on
# Zynq-7000 has a clock-dependent state-cleanup issue: at 12 MHz multi-
# block reads (CMD18) work, but a single-block read (CMD17) issued
# immediately after a CMD18+CMD12 sequence times out (DTOE) on the first
# data block. At 24 MHz even the very first CMD17 fails. 6 MHz / 4-bit
# bus is plenty fast for boot-time loading (~3 MB/s) and is well below
# the v2.0 quirk threshold; raise this if a future fix in src/sdhci.c
# adds an explicit DAT-line reset between transfers.
CFLAGS_EXTRA+=-DSDHCI_CLK_50MHZ=6000 -DSDHCI_CLK_25MHZ=6000
# update_disk.c reads images in DISK_BLOCK_SIZE chunks. Default 512 B = one
# disk_read = one CMD17 per 512 B, which makes a multi-MB Linux load issue
# thousands of CMDs and stall the card with per-CMD overhead. Bump to
# 512 KB so each disk_read pulls 1024 blocks via one CMD18 SDMA (matches
# ZynqMP). Verified on ZC702 with a 4.76 MB appended-DTB zImage: 9 CMD18s
# complete in well under a second. The default 4 KB SDMA buffer boundary
# is left in place -- overriding it to 512 KB stalled SDMA on Arasan v2.0.
CFLAGS_EXTRA+=-DDISK_BLOCK_SIZE=0x80000
# Uncomment for verbose SDHCI driver logging when bringing up new boards
# or debugging timing issues.
#CFLAGS_EXTRA+=-DDEBUG_SDHCI
# Image-header partition addresses are unused for disk boot (kept for the
# Makefile sanity checks). update_disk.c finds images by GPT entry, not by
# memory address.
WOLFBOOT_PARTITION_BOOT_ADDRESS=0x00100000
WOLFBOOT_PARTITION_UPDATE_ADDRESS=0x00700000
WOLFBOOT_PARTITION_SWAP_ADDRESS=0x00D00000
WOLFBOOT_PARTITION_SIZE=0x00600000
# Sector size of WOLFBOOT_PARTITION (not the SD physical sector, which is
# always 512 B). Used as the smallest erase/copy unit for the BOOT/UPDATE
# partitions; must be > IMAGE_HEADER_SIZE.
WOLFBOOT_SECTOR_SIZE=0x1000
IMAGE_HEADER_SIZE=1024
# Required by image.c when MMU=1 is set, even though update_disk.c never
# opens PART_DTS_BOOT/PART_DTS_UPDATE on this target (the disk boot path
# selects images by partition index -- BOOT_PART_A / BOOT_PART_B above --
# not by memory-mapped address, and the DTB travels with the kernel via
# appended-DTB or FIT). src/disk.c parses either GPT or MBR (it falls
# back to MBR when there is no protective-GPT entry), so the layout
# choice is orthogonal to this knob. Set to dummy addresses to satisfy
# the build.
WOLFBOOT_DTS_BOOT_ADDRESS=0x0
WOLFBOOT_DTS_UPDATE_ADDRESS=0x0
CROSS_COMPILE=arm-none-eabi-