mirror of https://github.com/wolfSSL/wolfBoot.git
191 lines
6.2 KiB
C
191 lines
6.2 KiB
C
/* wolfBoot test application for iMX-RT1060-EVK
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*
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* Copyright (C) 2021 wolfSSL Inc.
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*
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* wolfSSL is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfSSL is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include "target.h"
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#include "wolfboot/wolfboot.h"
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#include <stdint.h>
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#include "fsl_common.h"
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#include "fsl_clock.h"
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#include "fsl_debug_console.h"
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#include "fsl_gpio.h"
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#include "fsl_iomuxc.h"
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static int g_pinSet = false;
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extern void imx_rt_init_boot_clock(void);
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#ifndef USER_LED_GPIO
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#define USER_LED_GPIO GPIO1
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#endif
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#ifndef USER_LED_PIN
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#define USER_LED_PIN 9U
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#endif
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/* Get debug console frequency. */
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static uint32_t debug_console_get_freq(void)
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{
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uint32_t freq;
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/* To make it simple, we assume default PLL and divider settings, and the
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* only variable from application is use PLL3 source or OSC source */
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if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { /* PLL3 div6 80M */
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freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) /
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(CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
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}
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else {
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freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
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}
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return freq;
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}
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/* Initialize debug console. */
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#define UART_TYPE kSerialPort_Uart
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#define UART_BASEADDR LPUART1_BASE
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#define UART_INSTANCE 1U
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#define UART_BAUDRATE (115200U)
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void init_debug_console(void)
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{
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uint32_t uartClkSrcFreq = debug_console_get_freq();
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DbgConsole_Init(UART_INSTANCE, UART_BAUDRATE, UART_TYPE, uartClkSrcFreq);
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}
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#if defined(CPU_MIMXRT1064DVL6A) || \
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defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1062DVL6B)
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/* Pin settings (same for both 1062 and 1064) */
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void rt1060_init_pins(void)
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{
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gpio_pin_config_t USER_LED_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_NoIntmode
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};
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
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GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
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IOMUXC_SetPinMux( /* GPIO_AD_B0_10 is configured as ARM_TRACE_SWO */
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IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0U);
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IOMUXC_SetPinMux( /* GPIO_AD_B0_12 is configured as LPUART1_TX */
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
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IOMUXC_SetPinMux( /* GPIO_AD_B0_13 is configured as LPUART1_RX */
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x10B0U);
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IOMUXC_SetPinConfig( /* GPIO_AD_B0_10 PAD functional properties : */
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IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0x90B1U);
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IOMUXC_SetPinConfig( /* GPIO_AD_B0_12 PAD functional properties : */
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
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IOMUXC_SetPinConfig( /* GPIO_AD_B0_13 PAD functional properties : */
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
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}
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#endif
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#ifdef CPU_MIMXRT1052DVJ6B
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void rt1050_init_pins(void)
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{
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gpio_pin_config_t USER_LED_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_NoIntmode
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};
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0x10B0U);
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}
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#endif
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#ifdef CPU_MIMXRT1042XJM5B
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void rt1040_init_pins(void)
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{
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gpio_pin_config_t USER_LED_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_NoIntmode
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};
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0x10B0U);
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}
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#endif
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void main(void)
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{
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imx_rt_init_boot_clock();
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#if defined(CPU_MIMXRT1064DVL6A) || \
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defined(CPU_MIMXRT1062DVL6A) || defined(MIMXRT1062DVL6B)
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rt1060_init_pins();
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#elif defined(CPU_MIMXRT1052DVJ6B)
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rt1050_init_pins();
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#elif defined(CPU_MIMXRT1042XJM5B)
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rt1040_init_pins();
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#endif
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SystemCoreClockUpdate();
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init_debug_console();
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PRINTF("wolfBoot Test app, version = %d\r\n",
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wolfBoot_current_firmware_version());
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if (wolfBoot_current_firmware_version() == 1) {
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wolfBoot_update_trigger();
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} else {
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wolfBoot_success();
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}
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while (1) {
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/* 100ms delay */
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SDK_DelayAtLeastUs(100 * 1000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
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/* toggle user LED */
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if (g_pinSet) {
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GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 0U);
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g_pinSet = false;
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}
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else {
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GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 1U);
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g_pinSet = true;
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}
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}
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}
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