mirror of https://github.com/wolfSSL/wolfBoot.git
108 lines
2.9 KiB
C
108 lines
2.9 KiB
C
/* app_stm32u5.c
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*
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* Test bare-metal application.
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*
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* Copyright (C) 2021 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "system.h"
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#include "hal.h"
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#include "wolfboot/wolfboot.h"
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#include "target.h"
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#define LED_BOOT_PIN (7) /* PH7 - Discovery - Green Led */
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#define LED_USR_PIN (6) /* PH6 - Discovery - Red Led */
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/*Non-Secure */
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#define RCC_BASE (0x46020C00) /* RM0456 - Table 4 */
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#define PWR_BASE (0x46020800) /* RM0456 - Table 4 */
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#define GPIOH_BASE 0x42021C00
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#define GPIOH_MODER (*(volatile uint32_t *)(GPIOH_BASE + 0x00))
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#define GPIOH_PUPDR (*(volatile uint32_t *)(GPIOH_BASE + 0x0C))
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#define GPIOH_BSRR (*(volatile uint32_t *)(GPIOH_BASE + 0x18))
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#define RCC_AHB2ENR1_CLOCK_ER (*(volatile uint32_t *)(RCC_BASE + 0x8C ))
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#define GPIOH_AHB2ENR1_CLOCK_ER (1 << 7)
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#define PWR_CR2 (*(volatile uint32_t *)(PWR_BASE + 0x04))
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#define PWR_CR2_IOSV (1 << 9)
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static void boot_led_on(void)
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{
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uint32_t reg;
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uint32_t pin = LED_BOOT_PIN;
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RCC_AHB2ENR1_CLOCK_ER|= GPIOH_AHB2ENR1_CLOCK_ER;
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/* Delay after an RCC peripheral clock enabling */
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reg = RCC_AHB2ENR1_CLOCK_ER;
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#if 0
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/* Disabled, may not need it */
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PWR_CR2 |= PWR_CR2_IOSV;
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#endif
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reg = GPIOH_MODER & ~(0x03 << (pin * 2));
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GPIOH_MODER = reg | (1 << (pin * 2));
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GPIOH_PUPDR &= ~(0x03 << (pin * 2));
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GPIOH_BSRR |= (1 << (pin + 16));
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}
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static void boot_led_off(void)
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{
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GPIOH_BSRR |= (1 << (LED_BOOT_PIN));
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}
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void usr_led_on(void)
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{
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uint32_t reg;
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uint32_t pin = LED_USR_PIN;
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RCC_AHB2ENR1_CLOCK_ER|= GPIOH_AHB2ENR1_CLOCK_ER;
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/* Delay after an RCC peripheral clock enabling */
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reg = RCC_AHB2ENR1_CLOCK_ER;
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reg = GPIOH_MODER & ~(0x03 << (pin * 2));
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GPIOH_MODER = reg | (1 << (pin * 2));
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GPIOH_PUPDR &= ~(0x03 << (pin * 2));
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GPIOH_BSRR |= (1 << (pin + 16));
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}
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void usr_led_off(void)
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{
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GPIOH_BSRR |= (1 << (LED_USR_PIN));
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}
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void main(void)
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{
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hal_init();
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boot_led_on();
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usr_led_on();
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boot_led_off();
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if (wolfBoot_current_firmware_version() > 1)
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boot_led_on();
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while(1)
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;
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}
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