David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support ... * HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write. * HiFive1 update demo application for accepting firmware updates over UART. * Added test-update-server application for pushing firmware image over UART. * Fixes for building with `make SIGN=ECC256`. * Improvements to wolfCrypt `user_settings.h`. * General library cleanup (license headers and formatting) * Updated the wolfSSL submodule to latest. * Documentation updates including new `Targets.md` section for hardare instructions.		2019-06-07 13:08:15 -07:00
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spi	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
cc26x2.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
cc26x2.ld	Added support for Texas Instrument cc26x2	2019-02-25 09:20:33 +01:00
hifive1.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
hifive1.ld	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
kinetis.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
kinetis.ld	Multi-platform test application, added K82 to Kinetis port	2019-04-04 16:31:45 +02:00
nrf52.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
nrf52.ld	…
samr21.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
samr21.ld	…
stm32f4.c	SiFive HiFive (FE310) RISC-V support	2019-06-07 13:08:15 -07:00
stm32f4.ld	Added test for bootloader update	2019-04-29 20:32:04 +02:00