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wolfBoot
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David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support 
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
 		2019-06-07 13:08:15 -07:00
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wolfboot SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
hal.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
image.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
loader.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
printf.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
spi_drv.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
spi_flash.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
target.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00
user_settings.h SiFive HiFive (FE310) RISC-V support 2019-06-07 13:08:15 -07:00