mirror of https://github.com/wolfSSL/wolfBoot.git
68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
/* system.h
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*
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*
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* Copyright (C) 2020 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifndef SYSTEM_H_INCLUDED
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#define SYSTEM_H_INCLUDED
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/* System specific: PLL with 8 MHz external oscillator, CPU at 168MHz */
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#define CPU_FREQ (168000000)
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#define PLL_FULL_MASK (0x7F037FFF)
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/* Assembly helpers */
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#define DMB() asm volatile ("dmb");
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#define WFI() asm volatile ("wfi");
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/* Master clock setting */
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void clock_config(void);
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void flash_set_waitstates(void);
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/* NVIC */
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/* NVIC ISER Base register (Cortex-M) */
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#define NVIC_TIM2_IRQN (28)
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#define NVIC_ISER_BASE (0xE000E100)
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#define NVIC_ICER_BASE (0xE000E180)
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#define NVIC_IPRI_BASE (0xE000E400)
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static inline void nvic_irq_enable(uint8_t n)
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{
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int i = n / 32;
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volatile uint32_t *nvic_iser = ((volatile uint32_t *)(NVIC_ISER_BASE + 4 * i));
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*nvic_iser |= (1 << (n % 32));
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}
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static inline void nvic_irq_disable(uint8_t n)
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{
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int i = n / 32;
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volatile uint32_t *nvic_icer = ((volatile uint32_t *)(NVIC_ICER_BASE + 4 * i));
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*nvic_icer |= (1 << (n % 32));
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}
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static inline void nvic_irq_setprio(uint8_t n, uint8_t prio)
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{
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volatile uint8_t *nvic_ipri = ((volatile uint8_t *)(NVIC_IPRI_BASE + n));
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*nvic_ipri = prio;
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}
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#endif /* !SYSTEM_H_INCLUDED */
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