mirror of https://github.com/wolfSSL/wolfBoot.git
254 lines
6.7 KiB
C
254 lines
6.7 KiB
C
/* mcxw.c
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*
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* Stubs for custom HAL implementation. Defines the
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* functions used by wolfboot for a specific target.
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifndef WOLFBOOT_UNIT_TEST_FLASH_ERASE
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#include <stdint.h>
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#include <target.h>
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#include "image.h"
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/* FSL includes */
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#include "fsl_common.h"
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/* Clock + RAM voltage settings */
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#include "fsl_clock.h"
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/* Flash driver */
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#include "fsl_device_registers.h"
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#include "fsl_lpspi_flash.h"
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#include "fsl_flash_api.h"
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#include "fsl_ccm32k.h"
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#include "hal/armv8m_tz.h"
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#define FLASH FMU0
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/*!< Core clock frequency: 48000000Hz */
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#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U
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static flash_config_t pflash;
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#endif /* !WOLFBOOT_UNIT_TEST_FLASH_ERASE */
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static uint32_t pflash_sector_size = WOLFBOOT_SECTOR_SIZE;
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#ifndef WOLFBOOT_UNIT_TEST_FLASH_ERASE
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uint32_t SystemCoreClock;
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#ifdef TZEN
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static void hal_sau_init(void)
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{
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/* Non-secure callable area */
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sau_init_region(0, WOLFBOOT_NSC_ADDRESS,
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WOLFBOOT_NSC_ADDRESS + WOLFBOOT_NSC_SIZE - 1, 1);
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/* Non-secure: application flash area */
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sau_init_region(1, WOLFBOOT_PARTITION_BOOT_ADDRESS,
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WOLFBOOT_PARTITION_BOOT_ADDRESS + 2 * WOLFBOOT_PARTITION_SIZE - 1,
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0);
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/* ROM bootloader API */
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sau_init_region(2, 0x14800000, 0x14817FFF, 0);
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/* Non-secure RAM */
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sau_init_region(3, 0x20010000, 0x20015FFF, 0);
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/* Peripherals */
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sau_init_region(4, 0x40000000, 0x4007FFFF, 0);
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sau_init_region(5, 0x48000000, 0x48FFFFFF, 0);
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/* Enable SAU */
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SAU_CTRL = SAU_INIT_CTRL_ENABLE;
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/* Enable securefault handler */
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SCB_SHCSR |= SCB_SHCSR_SECUREFAULT_EN;
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}
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static void periph_unsecure(void)
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{
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GPIOA->PCNS = 0xFFFFFFFF;
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GPIOA->ICNS = 0xFFFFFFFF;
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}
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#endif
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#ifdef __WOLFBOOT
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extern void BOARD_BootClockRUN(void);
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/* Assert hook needed by Kinetis SDK */
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void __assert_func(const char *a, int b, const char *c, const char *d)
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{
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while(1)
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;
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}
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void hal_prepare_boot(void)
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{
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#ifdef TZEN
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periph_unsecure();
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#endif
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}
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#endif
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void hal_init(void)
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{
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#ifdef __WOLFBOOT
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/* Clock setting */
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BOARD_BootClockRUN();
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#endif
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/* Clear the FLASH configuration structure */
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memset(&pflash, 0, sizeof(pflash));
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/* FLASH driver init */
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FLASH_Init(&pflash);
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FLASH_GetProperty(&pflash, kFLASH_PropertyPflash0SectorSize,
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&pflash_sector_size);
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#if defined(TZEN) && !defined(NONSECURE_APP)
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hal_sau_init();
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#endif
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}
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static void write_flash_qword(uint32_t *dst, const uint32_t *src)
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{
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/* Wait for non-busy */
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while (!(FMU0->FSTAT & 0x00000080)) {}
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/* Clear errors */
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FMU0->FSTAT = 0x74;
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/* Set command "program phrase" */
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FMU0->FCCOB[0] = 0x24;
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/* Start command */
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FMU0->FSTAT = 0x80;
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/* Wait for write enabled */
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while (!(FMU0->FSTAT & 0x01000000)) {}
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/* Write the 4 words */
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dst[0] = src[0];
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dst[1] = src[1];
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dst[2] = src[2];
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dst[3] = src[3];
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/* Wait for operation ready to execute */
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while (!(FMU0->FSTAT & 0x80000000)) {}
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/* Start operation */
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FMU0->FSTAT = 0x80000000;
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/* Wait for completion */
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while (!(FMU0->FSTAT & 0x00000080)) {}
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}
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int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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{
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int w = 0;
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const uint32_t flash_word_size = 16;
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const uint32_t empty_qword[4] = {
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0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
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};
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while (len > 0) {
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if ((len < (int)flash_word_size) || (address & (flash_word_size - 1))) {
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uint32_t aligned_qword[4];
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uint32_t address_align = address - (address & (flash_word_size - 1));
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uint32_t start_off = address - address_align;
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uint32_t i;
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memcpy(aligned_qword, (void*)address_align, flash_word_size);
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for (i = start_off; ((i < flash_word_size) && (i < len + start_off)); i++) {
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((uint8_t *)aligned_qword)[i] = data[w++];
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}
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if (memcmp(aligned_qword, empty_qword, flash_word_size) != 0) {
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write_flash_qword((uint32_t *)address_align, aligned_qword);
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}
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address = address_align + i;
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len -= (int)(i - start_off);
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}
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else {
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uint32_t i;
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uint32_t len_align = len - (len & 0x0F);
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for (i = 0; i < len_align; i += 16) {
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write_flash_qword((uint32_t *)(address + i),
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(const uint32_t *)(data + w + i));
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}
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w += len_align;
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len -= len_align;
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address += len_align;
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}
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}
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return 0;
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}
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void RAMFUNCTION hal_flash_unlock(void)
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{
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}
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void RAMFUNCTION hal_flash_lock(void)
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{
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}
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static void erase_flash_sector(uint32_t *dst) {
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/* Wait for non-busy */
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while (!(FMU0->FSTAT & 0x00000080)) {}
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/* Clear errors */
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FMU0->FSTAT = 0x74;
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/* Set command "erase sector" */
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FMU0->FCCOB[0] = 0x42;
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/* Start command */
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FMU0->FSTAT = 0x80;
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/* Wait for write enabled */
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while (!(FMU0->FSTAT & 0x01000000)) {}
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/* Write 4 words to specify sector to erase */
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dst[0] = 0;
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dst[1] = 0;
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dst[2] = 0;
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dst[3] = 0;
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/* Wait for operation ready to execute */
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while (!(FMU0->FSTAT & 0x80000000)) {}
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/* Start operation */
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FMU0->FSTAT = 0x80000000;
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/* Wait for completion */
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while (!(FMU0->FSTAT & 0x00000080)) {}
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}
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#endif /* !WOLFBOOT_UNIT_TEST_FLASH_ERASE */
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int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
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{
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uint32_t sector_size = pflash_sector_size;
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if (sector_size == 0U)
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sector_size = WOLFBOOT_SECTOR_SIZE;
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/* Rounding the start down extends the range, so the length must grow by
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* the same amount or the last sector of the request is left unerased. */
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if (address % sector_size) {
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uint32_t offset = address % sector_size;
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address -= offset;
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len += (int)offset;
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}
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while (len > 0) {
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erase_flash_sector((uint32_t *)address);
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address += sector_size;
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len -= (int)sector_size;
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}
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return 0;
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}
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