mirror of https://github.com/wolfSSL/wolfTPM.git
Fixes for STM32 I2C.
parent
352201ffe2
commit
14d766512f
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@ -18,6 +18,9 @@
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* along with wolfTPM. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#include "wolftpm_test.h"
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#ifndef SINGLE_THREADED
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@ -45,7 +48,7 @@ void wolfTPMTest(const void* argument)
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printf("Running wolfTPM Wrap Test...\n");
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/* Run wolfTPM wrap test */
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ret = TPM2_Wrapper_Test(NULL);
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ret = TPM2_Wrapper_Test(argument);
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printf("wolfTPM wrap test: Return code %d\n", ret);
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@ -21,9 +21,7 @@
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#ifndef WOLFTPM_TEST_H_
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#define WOLFTPM_TEST_H_
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#include <wolftpm/tpm2_types.h>
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#ifndef SINGLE_THREADED
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#include <cmsis_os.h>
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@ -66,7 +66,7 @@
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#ifdef WOLFTPM_EXAMPLE_HAL
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#ifdef WOLFTPM_ADV_IO
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WOLFTPM_API int TPM2_IoCb(TPM2_CTX*, int isRead, word32 addr, byte* buf, word16 size,
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WOLFTPM_API int TPM2_IoCb(TPM2_CTX* ctx, int isRead, word32 addr, byte* buf, word16 size,
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void* userCtx);
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#else
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WOLFTPM_API int TPM2_IoCb(TPM2_CTX* ctx, const byte* txBuf, byte* rxBuf,
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@ -109,7 +109,7 @@
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int rc;
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struct i2c_rdwr_ioctl_data rdwr;
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struct i2c_msg msgs[2];
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unsigned char buf[2];
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unsigned char buf[1];
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int timeout = TPM_I2C_TRIES;
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rdwr.msgs = msgs;
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@ -38,16 +38,24 @@
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defined(WOLFTPM_WINAPI) )
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#if defined(WOLFSSL_STM32_CUBEMX)
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#ifdef WOLFTPM_I2C
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#ifdef WOLFTPM_I2C
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#ifndef TPM_I2C_TRIES
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#define TPM_I2C_TRIES 20
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#endif
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#ifndef TPM2_I2C_ADDR
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#define TPM2_I2C_ADDR 0x2e
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#endif
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/* STM32 CubeMX HAL I2C */
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#define STM32_CUBEMX_I2C_TIMEOUT 250
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static int i2c_read(void* userCtx, word32 reg, byte* data, int len)
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{
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int rc;
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int i2cAddr = (TPM2_I2C_ADDR << 1) | 0x01; /* For I2C read LSB is 1 */
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byte buf[MAX_SPI_FRAMESIZE+1];
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int ret = TPM_RC_FAILURE;
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HAL_StatusTypeDef status;
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I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)userCtx;
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int i2cAddr = (TPM2_I2C_ADDR << 1) | 0x01; /* For I2C read LSB is 1 */
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int timeout = TPM_I2C_TRIES;
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byte buf[1];
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/* TIS layer should never provide a buffer larger than this,
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but double check for good coding practice */
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@ -55,37 +63,60 @@
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return BAD_FUNC_ARG;
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buf[0] = (reg & 0xFF);
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rc = HAL_I2C_Master_Receive(&hi2c, i2cAddr, data, len, STM32_CUBEMX_I2C_TIMEOUT);
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if (rc != -1) {
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XMEMCPY(data, buf+1, len);
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return TPM_RC_SUCCESS;
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/* The I2C device may hold clock low to indicate busy, which results in
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* HAL_BUSY failure here. Typically the retry completes in 1-3 retries */
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timeout = TPM_I2C_TRIES;
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do {
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status = HAL_I2C_Master_Transmit(hi2c, i2cAddr, buf, sizeof(buf),
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STM32_CUBEMX_I2C_TIMEOUT);
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} while (status != HAL_OK && --timeout > 0);
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if (status == HAL_OK) {
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timeout = TPM_I2C_TRIES;
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do {
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status = HAL_I2C_Master_Receive(hi2c, i2cAddr, data, len,
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STM32_CUBEMX_I2C_TIMEOUT);
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} while (status != HAL_OK && --timeout > 0);
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}
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return TPM_RC_FAILURE;
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if (status == HAL_OK) {
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ret = TPM_RC_SUCCESS;
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}
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else {
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printf("I2C Read failure %d\n", status);
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}
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return ret;
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}
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static int i2c_write(void* userCtx, word32 reg, byte* data, int len)
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{
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int rc;
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int i2cAddr = (TPM2_I2C_ADDR << 1); /* I2C write operation, LSB is 0 */
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byte buf[MAX_SPI_FRAMESIZE+1];
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int ret = TPM_RC_FAILURE;
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HAL_StatusTypeDef status;
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I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)userCtx;
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int i2cAddr = (TPM2_I2C_ADDR << 1); /* I2C write operation, LSB is 0 */
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int timeout = TPM_I2C_TRIES;
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byte buf[MAX_SPI_FRAMESIZE+1];
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/* TIS layer should never provide a buffer larger than this,
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but double check for good coding practice */
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if (len > MAX_SPI_FRAMESIZE)
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return BAD_FUNC_ARG;
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buf[0] = (reg & 0xFF); /* TPM register address */
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/* Build packet with TPM register and data */
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buf[0] = (reg & 0xFF);
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XMEMCPY(buf + 1, data, len);
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rc = HAL_I2C_Master_Transmit(&hi2c, TPM2_I2C_ADDR << 1, buf, len);
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if (rc != -1) {
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return TPM_RC_SUCCESS;
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/* The I2C device may hold clock low to indicate busy, which results in
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* HAL_BUSY failure here. Typically the retry completes in 1-3 retries */
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do {
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status = HAL_I2C_Master_Transmit(hi2c, i2cAddr, buf, len+1,
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STM32_CUBEMX_I2C_TIMEOUT);
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} while (status != HAL_OK && --timeout > 0);
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if (status == HAL_OK) {
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ret = TPM_RC_SUCCESS;
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}
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return TPM_RC_FAILURE;
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else {
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printf("I2C Write failure %d\n", status);
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}
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return ret;
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}
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int TPM2_IoCb_STCubeMX_I2C(TPM2_CTX* ctx, int isRead, word32 addr,
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@ -105,7 +136,7 @@
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return ret;
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}
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#else /* STM32 CubeMX Hal SPI */
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#else /* STM32 CubeMX Hal SPI */
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#define STM32_CUBEMX_SPI_TIMEOUT 250
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int TPM2_IoCb_STCubeMX_SPI(TPM2_CTX* ctx, const byte* txBuf, byte* rxBuf,
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word16 xferSz, void* userCtx)
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@ -178,7 +209,7 @@
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return ret;
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}
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#endif /* WOLFTPM_I2C */
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#endif /* WOLFTPM_I2C */
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#endif
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#endif /* !(WOLFTPM_LINUX_DEV || WOLFTPM_SWTPM || WOLFTPM_WINAPI) */
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#endif /* WOLFTPM_INCLUDE_IO_FILE */
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