mirror of https://github.com/wolfSSL/wolfTPM.git
707 lines
24 KiB
C
707 lines
24 KiB
C
/* user_settings.h
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*
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* Copyright (C) 2006-2025 wolfSSL Inc.
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*
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* This file is part of wolfTPM.
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*
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* wolfTPM is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfTPM is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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/* This user_settings.h is for Espressif ESP-IDF
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*
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* Standardized wolfSSL Espressif ESP32 + ESP8266 user_settings.h V5.7.0-1
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*
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* Do not include any wolfssl headers here.
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*/
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/* The Espressif project config file. See also sdkconfig.defaults */
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#include "sdkconfig.h"
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/* The Espressif sdkconfig will have chipset info.
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**
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** Some possible values:
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**
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** CONFIG_IDF_TARGET_ESP32
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** CONFIG_IDF_TARGET_ESP32S2
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** CONFIG_IDF_TARGET_ESP32S3
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** CONFIG_IDF_TARGET_ESP32C3
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** CONFIG_IDF_TARGET_ESP32C6
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*/
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#undef WOLFSSL_ESPIDF
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#define WOLFSSL_ESPIDF
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/* We don't use WiFi, so don't compile in the esp-sdk-lib WiFi helpers: */
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/* #define USE_WOLFSSL_ESP_SDK_WIFI */
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/* Experimental Kyber */
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#if 0
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/* Kyber typically needs a minimum 10K stack */
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#define WOLFSSL_EXPERIMENTAL_SETTINGS
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#define WOLFSSL_HAVE_KYBER
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#define WOLFSSL_WC_KYBER
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#define WOLFSSL_SHA3
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#endif
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/*
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* ONE of these Espressif chip families will be detected from sdkconfig:
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*
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* WOLFSSL_ESP32
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* WOLFSSL_ESP8266
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*/
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#undef WOLFSSL_ESPWROOM32SE
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#undef WOLFSSL_ESP8266
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#undef WOLFSSL_ESP32
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/* See below for chipset detection from sdkconfig.h */
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/* when you want to use SINGLE THREAD. Note Default ESP-IDF is FreeRTOS */
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/* #define SINGLE_THREADED */
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/* SMALL_SESSION_CACHE saves a lot of RAM for ClientCache and SessionCache.
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* Memory requirement is about 5KB, otherwise 20K is needed when not specified.
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* If extra small footprint is needed, try MICRO_SESSION_CACHE (< 1K)
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* When really desperate or no TLS used, try NO_SESSION_CACHE. */
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#define NO_SESSION_CACHE
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/* Small Stack uses more heap. */
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#define WOLFSSL_SMALL_STACK
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/* Full debugging turned off, but show malloc failure detail */
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/* #define DEBUG_WOLFSSL */
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#define DEBUG_WOLFSSL_MALLOC
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/* See test.c that sets cert buffers; we'll set them here: */
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#define USE_CERT_BUFFERS_256
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#define USE_CERT_BUFFERS_2048
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/* RSA_LOW_MEM: Half as much memory but twice as slow. */
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#define RSA_LOW_MEM
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/* optionally turn off SHA512/224 SHA512/256 */
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/* #define WOLFSSL_NOSHA512_224 */
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/* #define WOLFSSL_NOSHA512_256 */
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/* when you want to use SINGLE THREAD. Note Default ESP-IDF is FreeRTOS */
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/* #define SINGLE_THREADED */
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/* When you don't want to use the old SHA */
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/* #define NO_SHA */
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/* #define NO_OLD_TLS */
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#define BENCH_EMBEDDED
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/* TLS 1.3 */
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#define WOLFSSL_TLS13
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#define HAVE_TLS_EXTENSIONS
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#define WC_RSA_PSS
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#define HAVE_HKDF
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#define HAVE_AEAD
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#define HAVE_SUPPORTED_CURVES
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#define WOLFSSL_BENCHMARK_FIXED_UNITS_KB
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#define NO_FILESYSTEM
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#define NO_OLD_TLS
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#define HAVE_AESGCM
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/* Optional RIPEMD: RACE Integrity Primitives Evaluation Message Digest */
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/* #define WOLFSSL_RIPEMD */
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/* when you want to use SHA224 */
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#define WOLFSSL_SHA224
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/* when you want to use SHA384 */
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#define WOLFSSL_SHA384
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/* when you want to use SHA512 */
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#define WOLFSSL_SHA512
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/* when you want to use SHA3 */
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#define WOLFSSL_SHA3
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/* ED25519 requires SHA512 */
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#define HAVE_ED25519
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/* Some features not enabled for ESP8266: */
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#if defined(CONFIG_IDF_TARGET_ESP8266) || \
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defined(CONFIG_IDF_TARGET_ESP32C2)
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/* TODO determine low memory configuration for ECC. */
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#else
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#define HAVE_ECC
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#define HAVE_CURVE25519
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#define CURVE25519_SMALL
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#endif
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#define HAVE_ED25519
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/* Optional OPENSSL compatibility */
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#define OPENSSL_EXTRA
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/* #Optional HAVE_PKCS7 */
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/* #define HAVE_PKCS7 */
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#if defined(HAVE_PKCS7)
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/* HAVE_PKCS7 may enable HAVE_PBKDF2 see settings.h */
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#define NO_PBKDF2
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#define HAVE_AES_KEYWRAP
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#define HAVE_X963_KDF
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#define WOLFSSL_AES_DIRECT
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#endif
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/* when you want to use AES counter mode */
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/* #define WOLFSSL_AES_DIRECT */
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/* #define WOLFSSL_AES_COUNTER */
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/* esp32-wroom-32se specific definition */
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#if defined(WOLFSSL_ESPWROOM32SE)
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#define WOLFSSL_ATECC508A
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#define HAVE_PK_CALLBACKS
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/* when you want to use a custom slot allocation for ATECC608A */
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/* unless your configuration is unusual, you can use default */
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/* implementation. */
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/* #define CUSTOM_SLOT_ALLOCATION */
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#endif
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/* WC_NO_CACHE_RESISTANT: slower but more secure */
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/* #define WC_NO_CACHE_RESISTANT */
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/* TFM_TIMING_RESISTANT: slower but more secure */
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/* #define TFM_TIMING_RESISTANT */
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/* #define WOLFSSL_ATECC508A_DEBUG */
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/* date/time */
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/* if it cannot adjust time in the device, */
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/* enable macro below */
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/* #define NO_ASN_TIME */
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/* #define XTIME time */
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/* adjust wait-timeout count if you see timeout in RSA HW acceleration */
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#define ESP_RSA_TIMEOUT_CNT 0x349F00
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/* hash limit for test.c */
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#define HASH_SIZE_LIMIT
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/* USE_FAST_MATH is default */
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#define USE_FAST_MATH
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/***** Use SP_MATH *****/
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/* #undef USE_FAST_MATH */
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/* #define SP_MATH */
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/* #define WOLFSSL_SP_MATH_ALL */
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/* #define WOLFSSL_SP_RISCV32 */
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/***** Use Integer Heap Math *****/
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/* #undef USE_FAST_MATH */
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/* #define USE_INTEGER_HEAP_MATH */
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#define WOLFSSL_SMALL_STACK
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#define HAVE_VERSION_EXTENDED_INFO
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/* #define HAVE_WC_INTROSPECTION */
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#define HAVE_SESSION_TICKET
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/* #define HAVE_HASHDRBG */
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#define WOLFSSL_KEY_GEN
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#define WOLFSSL_CERT_REQ
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#define WOLFSSL_CERT_GEN
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#define WOLFSSL_CERT_EXT
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#define WOLFSSL_SYS_CA_CERTS
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#define WOLFSSL_CERT_TEXT
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#define WOLFSSL_ASN_TEMPLATE
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/*
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#undef WOLFSSL_KEY_GEN
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#undef WOLFSSL_CERT_REQ
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#undef WOLFSSL_CERT_GEN
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#undef WOLFSSL_CERT_EXT
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#undef WOLFSSL_SYS_CA_CERTS
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*/
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/* command-line options
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--enable-keygen
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--enable-certgen
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--enable-certreq
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--enable-certext
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--enable-asn-template
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*/
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/* Chipset detection from sdkconfig.h
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* Default is HW enabled unless turned off.
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* Uncomment lines to force SW instead of HW acceleration */
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#if defined(CONFIG_IDF_TARGET_ESP32)
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#define WOLFSSL_ESP32
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/* Alternatively, if there's an ECC Secure Element present: */
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/* #define WOLFSSL_ESPWROOM32SE */
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/* wolfSSL HW Acceleration supported on ESP32. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */
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/* #define NO_WOLFSSL_ESP32_CRYPT_AES */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
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/* These are defined automatically in esp32-crypt.h, here for clarity: */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224 /* no SHA224 HW on ESP32 */
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#undef ESP_RSA_MULM_BITS
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#define ESP_RSA_MULM_BITS 16 /* TODO add compile-time warning */
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/***** END CONFIG_IDF_TARGET_ESP32 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32S2)
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#define WOLFSSL_ESP32
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/* wolfSSL HW Acceleration supported on ESP32-S2. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */
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/* Note: There's no AES192 HW on the ESP32-S2; falls back to SW */
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/* #define NO_WOLFSSL_ESP32_CRYPT_AES */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
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/***** END CONFIG_IDF_TARGET_ESP32S2 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32S3)
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#define WOLFSSL_ESP32
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/* wolfSSL HW Acceleration supported on ESP32-S3. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */
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/* Note: There's no AES192 HW on the ESP32-S3; falls back to SW */
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/* #define NO_WOLFSSL_ESP32_CRYPT_AES */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
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/***** END CONFIG_IDF_TARGET_ESP32S3 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \
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defined(CONFIG_IDF_TARGET_ESP8684)
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#define WOLFSSL_ESP32
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/* ESP8684 is essentially ESP32-C2 chip + flash embedded together in a
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* single QFN 4x4 mm package. Out of released documentation, Technical
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* Reference Manual as well as ESP-IDF Programming Guide is applicable
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* to both ESP32-C2 and ESP8684.
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*
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* See: https://www.esp32.com/viewtopic.php?f=5&t=27926#:~:text=ESP8684%20is%20essentially%20ESP32%2DC2,both%20ESP32%2DC2%20and%20ESP8684. */
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/* wolfSSL HW Acceleration supported on ESP32-C2. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ /* to disable all SHA HW */
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/* These are defined automatically in esp32-crypt.h, here for clarity */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384 /* no SHA384 HW on C2 */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /* no SHA512 HW on C2 */
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/* There's no AES or RSA/Math accelerator on the ESP32-C2
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* Auto defined with NO_WOLFSSL_ESP32_CRYPT_RSA_PRI, for clarity: */
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#define NO_WOLFSSL_ESP32_CRYPT_AES
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD
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/***** END CONFIG_IDF_TARGET_ESP32C2 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32C3)
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#define WOLFSSL_ESP32
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/* wolfSSL HW Acceleration supported on ESP32-C3. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */ /* to disable all SHA HW */
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/* These are defined automatically in esp32-crypt.h, here for clarity: */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384 /* no SHA384 HW on C6 */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /* no SHA512 HW on C6 */
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/* #define NO_WOLFSSL_ESP32_CRYPT_AES */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
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/***** END CONFIG_IDF_TARGET_ESP32C3 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32C6)
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#define WOLFSSL_ESP32
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/* wolfSSL HW Acceleration supported on ESP32-C6. Uncomment to disable: */
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/* #define NO_ESP32_CRYPT */
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/* #define NO_WOLFSSL_ESP32_CRYPT_HASH */
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/* These are defined automatically in esp32-crypt.h, here for clarity: */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384 /* no SHA384 HW on C6 */
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#define NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512 /* no SHA512 HW on C6 */
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/* #define NO_WOLFSSL_ESP32_CRYPT_AES */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
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/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
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/***** END CONFIG_IDF_TARGET_ESP32C6 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP32H2)
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#define WOLFSSL_ESP32
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/* wolfSSL Hardware Acceleration not yet implemented */
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#define NO_ESP32_CRYPT
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#define NO_WOLFSSL_ESP32_CRYPT_HASH
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#define NO_WOLFSSL_ESP32_CRYPT_AES
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI
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/***** END CONFIG_IDF_TARGET_ESP32H2 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP8266)
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#define WOLFSSL_ESP8266
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/* There's no hardware encryption on the ESP8266 */
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/* Consider using the ESP32-C2/C3/C6
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* See https://www.espressif.com/en/products/socs/esp32-c2 */
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#define NO_ESP32_CRYPT
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#define NO_WOLFSSL_ESP32_CRYPT_HASH
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#define NO_WOLFSSL_ESP32_CRYPT_AES
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI
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/***** END CONFIG_IDF_TARGET_ESP266 *****/
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#elif defined(CONFIG_IDF_TARGET_ESP8684)
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/* There's no Hardware Acceleration available on ESP8684 */
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#define NO_ESP32_CRYPT
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#define NO_WOLFSSL_ESP32_CRYPT_HASH
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#define NO_WOLFSSL_ESP32_CRYPT_AES
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI
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/***** END CONFIG_IDF_TARGET_ESP8684 *****/
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#else
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/* Anything else encountered, disable HW acceleration */
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#warning "Unexpected CONFIG_IDF_TARGET_NN value"
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#define NO_ESP32_CRYPT
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#define NO_WOLFSSL_ESP32_CRYPT_HASH
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#define NO_WOLFSSL_ESP32_CRYPT_AES
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#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI
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#endif /* CONFIG_IDF_TARGET Check */
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/* RSA primitive specific definition, listed AFTER the Chipset detection */
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#if defined(WOLFSSL_ESP32) || defined(WOLFSSL_ESPWROOM32SE)
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/* Consider USE_FAST_MATH and SMALL_STACK */
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#ifndef NO_RSA
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#define ESP32_USE_RSA_PRIMITIVE
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#if defined(CONFIG_IDF_TARGET_ESP32)
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#ifdef CONFIG_ESP_MAIN_TASK_STACK_SIZE
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#if CONFIG_ESP_MAIN_TASK_STACK_SIZE < 10500
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#warning "RSA may be difficult with less than 10KB Stack "/
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#endif
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#endif
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/* NOTE HW unreliable for small values! */
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/* threshold for performance adjustment for HW primitive use */
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/* X bits of G^X mod P greater than */
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#undef ESP_RSA_EXPT_XBITS
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#define ESP_RSA_EXPT_XBITS 32
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/* X and Y of X * Y mod P greater than */
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#undef ESP_RSA_MULM_BITS
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#define ESP_RSA_MULM_BITS 16
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#endif
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#endif
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#endif
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/* Debug options:
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See wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h for details on debug options
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#define ESP_VERIFY_MEMBLOCK
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#define DEBUG_WOLFSSL
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#define DEBUG_WOLFSSL_VERBOSE
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#define DEBUG_WOLFSSL_SHA_MUTEX
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#define WOLFSSL_ESP32_CRYPT_DEBUG
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#define WOLFSSL_ESP32_CRYPT_HASH_SHA224_DEBUG
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#define NO_RECOVER_SOFTWARE_CALC
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#define WOLFSSL_TEST_STRAY 1
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#define USE_ESP_DPORT_ACCESS_READ_BUFFER
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#define WOLFSSL_ESP32_HW_LOCK_DEBUG
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#define WOLFSSL_DEBUG_ESP_RSA_MULM_BITS
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#define ESP_DISABLE_HW_TASK_LOCK
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See wolfcrypt/benchmark/benchmark.c for debug and other settings:
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Turn on benchmark timing debugging (CPU Cycles, RTOS ticks, etc)
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#define DEBUG_WOLFSSL_BENCHMARK_TIMING
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Turn on timer debugging (used when CPU cycles not available)
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#define WOLFSSL_BENCHMARK_TIMER_DEBUG
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*/
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/* Pause in a loop rather than exit. */
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#define WOLFSSL_ESPIDF_ERROR_PAUSE
|
|
|
|
#define WOLFSSL_HW_METRICS
|
|
|
|
/* for test.c */
|
|
/* #define HASH_SIZE_LIMIT */
|
|
|
|
/* Optionally turn off HW math checks */
|
|
/* #define NO_HW_MATH_TEST */
|
|
|
|
/* Optionally include alternate HW test library: alt_hw_test.h */
|
|
/* When enabling, the ./components/wolfssl/CMakeLists.txt file
|
|
* will need the name of the library in the idf_component_register
|
|
* for the PRIV_REQUIRES list. */
|
|
/* #define INCLUDE_ALT_HW_TEST */
|
|
|
|
/* optionally turn off individual math HW acceleration features */
|
|
|
|
/* Turn off Large Number ESP32 HW Multiplication:
|
|
** [Z = X * Y] in esp_mp_mul() */
|
|
/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MP_MUL */
|
|
|
|
/* Turn off Large Number ESP32 HW Modular Exponentiation:
|
|
** [Z = X^Y mod M] in esp_mp_exptmod() */
|
|
/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_EXPTMOD */
|
|
|
|
/* Turn off Large Number ESP32 HW Modular Multiplication
|
|
** [Z = X * Y mod M] in esp_mp_mulmod() */
|
|
/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI_MULMOD */
|
|
|
|
|
|
/* used by benchmark: */
|
|
#define WOLFSSL_PUBLIC_MP
|
|
|
|
/* when turning on ECC508 / ECC608 support
|
|
#define WOLFSSL_ESPWROOM32SE
|
|
#define HAVE_PK_CALLBACKS
|
|
#define WOLFSSL_ATECC508A
|
|
#define ATCA_WOLFSSL
|
|
*/
|
|
|
|
/***************************** Certificate Macros *****************************
|
|
*
|
|
* The section below defines macros used in typically all of the wolfSSL
|
|
* examples such as the client and server for certs stored in header files.
|
|
*
|
|
* There are various certificate examples in this header file:
|
|
* https://github.com/wolfSSL/wolfssl/blob/master/wolfssl/certs_test.h
|
|
*
|
|
* To use the sets of macros below, define *one* of these:
|
|
*
|
|
* USE_CERT_BUFFERS_1024 - ECC 1024 bit encoded ASN1
|
|
* USE_CERT_BUFFERS_2048 - RSA 2048 bit encoded ASN1
|
|
* WOLFSSL_SM[2,3,4] - SM Ciphers
|
|
*
|
|
* For example: define USE_CERT_BUFFERS_2048 to use CA Certs used in this
|
|
* wolfSSL function for the `ca_cert_der_2048` buffer, size and types:
|
|
*
|
|
* ret = wolfSSL_CTX_load_verify_buffer(ctx,
|
|
* CTX_CA_CERT,
|
|
* CTX_CA_CERT_SIZE,
|
|
* CTX_CA_CERT_TYPE);
|
|
*
|
|
* See https://www.wolfssl.com/documentation/manuals/wolfssl/group__CertsKeys.html#function-wolfssl_ctx_load_verify_buffer
|
|
*
|
|
* In this case the CTX_CA_CERT will be defined as `ca_cert_der_2048` as
|
|
* defined here: https://github.com/wolfSSL/wolfssl/blob/master/wolfssl/certs_test.h
|
|
*
|
|
* The CTX_CA_CERT_SIZE and CTX_CA_CERT_TYPE are similarly used to reference
|
|
* array size and cert type respectively.
|
|
*
|
|
* Similarly for loading the private client key:
|
|
*
|
|
* ret = wolfSSL_CTX_use_PrivateKey_buffer(ctx,
|
|
* CTX_CLIENT_KEY,
|
|
* CTX_CLIENT_KEY_SIZE,
|
|
* CTX_CLIENT_KEY_TYPE);
|
|
*
|
|
* see https://www.wolfssl.com/documentation/manuals/wolfssl/group__CertsKeys.html#function-wolfssl_ctx_use_privatekey_buffer
|
|
*
|
|
* Similarly, the other macros are for server certificates and keys:
|
|
* `CTX_SERVER_CERT` and `CTX_SERVER_KEY` are available.
|
|
*
|
|
* The certificate and key names are typically `static const unsigned char`
|
|
* arrays. The [NAME]_size are typically `sizeof([array name])`, and the types
|
|
* are the known wolfSSL encoding type integers (e.g. WOLFSSL_FILETYPE_PEM).
|
|
*
|
|
* See `SSL_FILETYPE_[name]` in
|
|
* https://github.com/wolfSSL/wolfssl/blob/master/wolfssl/ssl.h
|
|
*
|
|
* See Abstract Syntax Notation One (ASN.1) in:
|
|
* https://github.com/wolfSSL/wolfssl/blob/master/wolfssl/wolfcrypt/asn.h
|
|
*
|
|
* Optional SM4 Ciphers:
|
|
*
|
|
* Although the SM ciphers are shown here, the `certs_test_sm.h` may not yet
|
|
* be available. See:
|
|
* https://github.com/wolfSSL/wolfssl/pull/6825
|
|
* https://github.com/wolfSSL/wolfsm
|
|
*
|
|
* Uncomment these 3 macros to enable the SM Ciphers and use the macros below.
|
|
*/
|
|
|
|
/*
|
|
#define WOLFSSL_SM2
|
|
#define WOLFSSL_SM3
|
|
#define WOLFSSL_SM4
|
|
*/
|
|
|
|
/* Conditional macros used in wolfSSL TLS client and server examples */
|
|
#if defined(WOLFSSL_SM2) || defined(WOLFSSL_SM3) || defined(WOLFSSL_SM4)
|
|
#include <wolfssl/certs_test_sm.h>
|
|
#define CTX_CA_CERT root_sm2
|
|
#define CTX_CA_CERT_SIZE sizeof_root_sm2
|
|
#define CTX_CA_CERT_TYPE WOLFSSL_FILETYPE_PEM
|
|
#define CTX_SERVER_CERT server_sm2
|
|
#define CTX_SERVER_CERT_SIZE sizeof_server_sm2
|
|
#define CTX_SERVER_CERT_TYPE WOLFSSL_FILETYPE_PEM
|
|
#define CTX_SERVER_KEY server_sm2_priv
|
|
#define CTX_SERVER_KEY_SIZE sizeof_server_sm2_priv
|
|
#define CTX_SERVER_KEY_TYPE WOLFSSL_FILETYPE_PEM
|
|
|
|
#undef WOLFSSL_BASE16
|
|
#define WOLFSSL_BASE16
|
|
#else
|
|
#if defined(USE_CERT_BUFFERS_2048)
|
|
/* Be sure to include in app when using example certs: */
|
|
/* #include <wolfssl/certs_test.h> */
|
|
#define CTX_CA_CERT ca_cert_der_2048
|
|
#define CTX_CA_CERT_SIZE sizeof_ca_cert_der_2048
|
|
#define CTX_CA_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
|
|
#define CTX_SERVER_CERT server_cert_der_2048
|
|
#define CTX_SERVER_CERT_SIZE sizeof_server_cert_der_2048
|
|
#define CTX_SERVER_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
#define CTX_SERVER_KEY server_key_der_2048
|
|
#define CTX_SERVER_KEY_SIZE sizeof_server_key_der_2048
|
|
#define CTX_SERVER_KEY_TYPE WOLFSSL_FILETYPE_ASN1
|
|
|
|
#define CTX_CLIENT_CERT client_cert_der_2048
|
|
#define CTX_CLIENT_CERT_SIZE sizeof_client_cert_der_2048
|
|
#define CTX_CLIENT_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
#define CTX_CLIENT_KEY client_key_der_2048
|
|
#define CTX_CLIENT_KEY_SIZE sizeof_client_key_der_2048
|
|
#define CTX_CLIENT_KEY_TYPE WOLFSSL_FILETYPE_ASN1
|
|
|
|
#elif defined(USE_CERT_BUFFERS_1024)
|
|
/* Be sure to include in app when using example certs: */
|
|
/* #include <wolfssl/certs_test.h> */
|
|
#define CTX_CA_CERT ca_cert_der_1024
|
|
#define CTX_CA_CERT_SIZE sizeof_ca_cert_der_1024
|
|
#define CTX_CA_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
|
|
#define CTX_CLIENT_CERT client_cert_der_1024
|
|
#define CTX_CLIENT_CERT_SIZE sizeof_client_cert_der_1024
|
|
#define CTX_CLIENT_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
#define CTX_CLIENT_KEY client_key_der_1024
|
|
#define CTX_CLIENT_KEY_SIZE sizeof_client_key_der_1024
|
|
#define CTX_CLIENT_KEY_TYPE WOLFSSL_FILETYPE_ASN1
|
|
|
|
#define CTX_SERVER_CERT server_cert_der_1024
|
|
#define CTX_SERVER_CERT_SIZE sizeof_server_cert_der_1024
|
|
#define CTX_SERVER_CERT_TYPE WOLFSSL_FILETYPE_ASN1
|
|
#define CTX_SERVER_KEY server_key_der_1024
|
|
#define CTX_SERVER_KEY_SIZE sizeof_server_key_der_1024
|
|
#define CTX_SERVER_KEY_TYPE WOLFSSL_FILETYPE_ASN1
|
|
#else
|
|
/* Optionally define custom cert arrays, sizes, and types here */
|
|
#error "Must define USE_CERT_BUFFERS_2048 or USE_CERT_BUFFERS_1024"
|
|
#endif
|
|
#endif /* Conditional key and cert constant names */
|
|
|
|
/*****************************************************************************/
|
|
/*****************************************************************************/
|
|
/* */
|
|
/* wolfTPM */
|
|
/* */
|
|
/*****************************************************************************/
|
|
/*****************************************************************************/
|
|
|
|
/* How many main app test loop interations? */
|
|
#define WOLFTPM_MAIN_TEST_ITERATIONS 100
|
|
|
|
/* WOLFTPM_ADV_IO allows callback code in tpm_io_espressif.c */
|
|
#define WOLFTPM_ADV_IO
|
|
|
|
/* Choices are I2C or SPI*/
|
|
/* WOLFTPM_I2C or not; when not defined, assumes SPI. */
|
|
#define WOLFTPM_I2C
|
|
|
|
/* Enable the wolfTPM example HAL in tpm_io.h */
|
|
#define WOLFTPM_EXAMPLE_HAL
|
|
|
|
/* Include the respective hal/tmp_io_NNN file, in our case: tpm_io_espressif */
|
|
#define WOLFTPM_INCLUDE_IO_FILE
|
|
|
|
/* The default TPM_TIMEOUT_TRIES is 1,000,000 but can be overridden.
|
|
* A value of 10000 is much more appropriate for the ESP32: */
|
|
#define TPM_TIMEOUT_TRIES 10000
|
|
|
|
/* If not defined here, TPM_I2C_TRIES is set to a default value of 10 */
|
|
/* #define TPM_I2C_TRIES 10 */
|
|
|
|
/* If not defined here, I2C_MASTER_FREQ_HZ is 100000
|
|
* Do not exceed a value of 400000 */
|
|
/* #define I2C_MASTER_FREQ_HZ 100000 */
|
|
|
|
/* Examples may have a main() function, we'll have our own: */
|
|
#define NO_MAIN_DRIVER
|
|
|
|
/* I2C GPIO settings are defined in idf.py menuconfig
|
|
*
|
|
* CONFIG_I2C_MASTER_SCL (default SCL GPIO pin is 19)
|
|
* CONFIG_I2C_MASTER_SDA (default SDA GPIO pin is 18)
|
|
*/
|
|
|
|
/* The default I2C_MASTER_NUM is 0 but can be overridden: */
|
|
/* #define I2C_MASTER_NUM 0 */
|
|
|
|
/* I2C_MASTER_FREQ_HZ notes:
|
|
*
|
|
* Although the Infineon supports higher speeds, the ESP32 does not.
|
|
*
|
|
* ESP32 supports both I2C Standard-mode (Sm) and Fast-mode (Fm) which
|
|
* can go up to 100KHz and 400KHz respectively.
|
|
*
|
|
* Do not set this value higher than 400000.
|
|
*
|
|
* This is the value assigned to ESP32 i2c_config_t: master.clk_speed */
|
|
#define I2C_MASTER_FREQ_HZ 100000
|
|
|
|
/* Beware that delays in sending data to UART may affect I2C timing and
|
|
* cause errors. Debug with caution. Debug options available: */
|
|
/* #define WOLFTPM_DEBUG_IO */
|
|
|
|
/* Optionally disable printf */
|
|
/* #define WOLFSSL_NOPRINTF */
|
|
|
|
#ifdef WOLFSSL_ESPIDF
|
|
#include <esp_log.h>
|
|
#define ESP_LOG_TAG "tpm2"
|
|
#ifndef WOLFSSL_NOPRINTF
|
|
#define XPRINTF(...) ESP_LOGI("tpm", __VA_ARGS__)
|
|
#else
|
|
#define printf(...) {}
|
|
#endif
|
|
#else
|
|
#include <stdio.h>
|
|
#endif
|