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Add wolfcrypt SHA support for ESP32-C2, other minor updates

pull/7081/head
gojimmypi 2023-12-18 17:35:43 -08:00
parent 4e081960d3
commit 07a5566c52
5 changed files with 150 additions and 51 deletions
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20
IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c
View File

@ -36,6 +36,10 @@
#include <wolfcrypt/test/test.h>
#include <wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h>
/* set to 0 for one benchmark,
** set to 1 for continuous benchmark loop */
#define TEST_LOOP 0
/*
** the wolfssl component can be installed in either:
**
@ -190,7 +194,10 @@ void app_main(void)
#if defined(NO_ESP32_CRYPT)
ESP_LOGI(TAG, "NO_ESP32_CRYPT defined! HW acceleration DISABLED.");
#else
#if defined(CONFIG_IDF_TARGET_ESP32C3)
#if defined(CONFIG_IDF_TARGET_ESP32C2)
ESP_LOGI(TAG, "ESP32_CRYPT is enabled for ESP32-C2.");
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
ESP_LOGI(TAG, "ESP32_CRYPT is enabled for ESP32-C3.");
#elif defined(CONFIG_IDF_TARGET_ESP32S2)
@ -239,8 +246,11 @@ void app_main(void)
loops++;
}
while (ret == 0);
ESP_LOGI(TAG, "loops = %d", loops);
while (TEST_LOOP && (ret == 0));
#if defined TEST_LOOP && (TEST_LOOP == 1)
ESP_LOGI(TAG, "Test loops completed: %d", loops);
#endif
/* note wolfCrypt_Cleanup() should always be called when finished.
** This is called at the end of wolf_test_task();
@ -266,8 +276,12 @@ void app_main(void)
- (uxTaskGetStackHighWaterMark(NULL)));
#endif
#ifdef WOLFSSL_ESPIDF_EXIT_MESSAGE
ESP_LOGI(TAG, WOLFSSL_ESPIDF_EXIT_MESSAGE);
#else
ESP_LOGI(TAG, "\n\nDone!\n\n"
"If running from idf.py monitor, press twice: Ctrl+]");
#endif
/* done */
while (1) {

7
wolfcrypt/src/port/Espressif/esp32_util.c
View File

@ -592,9 +592,10 @@ int ShowExtendedSystemInfo(void)
ESP_LOGI(TAG, "CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = %u MHz",
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
);
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
ESP_LOGI(TAG, "CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = %u MHz",
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
#elif defined(CONFIG_IDF_TARGET_ESP32C3) && \
defined(CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ)
ESP_LOGI(TAG, "CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ = %u MHz",
CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
);
#elif defined(CONFIG_IDF_TARGET_ESP32C6)

59
wolfcrypt/src/sha.c
View File

@ -644,9 +644,15 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) \
&& defined(WOLFSSL_ESP32_CRYPT) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{
@ -722,9 +728,15 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{
@ -765,9 +777,15 @@ int wc_ShaFinalRaw(wc_Sha* sha, byte* hash)
}
#ifdef LITTLE_ENDIAN_ORDER
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{
@ -834,9 +852,15 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{
@ -875,9 +899,15 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{ /* reminder local also points to sha->buffer */
@ -902,7 +932,11 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash)
#endif
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && !defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
if (sha->ctx.mode == ESP32_SHA_HW) {
#if defined(WOLFSSL_SUPER_VERBOSE_DEBUG)
@ -938,9 +972,14 @@ if (sha->ctx.mode == ESP32_SHA_HW) {
#endif
#ifdef LITTLE_ENDIAN_ORDER
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && !defined(NO_WOLFSSL_ESP32_CRYPT_HASH)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha->ctx))
#endif
{

78
wolfcrypt/src/sha256.c
View File

@ -1073,11 +1073,16 @@ static int InitSha256(wc_Sha256* sha256)
(defined(HAVE_INTEL_AVX1) || defined(HAVE_INTEL_AVX2))
if (!IS_INTEL_AVX1(intel_flags) && !IS_INTEL_AVX2(intel_flags))
#endif
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
{
@ -1179,11 +1184,16 @@ static int InitSha256(wc_Sha256* sha256)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
#if defined(WOLFSSL_X86_64_BUILD) && \
@ -1297,11 +1307,16 @@ static int InitSha256(wc_Sha256* sha256)
#endif
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
#if defined(WOLFSSL_X86_64_BUILD) && defined(USE_INTEL_SPEEDUP) && \
@ -1350,11 +1365,16 @@ static int InitSha256(wc_Sha256* sha256)
/* store lengths */
#if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU_SHA)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
#if defined(WOLFSSL_X86_64_BUILD) && defined(USE_INTEL_SPEEDUP) && \
@ -1373,11 +1393,16 @@ static int InitSha256(wc_Sha256* sha256)
/* Only the ESP32-C3 with HW enabled may need pad size byte order reversal
* depending on HW or SW mode */
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (sha256->ctx.mode == ESP32_SHA_HW) {
#if defined(WOLFSSL_SUPER_VERBOSE_DEBUG)
ESP_LOGV(TAG, "Start: Reverse PAD SIZE Endianness.");
@ -1442,11 +1467,16 @@ static int InitSha256(wc_Sha256* sha256)
}
#ifdef LITTLE_ENDIAN_ORDER
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
{
@ -1497,10 +1527,16 @@ static int InitSha256(wc_Sha256* sha256)
}
#if defined(LITTLE_ENDIAN_ORDER)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256)
/* For Espressif RISC-V Targets, we *may* need to reverse bytes
* depending on if HW is active or not. */
if (esp_sha_need_byte_reversal(&sha256->ctx))
#endif
{
@ -1793,10 +1829,10 @@ static int InitSha256(wc_Sha256* sha256)
#endif /* WOLFSSL_ASYNC_CRYPT */
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
(!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224))
( !defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224) )
/* nothing enabled here for C3 success */
/* nothing enabled here for RISC-V C2/C3/C6 success */
#endif
ret = Sha256Final((wc_Sha256*)sha224);
@ -1804,11 +1840,15 @@ static int InitSha256(wc_Sha256* sha256)
return ret;
#if defined(LITTLE_ENDIAN_ORDER)
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)) && \
#if ( defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6) \
) && \
defined(WOLFSSL_ESP32_CRYPT) && \
(!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA256) || \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224))
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA224) \
)
if (esp_sha_need_byte_reversal(&sha224->ctx))
#endif
{

11
wolfcrypt/src/sha512.c
View File

@ -1613,9 +1613,12 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst)
if (ret == 0) {
ret = esp_sha512_ctx_copy(src, dst);
}
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)
ESP_LOGV(TAG, "No SHA-512 HW on the ESP32-C3");
#elif defined(CONFIG_IDF_TARGET_ESP32S2) || \
defined(CONFIG_IDF_TARGET_ESP32S3)
if (ret == 0) {
@ -1626,7 +1629,7 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst)
CONFIG_IDF_TARGET);
#endif
#endif
#endif /* WOLFSSL_USE_ESP32_CRYPT_HASH_HW */
#ifdef WOLFSSL_HASH_FLAGS
dst->flags |= WC_HASH_FLAG_ISCOPY;
@ -1893,7 +1896,9 @@ int wc_Sha384Copy(wc_Sha384* src, wc_Sha384* dst)
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
#if defined(CONFIG_IDF_TARGET_ESP32)
esp_sha384_ctx_copy(src, dst);
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \
defined(CONFIG_IDF_TARGET_ESP8684) || \
defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32C6)
ESP_LOGV(TAG, "No SHA-384 HW on the ESP32-C3");
#elif defined(CONFIG_IDF_TARGET_ESP32S2) || \