mirror of https://github.com/wolfSSL/wolfssl.git
armv8: enable the SHA-3 extension the ML-KEM assembly needs
The ARM64 ML-KEM port emits eor3, which is not in the base ARMv8-A a toolchain
may be invoked with, and the file carries no directive:
armv8-mlkem-asm.S: Error: selected processor does not support
`eor3 v31.16b,v0.16b,v5.16b,v10.16b'
The directive sits inside WOLFSSL_ARMASM_CRYPTO_SHA3, the guard selecting the
variant that needs it, so a build that has not opted in never asks for it.
The same file's sqrdmlsh deliberately gets none. RDMA is opt-out
(WOLFSSL_AARCH64_NO_SQRDMLSH) where SHA-3 is opt-in, and on a target with no
way to read the ID registers cpuid.c reports it present whenever that macro is
unset. A directive there would turn a build the assembler correctly rejects
into an image that traps on the first sqrdmlsh, so the mnemonic is left to
answer to -mcpu.
pull/11401/head
parent
4d9882bf56
commit
70d28ef42e
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@ -9765,6 +9765,7 @@ L_sha3_aarch64_r:
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.quad 0x8000000080008081,0x8000000000008080
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.quad 0x0000000080000001,0x8000000080008008
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#ifdef WOLFSSL_ARMASM_CRYPTO_SHA3
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.arch_extension sha3
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#ifndef __APPLE__
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.text
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.globl mlkem_sha3_blocksx3_crypto
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@ -9216,6 +9216,7 @@ L_sha3_aarch64_r
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DCQ 0x8000000080008081, 0x8000000000008080
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DCQ 0x0000000080000001, 0x8000000080008008
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IF :DEF:WOLFSSL_ARMASM_CRYPTO_SHA3
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; .arch_extension sha3
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AREA |.text|, CODE, READONLY
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ALIGN 4
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EXPORT mlkem_sha3_blocksx3_crypto
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@ -9124,6 +9124,7 @@ void mlkem_sha3_blocksx3_crypto(word64* state)
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{
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const word64* r = L_sha3_aarch64_r;
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__asm__ __volatile__ (
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".arch_extension sha3\n\t"
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"stp x29, x30, [sp, #-64]!\n\t"
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"add x29, sp, #0\n\t"
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"str %x[state], [x29, #40]\n\t"
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@ -9423,6 +9424,7 @@ void mlkem_shake128_blocksx3_seed_crypto(word64* state, byte* seed)
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{
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const word64* r = L_sha3_aarch64_r;
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__asm__ __volatile__ (
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".arch_extension sha3\n\t"
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"stp x29, x30, [sp, #-64]!\n\t"
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"add x29, sp, #0\n\t"
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"str %x[state], [x29, #40]\n\t"
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@ -9744,6 +9746,7 @@ void mlkem_shake256_blocksx3_seed_crypto(word64* state, byte* seed)
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{
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const word64* r = L_sha3_aarch64_r;
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__asm__ __volatile__ (
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".arch_extension sha3\n\t"
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"stp x29, x30, [sp, #-64]!\n\t"
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"add x29, sp, #0\n\t"
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"str %x[state], [x29, #40]\n\t"
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