Fix to enable SHA384/SHA512 crypto hardware on STM32H7S.

pull/8584/head
David Garske 2025-03-24 14:30:35 -07:00
parent 93c8d7df0d
commit 8635014249
3 changed files with 13 additions and 11 deletions

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@ -216,14 +216,14 @@ GMAC Table 4-bit 46 MiB took 1.000 seconds, 45.835 MiB/s
CHACHA 32 MiB took 1.000 seconds, 31.519 MiB/s CHACHA 32 MiB took 1.000 seconds, 31.519 MiB/s
CHA-POLY 15 MiB took 1.000 seconds, 15.259 MiB/s CHA-POLY 15 MiB took 1.000 seconds, 15.259 MiB/s
POLY1305 57 MiB took 1.000 seconds, 56.934 MiB/s POLY1305 57 MiB took 1.000 seconds, 56.934 MiB/s
SHA-256 88 MiB took 1.000 seconds, 88.184 MiB/s SHA-256 90 MiB took 1.000 seconds, 90.381 MiB/s
SHA-384 6 MiB took 1.000 seconds, 5.835 MiB/s SHA-384 98 MiB took 1.000 seconds, 97.925 MiB/s
SHA-512 6 MiB took 1.000 seconds, 5.591 MiB/s SHA-512 98 MiB took 1.000 seconds, 97.925 MiB/s
SHA-512/224 6 MiB took 1.000 seconds, 5.615 MiB/s SHA-512/224 98 MiB took 1.000 seconds, 98.120 MiB/s
SHA-512/256 6 MiB took 1.000 seconds, 5.591 MiB/s SHA-512/256 98 MiB took 1.000 seconds, 98.096 MiB/s
HMAC-SHA256 83 MiB took 1.000 seconds, 83.154 MiB/s HMAC-SHA256 71 MiB took 1.000 seconds, 71.265 MiB/s
HMAC-SHA384 6 MiB took 1.000 seconds, 5.518 MiB/s HMAC-SHA384 89 MiB took 1.000 seconds, 88.599 MiB/s
HMAC-SHA512 6 MiB took 1.000 seconds, 5.542 MiB/s HMAC-SHA512 89 MiB took 1.000 seconds, 88.843 MiB/s
RSA 2048 public 352 ops took 1.000 sec, avg 2.841 ms, 352.000 ops/sec RSA 2048 public 352 ops took 1.000 sec, avg 2.841 ms, 352.000 ops/sec
RSA 2048 private 6 ops took 1.008 sec, avg 168.000 ms, 5.952 ops/sec RSA 2048 private 6 ops took 1.008 sec, avg 168.000 ms, 5.952 ops/sec
DH 2048 key gen 15 ops took 1.027 sec, avg 68.467 ms, 14.606 ops/sec DH 2048 key gen 15 ops took 1.027 sec, avg 68.467 ms, 14.606 ops/sec

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@ -8296,7 +8296,7 @@ static WARN_UNUSED_RESULT int wc_AesGcmEncrypt_STM32(
/* Authentication buffer - must be 4-byte multiple zero padded */ /* Authentication buffer - must be 4-byte multiple zero padded */
authPadSz = authInSz % sizeof(word32); authPadSz = authInSz % sizeof(word32);
#if STM_CRYPT_HEADER_TYPE #ifdef WOLFSSL_STM32MP13
/* STM32MP13 HAL at least v1.2 and lower has a bug with which it needs a /* STM32MP13 HAL at least v1.2 and lower has a bug with which it needs a
* minimum of 16 bytes for the auth * minimum of 16 bytes for the auth
*/ */
@ -8842,7 +8842,7 @@ static WARN_UNUSED_RESULT int wc_AesGcmDecrypt_STM32(
authPadSz = authInSz; authPadSz = authInSz;
} }
#if defined(WOLFSSL_STM32MP13) #ifdef WOLFSSL_STM32MP13
/* STM32MP13 HAL at least v1.2 and lower has a bug with which it needs a /* STM32MP13 HAL at least v1.2 and lower has a bug with which it needs a
* minimum of 16 bytes for the auth * minimum of 16 bytes for the auth
*/ */

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@ -42,11 +42,13 @@
#define HASH_CR_SIZE 54 #define HASH_CR_SIZE 54
#define HASH_MAX_DIGEST 32 #define HASH_MAX_DIGEST 32
#endif #endif
#if defined(WOLFSSL_STM32MP13) #if defined(WOLFSSL_STM32MP13) || defined(WOLFSSL_STM32H7S)
#define STM32_HASH_SHA512 #define STM32_HASH_SHA512
#define STM32_HASH_SHA512_224 #define STM32_HASH_SHA512_224
#define STM32_HASH_SHA512_256 #define STM32_HASH_SHA512_256
#define STM32_HASH_SHA384 #define STM32_HASH_SHA384
#endif
#if defined(WOLFSSL_STM32MP13)
#define STM32_HASH_SHA3 #define STM32_HASH_SHA3
#endif #endif
#else #else