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Merge pull request #3536 from SparkiDev/arm64_rev 

ByteReverseWord32 AARCH64: Use proper instruction - REV32
pull/3557/head
toddouska 2020-12-10 11:59:00 -08:00 committed by GitHub
parent ad1118326b d34b0072a2
commit cd3b91a8fe
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 21 additions and 8 deletions
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19
configure.ac
View File

@ -4917,12 +4917,12 @@ if test "$ENABLED_SP_ASM" = "yes"; then
;;
*arm*)
if test $host_alias = "thumb"; then
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_THUMB_ASM -mthumb -march=armv6"
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_THUMB_ASM"
AM_CCASFLAGS="$AM_CCASFLAGS -DWOLFSSL_SP_ARM_THUMB_ASM"
ENABLED_SP_ARM_THUMB_ASM=yes
else
if test $host_alias = "cortex"; then
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_CORTEX_M_ASM -mcpu=cortex-r5"
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_CORTEX_M_ASM"
AM_CCASFLAGS="$AM_CCASFLAGS -DWOLFSSL_SP_ARM_CORTEX_M_ASM"
ENABLED_SP_ARM_CORTEX_ASM=yes
else
@ -5028,10 +5028,10 @@ if test "$ENABLED_SP_MATH_ALL" = "yes"; then
;;
*arm*)
if test $host_alias = "thumb"; then
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_THUMB -mthumb -march=armv6"
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_THUMB"
else
if test $host_alias = "cortex"; then
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_CORTEX_M -mcpu=cortex-m4"
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM_CORTEX_M"
else
AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_SP_ARM32"
fi
@ -5494,6 +5494,17 @@ do
done
AM_CFLAGS=$NEW_AM_CFLAGS])
case $host_cpu in
*arm*)
if test $host_alias = "thumb"; then
AM_CFLAGS="$AM_CFLAGS -mthumb -march=armv6"
else
if test $host_alias = "cortex"; then
AM_CFLAGS="$AM_CFLAGS -mcpu=cortex-r5"
fi
fi
;;
esac
################################################################################
# Check for build-type conflicts #

10
wolfcrypt/src/misc.c
View File

@ -127,16 +127,18 @@ WC_STATIC WC_INLINE word32 ByteReverseWord32(word32 value)
#elif defined(WOLF_ALLOW_BUILTIN) && \
defined(__GNUC_PREREQ) && __GNUC_PREREQ(4, 3)
return (word32)__builtin_bswap32(value);
#elif defined(__arm__) && defined(__GNUC__)
#elif defined(WOLFSSL_BYTESWAP32_ASM) && defined(__GNUC__) && \
defined(__aarch64__)
__asm__ volatile (
"REV %0, %0 \n"
"REV32 %0, %0 \n"
: "+r" (value)
:
);
return value;
#elif defined(__aarch64__) && defined(__GNUC__)
#elif defined(WOLFSSL_BYTESWAP32_ASM) && defined(__GNUC__) && \
(defined(__thumb__) || defined(__arm__))
__asm__ volatile (
"REV %w0, %w0 \n"
"REV %0, %0 \n"
: "+r" (value)
:
);