From cf1f8e14ff657521325b9163eb8ac469384b88f4 Mon Sep 17 00:00:00 2001 From: Sean Parkinson Date: Tue, 15 Apr 2025 17:00:06 +1000 Subject: [PATCH] Various fixes for Aarch64/ARM32/Thumb2 ASM cpuid.c: hwcaps not used. thumb2-*: ldm -> LDM sp_arm32.c: No register assignment, fix sp_*_from_bin sp_armthumb.c: fix sp_*_from_bin sp_cotexm.c: fix line lengths, fix sp_*_from_bin --- wolfcrypt/src/cpuid.c | 1 + wolfcrypt/src/port/arm/thumb2-aes-asm_c.c | 174 +- wolfcrypt/src/port/arm/thumb2-chacha-asm_c.c | 28 +- wolfcrypt/src/port/arm/thumb2-curve25519_c.c | 456 +-- wolfcrypt/src/port/arm/thumb2-mlkem-asm_c.c | 18 +- .../src/port/arm/thumb2-poly1305-asm_c.c | 12 +- wolfcrypt/src/sp_arm32.c | 3361 ++++++++++++++++- wolfcrypt/src/sp_armthumb.c | 42 +- wolfcrypt/src/sp_cortexm.c | 1518 +++++--- 9 files changed, 4540 insertions(+), 1070 deletions(-) diff --git a/wolfcrypt/src/cpuid.c b/wolfcrypt/src/cpuid.c index 072983b6e..30e169593 100644 --- a/wolfcrypt/src/cpuid.c +++ b/wolfcrypt/src/cpuid.c @@ -187,6 +187,7 @@ cpuid_flags |= CPUID_SM4; #endif + (void)hwcaps; cpuid_check = 1; } } diff --git a/wolfcrypt/src/port/arm/thumb2-aes-asm_c.c b/wolfcrypt/src/port/arm/thumb2-aes-asm_c.c index 0be20757e..b3d988a3d 100644 --- a/wolfcrypt/src/port/arm/thumb2-aes-asm_c.c +++ b/wolfcrypt/src/port/arm/thumb2-aes-asm_c.c @@ -229,8 +229,8 @@ void AES_invert_key(unsigned char* ks, word32 rounds) #else "L_AES_invert_key_loop_%=:\n\t" #endif - "ldm %[ks], {r2, r3, r4, r5}\n\t" - "ldm r10, {r6, r7, r8, r9}\n\t" + "LDM %[ks], {r2, r3, r4, r5}\n\t" + "LDM r10, {r6, r7, r8, r9}\n\t" "STM r10, {r2, r3, r4, r5}\n\t" "STM %[ks]!, {r6, r7, r8, r9}\n\t" "SUBS r11, r11, #0x2\n\t" @@ -251,7 +251,7 @@ void AES_invert_key(unsigned char* ks, word32 rounds) #else "L_AES_invert_key_mix_loop_%=:\n\t" #endif - "ldm %[ks], {r2, r3, r4, r5}\n\t" + "LDM %[ks], {r2, r3, r4, r5}\n\t" "UBFX r6, r2, #0, #8\n\t" "UBFX r7, r2, #8, #8\n\t" "UBFX r8, r2, #16, #8\n\t" @@ -424,9 +424,9 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r7, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r4, r4, r3\n\t" - "ldm lr!, {r3}\n\t" + "LDM lr!, {r3}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -446,7 +446,7 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r3, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -473,9 +473,9 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r7, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r4, r4, r3\n\t" - "ldm lr!, {r3}\n\t" + "LDM lr!, {r3}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -529,9 +529,9 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r9, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7, r8, r9}\n\t" "EOR r4, r4, r3\n\t" - "ldm lr!, {r3}\n\t" + "LDM lr!, {r3}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -558,9 +558,9 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r9, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7, r8, r9}\n\t" "EOR r4, r4, r3\n\t" - "ldm lr!, {r3}\n\t" + "LDM lr!, {r3}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -606,9 +606,9 @@ void AES_set_encrypt_key(const unsigned char* key, word32 len, "EOR r3, r7, r4, LSL #8\n\t" "EOR r3, r3, r5, LSL #16\n\t" "EOR r3, r3, r6, LSL #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r4, r4, r3\n\t" - "ldm lr!, {r3}\n\t" + "LDM lr!, {r3}\n\t" "EOR r4, r4, r3\n\t" "EOR r5, r5, r4\n\t" "EOR r6, r6, r5\n\t" @@ -700,7 +700,7 @@ void AES_encrypt_block(const word32* te, int nr, int len, const word32* ks) "LDR r11, [%[te], r11, LSL #2]\n\t" "LDR r2, [%[te], r2, LSL #2]\n\t" "EOR lr, lr, r6, ROR #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r11, r11, lr, ROR #24\n\t" "EOR r11, r11, r2, ROR #8\n\t" /* XOR in Key Schedule */ @@ -750,7 +750,7 @@ void AES_encrypt_block(const word32* te, int nr, int len, const word32* ks) "LDR r7, [%[te], r7, LSL #2]\n\t" "LDR r2, [%[te], r2, LSL #2]\n\t" "EOR lr, lr, r10, ROR #24\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "EOR r7, r7, lr, ROR #24\n\t" "EOR r7, r7, r2, ROR #8\n\t" /* XOR in Key Schedule */ @@ -808,7 +808,7 @@ void AES_encrypt_block(const word32* te, int nr, int len, const word32* ks) "LDR r11, [%[te], r11, LSL #2]\n\t" "LDR r2, [%[te], r2, LSL #2]\n\t" "EOR lr, lr, r6, ROR #24\n\t" - "ldm %[ks]!, {r4, r5, r6, r7}\n\t" + "LDM %[ks]!, {r4, r5, r6, r7}\n\t" "EOR r11, r11, lr, ROR #24\n\t" "EOR r11, r11, r2, ROR #8\n\t" /* XOR in Key Schedule */ @@ -858,7 +858,7 @@ void AES_encrypt_block(const word32* te, int nr, int len, const word32* ks) "LDRB lr, [%[te], lr, LSL #2]\n\t" "LDRB r2, [%[te], r2, LSL #2]\n\t" "EOR lr, lr, r11, LSL #16\n\t" - "ldm %[ks], {r8, r9, r10, r11}\n\t" + "LDM %[ks], {r8, r9, r10, r11}\n\t" "EOR r7, r7, lr, LSL #8\n\t" "EOR r7, r7, r2, LSL #16\n\t" /* XOR in Key Schedule */ @@ -945,7 +945,7 @@ void AES_ECB_encrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1001,7 +1001,7 @@ void AES_ECB_encrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1057,7 +1057,7 @@ void AES_ECB_encrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1143,7 +1143,7 @@ void AES_CBC_encrypt(const unsigned char* in, unsigned char* out, #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ "MOV lr, %[in]\n\t" "MOV r0, %[L_AES_Thumb2_te_ecb]\n\t" - "ldm r9, {r4, r5, r6, r7}\n\t" + "LDM r9, {r4, r5, r6, r7}\n\t" "PUSH {%[ks], r9}\n\t" "CMP r8, #0xa\n\t" #if defined(__GNUC__) @@ -1176,7 +1176,7 @@ void AES_CBC_encrypt(const unsigned char* in, unsigned char* out, "EOR r6, r6, r10\n\t" "EOR r7, r7, r11\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -1236,7 +1236,7 @@ void AES_CBC_encrypt(const unsigned char* in, unsigned char* out, "EOR r6, r6, r10\n\t" "EOR r7, r7, r11\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -1296,7 +1296,7 @@ void AES_CBC_encrypt(const unsigned char* in, unsigned char* out, "EOR r6, r6, r10\n\t" "EOR r7, r7, r11\n\t" "PUSH {r1, %[len], lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -1387,7 +1387,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ "MOV lr, %[in]\n\t" "MOV r0, %[L_AES_Thumb2_te_ecb]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -1423,7 +1423,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "ADCS r9, r5, #0x0\n\t" "ADC r8, r4, #0x0\n\t" "STM lr, {r8, r9, r10, r11}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1450,7 +1450,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" @@ -1487,7 +1487,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "ADCS r9, r5, #0x0\n\t" "ADC r8, r4, #0x0\n\t" "STM lr, {r8, r9, r10, r11}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1514,7 +1514,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" @@ -1551,7 +1551,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "ADCS r9, r5, #0x0\n\t" "ADC r8, r4, #0x0\n\t" "STM lr, {r8, r9, r10, r11}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -1578,7 +1578,7 @@ void AES_CTR_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" @@ -1675,7 +1675,7 @@ void AES_decrypt_block(const word32* td, int nr, const byte* td4) "LDR r11, [%[td], r11, LSL #2]\n\t" "LDR lr, [%[td], lr, LSL #2]\n\t" "EOR r12, r12, r4, ROR #24\n\t" - "ldm r3!, {r4, r5, r6, r7}\n\t" + "LDM r3!, {r4, r5, r6, r7}\n\t" "EOR r11, r11, lr, ROR #8\n\t" "EOR r11, r11, r12, ROR #24\n\t" /* XOR in Key Schedule */ @@ -1725,7 +1725,7 @@ void AES_decrypt_block(const word32* td, int nr, const byte* td4) "LDR r7, [%[td], r7, LSL #2]\n\t" "LDR lr, [%[td], lr, LSL #2]\n\t" "EOR r12, r12, r8, ROR #24\n\t" - "ldm r3!, {r8, r9, r10, r11}\n\t" + "LDM r3!, {r8, r9, r10, r11}\n\t" "EOR r7, r7, lr, ROR #8\n\t" "EOR r7, r7, r12, ROR #24\n\t" /* XOR in Key Schedule */ @@ -1783,7 +1783,7 @@ void AES_decrypt_block(const word32* td, int nr, const byte* td4) "LDR r11, [%[td], r11, LSL #2]\n\t" "LDR lr, [%[td], lr, LSL #2]\n\t" "EOR r12, r12, r4, ROR #24\n\t" - "ldm r3!, {r4, r5, r6, r7}\n\t" + "LDM r3!, {r4, r5, r6, r7}\n\t" "EOR r11, r11, lr, ROR #8\n\t" "EOR r11, r11, r12, ROR #24\n\t" /* XOR in Key Schedule */ @@ -1833,7 +1833,7 @@ void AES_decrypt_block(const word32* td, int nr, const byte* td4) "LDRB r7, [%[td4], r7]\n\t" "LDRB lr, [%[td4], lr]\n\t" "EOR r12, r12, r11, LSL #16\n\t" - "ldm r3, {r8, r9, r10, r11}\n\t" + "LDM r3, {r8, r9, r10, r11}\n\t" "EOR r7, r7, r12, LSL #8\n\t" "EOR r7, r7, lr, LSL #16\n\t" /* XOR in Key Schedule */ @@ -1956,7 +1956,7 @@ void AES_ECB_decrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[ks], r12, lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -2011,7 +2011,7 @@ void AES_ECB_decrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[ks], r12, lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -2066,7 +2066,7 @@ void AES_ECB_decrypt(const unsigned char* in, unsigned char* out, "REV r6, r6\n\t" "REV r7, r7\n\t" "PUSH {r1, %[ks], r12, lr}\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" "EOR r5, r5, r9\n\t" @@ -2188,7 +2188,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr, #16]\n\t" "STRD r6, r7, [lr, #24]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2205,7 +2205,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "REV r5, r5\n\t" "REV r6, r6\n\t" "REV r7, r7\n\t" - "ldm lr, {r8, r9, r10, r11}\n\t" + "LDM lr, {r8, r9, r10, r11}\n\t" "POP {r1, r12, lr}\n\t" "LDR %[ks], [sp]\n\t" "EOR r4, r4, r8\n\t" @@ -2234,7 +2234,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr]\n\t" "STRD r6, r7, [lr, #8]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2294,7 +2294,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr, #16]\n\t" "STRD r6, r7, [lr, #24]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2311,7 +2311,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "REV r5, r5\n\t" "REV r6, r6\n\t" "REV r7, r7\n\t" - "ldm lr, {r8, r9, r10, r11}\n\t" + "LDM lr, {r8, r9, r10, r11}\n\t" "POP {r1, r12, lr}\n\t" "LDR %[ks], [sp]\n\t" "EOR r4, r4, r8\n\t" @@ -2340,7 +2340,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr]\n\t" "STRD r6, r7, [lr, #8]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2400,7 +2400,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr, #16]\n\t" "STRD r6, r7, [lr, #24]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2417,7 +2417,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "REV r5, r5\n\t" "REV r6, r6\n\t" "REV r7, r7\n\t" - "ldm lr, {r8, r9, r10, r11}\n\t" + "LDM lr, {r8, r9, r10, r11}\n\t" "POP {r1, r12, lr}\n\t" "LDR %[ks], [sp]\n\t" "EOR r4, r4, r8\n\t" @@ -2446,7 +2446,7 @@ void AES_CBC_decrypt(const unsigned char* in, unsigned char* out, "LDR lr, [sp, #16]\n\t" "STRD r4, r5, [lr]\n\t" "STRD r6, r7, [lr, #8]\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -2570,7 +2570,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "LSR %[len], r12, #24\n\t" "AND %[len], %[len], #0xf\n\t" "ADD %[len], %[m], %[len], LSL #4\n\t" - "ldm %[len], {r8, r9, r10, r11}\n\t" + "LDM %[len], {r8, r9, r10, r11}\n\t" "LSR r6, r10, #4\n\t" "AND %[len], r11, #0xf\n\t" "LSR r11, r11, #4\n\t" @@ -2580,7 +2580,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2597,7 +2597,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2614,7 +2614,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2631,7 +2631,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2648,7 +2648,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2664,7 +2664,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2681,7 +2681,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2703,7 +2703,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "LSR %[len], r12, #24\n\t" "AND %[len], %[len], #0xf\n\t" "ADD %[len], %[m], %[len], LSL #4\n\t" - "ldm %[len], {r4, r5, r6, r7}\n\t" + "LDM %[len], {r4, r5, r6, r7}\n\t" "EOR r8, r8, r4\n\t" "EOR r9, r9, r5\n\t" "EOR r10, r10, r6\n\t" @@ -2717,7 +2717,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2734,7 +2734,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2751,7 +2751,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2768,7 +2768,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2785,7 +2785,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2801,7 +2801,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2818,7 +2818,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2840,7 +2840,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "LSR %[len], r12, #24\n\t" "AND %[len], %[len], #0xf\n\t" "ADD %[len], %[m], %[len], LSL #4\n\t" - "ldm %[len], {r4, r5, r6, r7}\n\t" + "LDM %[len], {r4, r5, r6, r7}\n\t" "EOR r8, r8, r4\n\t" "EOR r9, r9, r5\n\t" "EOR r10, r10, r6\n\t" @@ -2854,7 +2854,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2871,7 +2871,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2888,7 +2888,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2905,7 +2905,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2922,7 +2922,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2938,7 +2938,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2955,7 +2955,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -2977,7 +2977,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "LSR %[len], r12, #24\n\t" "AND %[len], %[len], #0xf\n\t" "ADD %[len], %[m], %[len], LSL #4\n\t" - "ldm %[len], {r4, r5, r6, r7}\n\t" + "LDM %[len], {r4, r5, r6, r7}\n\t" "EOR r8, r8, r4\n\t" "EOR r9, r9, r5\n\t" "EOR r10, r10, r6\n\t" @@ -2991,7 +2991,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3008,7 +3008,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3025,7 +3025,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3042,7 +3042,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3059,7 +3059,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3075,7 +3075,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3092,7 +3092,7 @@ void GCM_gmult_len(unsigned char* x, const unsigned char** m, "ADD r4, %[m], r4, LSL #4\n\t" "EOR r10, r6, r9, LSL #28\n\t" "LSR r9, r9, #4\n\t" - "ldm r4, {r4, r5, r6, r7}\n\t" + "LDM r4, {r4, r5, r6, r7}\n\t" "EOR r9, r9, r8, LSL #28\n\t" "EOR r8, %[len], r8, LSR #4\n\t" "EOR r8, r8, r4\n\t" @@ -3164,7 +3164,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ "MOV lr, %[in]\n\t" "MOV r0, %[L_AES_Thumb2_te_gcm]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "REV r4, r4\n\t" "REV r5, r5\n\t" "REV r6, r6\n\t" @@ -3196,7 +3196,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "PUSH {r1, %[len], lr}\n\t" "LDR lr, [sp, #16]\n\t" "ADD r7, r7, #0x1\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "STR r7, [lr, #12]\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" @@ -3224,7 +3224,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" @@ -3257,7 +3257,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "PUSH {r1, %[len], lr}\n\t" "LDR lr, [sp, #16]\n\t" "ADD r7, r7, #0x1\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "STR r7, [lr, #12]\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" @@ -3285,7 +3285,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" @@ -3318,7 +3318,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "PUSH {r1, %[len], lr}\n\t" "LDR lr, [sp, #16]\n\t" "ADD r7, r7, #0x1\n\t" - "ldm %[ks]!, {r8, r9, r10, r11}\n\t" + "LDM %[ks]!, {r8, r9, r10, r11}\n\t" "STR r7, [lr, #12]\n\t" /* Round: 0 - XOR in key schedule */ "EOR r4, r4, r8\n\t" @@ -3346,7 +3346,7 @@ void AES_GCM_encrypt(const unsigned char* in, unsigned char* out, "STR r5, [%[out], #4]\n\t" "STR r6, [%[out], #8]\n\t" "STR r7, [%[out], #12]\n\t" - "ldm r8, {r4, r5, r6, r7}\n\t" + "LDM r8, {r4, r5, r6, r7}\n\t" "SUBS %[len], %[len], #0x10\n\t" "ADD lr, lr, #0x10\n\t" "ADD %[out], %[out], #0x10\n\t" diff --git a/wolfcrypt/src/port/arm/thumb2-chacha-asm_c.c b/wolfcrypt/src/port/arm/thumb2-chacha-asm_c.c index fd10ca42f..e5762456d 100644 --- a/wolfcrypt/src/port/arm/thumb2-chacha-asm_c.c +++ b/wolfcrypt/src/port/arm/thumb2-chacha-asm_c.c @@ -103,7 +103,7 @@ void wc_chacha_setkey(word32* x, const byte* key, word32 keySz) "SUBS %[keySz], %[keySz], #0x10\n\t" "ADD r7, r7, %[keySz]\n\t" /* Start state with constants */ - "ldm r7, {r3, r4, r5, r6}\n\t" + "LDM r7, {r3, r4, r5, r6}\n\t" "STM %[x]!, {r3, r4, r5, r6}\n\t" /* Next is first 16 bytes of key. */ "LDR r3, [%[key]]\n\t" @@ -176,7 +176,7 @@ void wc_chacha_crypt_bytes(ChaCha* ctx, byte* c, const byte* m, word32 len) "STRD r4, r5, [sp, #16]\n\t" "STRD r6, r7, [sp, #24]\n\t" /* Load x[0]..x[12] into registers. */ - "ldm lr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12}\n\t" + "LDM lr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12}\n\t" /* 10x 2 full rounds to perform. */ "MOV lr, #0xa\n\t" "STR lr, [sp, #48]\n\t" @@ -315,35 +315,35 @@ void wc_chacha_crypt_bytes(ChaCha* ctx, byte* c, const byte* m, word32 len) "LDR lr, [sp, #32]\n\t" "MOV r12, sp\n\t" /* Add in original state */ - "ldm lr!, {r8, r9, r10, r11}\n\t" + "LDM lr!, {r8, r9, r10, r11}\n\t" "ADD %[ctx], %[ctx], r8\n\t" "ADD %[c], %[c], r9\n\t" "ADD %[m], %[m], r10\n\t" "ADD %[len], %[len], r11\n\t" - "ldm lr!, {r8, r9, r10, r11}\n\t" + "LDM lr!, {r8, r9, r10, r11}\n\t" "ADD r4, r4, r8\n\t" "ADD r5, r5, r9\n\t" "ADD r6, r6, r10\n\t" "ADD r7, r7, r11\n\t" - "ldm r12, {r8, r9}\n\t" - "ldm lr!, {r10, r11}\n\t" + "LDM r12, {r8, r9}\n\t" + "LDM lr!, {r10, r11}\n\t" "ADD r8, r8, r10\n\t" "ADD r9, r9, r11\n\t" "STM r12!, {r8, r9}\n\t" - "ldm r12, {r8, r9}\n\t" - "ldm lr!, {r10, r11}\n\t" + "LDM r12, {r8, r9}\n\t" + "LDM lr!, {r10, r11}\n\t" "ADD r8, r8, r10\n\t" "ADD r9, r9, r11\n\t" "STM r12!, {r8, r9}\n\t" - "ldm r12, {r8, r9}\n\t" - "ldm lr!, {r10, r11}\n\t" + "LDM r12, {r8, r9}\n\t" + "LDM lr!, {r10, r11}\n\t" "ADD r8, r8, r10\n\t" "ADD r9, r9, r11\n\t" "ADD r10, r10, #0x1\n\t" "STM r12!, {r8, r9}\n\t" "STR r10, [lr, #-8]\n\t" - "ldm r12, {r8, r9}\n\t" - "ldm lr, {r10, r11}\n\t" + "LDM r12, {r8, r9}\n\t" + "LDM lr, {r10, r11}\n\t" "ADD r8, r8, r10\n\t" "ADD r9, r9, r11\n\t" "STM r12, {r8, r9}\n\t" @@ -447,7 +447,7 @@ void wc_chacha_crypt_bytes(ChaCha* ctx, byte* c, const byte* m, word32 len) "LDR lr, [sp, #32]\n\t" "ADD r12, lr, #0x44\n\t" "STM r12!, {%[ctx], %[c], %[m], %[len], r4, r5, r6, r7}\n\t" - "ldm sp, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" + "LDM sp, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" "STM r12, {%[ctx], %[c], %[m], %[len], r4, r5, r6, r7}\n\t" "LDRD %[m], %[len], [sp, #40]\n\t" "LDR %[c], [sp, #36]\n\t" @@ -469,7 +469,7 @@ void wc_chacha_crypt_bytes(ChaCha* ctx, byte* c, const byte* m, word32 len) "BLT.N L_chacha_thumb2_crypt_word_loop_%=\n\t" #endif /* 16 bytes of state XORed into message. */ - "ldm lr!, {r4, r5, r6, r7}\n\t" + "LDM lr!, {r4, r5, r6, r7}\n\t" "LDR r8, [%[m]]\n\t" "LDR r9, [%[m], #4]\n\t" "LDR r10, [%[m], #8]\n\t" diff --git a/wolfcrypt/src/port/arm/thumb2-curve25519_c.c b/wolfcrypt/src/port/arm/thumb2-curve25519_c.c index 5c96b91a2..734714d2d 100644 --- a/wolfcrypt/src/port/arm/thumb2-curve25519_c.c +++ b/wolfcrypt/src/port/arm/thumb2-curve25519_c.c @@ -153,7 +153,7 @@ void fe_add_sub_op() /* Add -modulus on underflow */ "MOV lr, #0x13\n\t" "AND lr, lr, r11, ASR #31\n\t" - "ldm r1, {r4, r5, r6, r7, r8, r9}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9}\n\t" "SUBS r4, r4, lr\n\t" "SBCS r5, r5, #0x0\n\t" "SBCS r6, r6, #0x0\n\t" @@ -182,13 +182,13 @@ void fe_sub_op() #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* Sub */ - "ldm r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t" - "ldm r1!, {r2, r3, r4, r5}\n\t" + "LDM r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t" + "LDM r1!, {r2, r3, r4, r5}\n\t" "SUBS r6, r2, r6\n\t" "SBCS r7, r3, r7\n\t" "SBCS r8, r4, r8\n\t" "SBCS r9, r5, r9\n\t" - "ldm r1!, {r2, r3, r4, r5}\n\t" + "LDM r1!, {r2, r3, r4, r5}\n\t" "SBCS r10, r2, r10\n\t" "SBCS r11, r3, r11\n\t" "SBCS r12, r4, r12\n\t" @@ -244,13 +244,13 @@ void fe_add_op() #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* Add */ - "ldm r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t" - "ldm r1!, {r2, r3, r4, r5}\n\t" + "LDM r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t" + "LDM r1!, {r2, r3, r4, r5}\n\t" "ADDS r6, r2, r6\n\t" "ADCS r7, r3, r7\n\t" "ADCS r8, r4, r8\n\t" "ADCS r9, r5, r9\n\t" - "ldm r1!, {r2, r3, r4, r5}\n\t" + "LDM r1!, {r2, r3, r4, r5}\n\t" "ADCS r10, r2, r10\n\t" "ADCS r11, r3, r11\n\t" "ADCS r12, r4, r12\n\t" @@ -344,7 +344,7 @@ void fe_tobytes(unsigned char* out, const fe n) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( - "ldm %[n], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[n], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "ADDS r10, r2, #0x13\n\t" "ADCS r10, r3, #0x0\n\t" "ADCS r10, r4, #0x0\n\t" @@ -473,14 +473,14 @@ void fe_neg(fe r, const fe a) __asm__ __volatile__ ( "MVN r7, #0x0\n\t" "MVN r6, #0x12\n\t" - "ldm %[a]!, {r2, r3, r4, r5}\n\t" + "LDM %[a]!, {r2, r3, r4, r5}\n\t" "SUBS r2, r6, r2\n\t" "SBCS r3, r7, r3\n\t" "SBCS r4, r7, r4\n\t" "SBCS r5, r7, r5\n\t" "STM %[r]!, {r2, r3, r4, r5}\n\t" "MVN r6, #0x80000000\n\t" - "ldm %[a]!, {r2, r3, r4, r5}\n\t" + "LDM %[a]!, {r2, r3, r4, r5}\n\t" "SBCS r2, r7, r2\n\t" "SBCS r3, r7, r3\n\t" "SBCS r4, r7, r4\n\t" @@ -503,7 +503,7 @@ int fe_isnonzero(const fe a) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( - "ldm %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "ADDS r1, r2, #0x13\n\t" "ADCS r1, r3, #0x0\n\t" "ADCS r1, r4, #0x0\n\t" @@ -549,12 +549,12 @@ int fe_isnegative(const fe a) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( - "ldm %[a]!, {r2, r3, r4, r5}\n\t" + "LDM %[a]!, {r2, r3, r4, r5}\n\t" "ADDS r1, r2, #0x13\n\t" "ADCS r1, r3, #0x0\n\t" "ADCS r1, r4, #0x0\n\t" "ADCS r1, r5, #0x0\n\t" - "ldm %[a], {r2, r3, r4, r5}\n\t" + "LDM %[a], {r2, r3, r4, r5}\n\t" "ADCS r1, r2, #0x0\n\t" "ADCS r1, r3, #0x0\n\t" "ADCS r1, r4, #0x0\n\t" @@ -1581,7 +1581,7 @@ void fe_cmov_table(fe* r, fe* base, signed char b) "MOV r12, #0x60\n\t" "MUL %[b], %[b], r12\n\t" "ADD %[base], %[base], %[b]\n\t" - "ldm %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r6, r6, lr\n\t" @@ -1597,7 +1597,7 @@ void fe_cmov_table(fe* r, fe* base, signed char b) "ADD %[r], %[r], r12\n\t" "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "SUB %[r], %[r], r12\n\t" - "ldm %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r6, r6, lr\n\t" @@ -1614,7 +1614,7 @@ void fe_cmov_table(fe* r, fe* base, signed char b) "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "SUB %[r], %[r], r12\n\t" "ADD %[r], %[r], #0x40\n\t" - "ldm %[base]!, {r4, r5, r6, r7}\n\t" + "LDM %[base]!, {r4, r5, r6, r7}\n\t" "MVN r12, #0x12\n\t" "SUBS r8, r12, r4\n\t" "SBCS r9, r3, r5\n\t" @@ -1637,7 +1637,7 @@ void fe_cmov_table(fe* r, fe* base, signed char b) "AND r6, r6, lr\n\t" "AND r7, r7, lr\n\t" "STM %[r]!, {r4, r5, r6, r7}\n\t" - "ldm %[base]!, {r4, r5, r6, r7}\n\t" + "LDM %[base]!, {r4, r5, r6, r7}\n\t" "MVN r12, #0x80000000\n\t" "SBCS r8, r3, r4\n\t" "SBCS r9, r3, r5\n\t" @@ -2019,7 +2019,7 @@ void fe_mul_op() "LSL r11, r11, #1\n\t" "ORR r11, r11, r10, LSR #31\n\t" "MUL r11, r11, r12\n\t" - "ldm lr!, {r1, r2}\n\t" + "LDM lr!, {r1, r2}\n\t" "MOV r12, #0x26\n\t" "ADDS r1, r1, r11\n\t" "ADC r11, r0, #0x0\n\t" @@ -2027,21 +2027,21 @@ void fe_mul_op() "ADDS r2, r2, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r2, r11, r4, r12\n\t" - "ldm lr!, {r3, r4}\n\t" + "LDM lr!, {r3, r4}\n\t" "ADDS r3, r3, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r3, r11, r5, r12\n\t" "ADDS r4, r4, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r4, r11, r6, r12\n\t" - "ldm lr!, {r5, r6}\n\t" + "LDM lr!, {r5, r6}\n\t" "ADDS r5, r5, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r5, r11, r7, r12\n\t" "ADDS r6, r6, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r6, r11, r8, r12\n\t" - "ldm lr!, {r7, r8}\n\t" + "LDM lr!, {r7, r8}\n\t" "ADDS r7, r7, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r7, r11, r9, r12\n\t" @@ -2071,8 +2071,8 @@ void fe_mul_op() "SUB sp, sp, #0x2c\n\t" "STRD r0, r1, [sp, #36]\n\t" "MOV lr, r2\n\t" - "ldm r1, {r0, r1, r2, r3}\n\t" - "ldm lr!, {r4, r5, r6}\n\t" + "LDM r1, {r0, r1, r2, r3}\n\t" + "LDM lr!, {r4, r5, r6}\n\t" "UMULL r10, r11, r0, r4\n\t" "UMULL r12, r7, r1, r4\n\t" "UMAAL r11, r12, r0, r5\n\t" @@ -2082,7 +2082,7 @@ void fe_mul_op() "UMAAL r8, r9, r3, r4\n\t" "STM sp, {r10, r11, r12}\n\t" "UMAAL r7, r8, r2, r5\n\t" - "ldm lr!, {r4}\n\t" + "LDM lr!, {r4}\n\t" "UMULL r10, r11, r1, r6\n\t" "UMAAL r8, r9, r2, r6\n\t" "UMAAL r7, r10, r0, r4\n\t" @@ -2092,7 +2092,7 @@ void fe_mul_op() "UMAAL r9, r11, r3, r6\n\t" "UMAAL r9, r10, r2, r4\n\t" "UMAAL r10, r11, r3, r4\n\t" - "ldm lr, {r4, r5, r6, r7}\n\t" + "LDM lr, {r4, r5, r6, r7}\n\t" "MOV r12, #0x0\n\t" "UMLAL r8, r12, r0, r4\n\t" "UMAAL r9, r12, r1, r4\n\t" @@ -2116,48 +2116,48 @@ void fe_mul_op() "UMAAL r4, r6, r2, r7\n\t" "SUB lr, lr, #0x10\n\t" "UMAAL r5, r6, r3, r7\n\t" - "ldm r0, {r0, r1, r2, r3}\n\t" + "LDM r0, {r0, r1, r2, r3}\n\t" "STR r6, [sp, #32]\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r7, #0x0\n\t" "UMLAL r8, r7, r0, r6\n\t" "UMAAL r9, r7, r1, r6\n\t" "STR r8, [sp, #16]\n\t" "UMAAL r10, r7, r2, r6\n\t" "UMAAL r11, r7, r3, r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r8, #0x0\n\t" "UMLAL r9, r8, r0, r6\n\t" "UMAAL r10, r8, r1, r6\n\t" "STR r9, [sp, #20]\n\t" "UMAAL r11, r8, r2, r6\n\t" "UMAAL r12, r8, r3, r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r9, #0x0\n\t" "UMLAL r10, r9, r0, r6\n\t" "UMAAL r11, r9, r1, r6\n\t" "STR r10, [sp, #24]\n\t" "UMAAL r12, r9, r2, r6\n\t" "UMAAL r4, r9, r3, r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r10, #0x0\n\t" "UMLAL r11, r10, r0, r6\n\t" "UMAAL r12, r10, r1, r6\n\t" "STR r11, [sp, #28]\n\t" "UMAAL r4, r10, r2, r6\n\t" "UMAAL r5, r10, r3, r6\n\t" - "ldm lr!, {r11}\n\t" + "LDM lr!, {r11}\n\t" "UMAAL r12, r7, r0, r11\n\t" "UMAAL r4, r7, r1, r11\n\t" "LDR r6, [sp, #32]\n\t" "UMAAL r5, r7, r2, r11\n\t" "UMAAL r6, r7, r3, r11\n\t" - "ldm lr!, {r11}\n\t" + "LDM lr!, {r11}\n\t" "UMAAL r4, r8, r0, r11\n\t" "UMAAL r5, r8, r1, r11\n\t" "UMAAL r6, r8, r2, r11\n\t" "UMAAL r7, r8, r3, r11\n\t" - "ldm lr, {r11, lr}\n\t" + "LDM lr, {r11, lr}\n\t" "UMAAL r5, r9, r0, r11\n\t" "UMAAL r6, r10, r0, lr\n\t" "UMAAL r6, r9, r1, r11\n\t" @@ -2380,7 +2380,7 @@ void fe_sq_op() "ADD lr, sp, #0x20\n\t" "STM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" "ADD lr, sp, #0x4\n\t" - "ldm lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -2389,7 +2389,7 @@ void fe_sq_op() "ADCS r9, r9, r9\n\t" "ADCS r10, r10, r10\n\t" "STM lr!, {r4, r5, r6, r7, r8, r9, r10}\n\t" - "ldm lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" "ADCS r3, r3, r3\n\t" "ADCS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" @@ -2400,7 +2400,7 @@ void fe_sq_op() "ADC r10, r0, #0x0\n\t" "STM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "ADD lr, sp, #0x4\n\t" - "ldm lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" "MOV lr, sp\n\t" /* A[0] * A[0] */ "LDR r12, [r1]\n\t" @@ -2425,7 +2425,7 @@ void fe_sq_op() "UMLAL r9, r11, r12, r12\n\t" "ADDS r10, r10, r11\n\t" "STM lr!, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" - "ldm lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" /* A[4] * A[4] */ "LDR r12, [r1, #16]\n\t" "ADCS r3, r3, #0x0\n\t" @@ -2460,7 +2460,7 @@ void fe_sq_op() "LSL r11, r11, #1\n\t" "ORR r11, r11, r10, LSR #31\n\t" "MUL r11, r11, r12\n\t" - "ldm lr!, {r1, r2}\n\t" + "LDM lr!, {r1, r2}\n\t" "MOV r12, #0x26\n\t" "ADDS r1, r1, r11\n\t" "ADC r11, r0, #0x0\n\t" @@ -2468,21 +2468,21 @@ void fe_sq_op() "ADDS r2, r2, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r2, r11, r4, r12\n\t" - "ldm lr!, {r3, r4}\n\t" + "LDM lr!, {r3, r4}\n\t" "ADDS r3, r3, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r3, r11, r5, r12\n\t" "ADDS r4, r4, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r4, r11, r6, r12\n\t" - "ldm lr!, {r5, r6}\n\t" + "LDM lr!, {r5, r6}\n\t" "ADDS r5, r5, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r5, r11, r7, r12\n\t" "ADDS r6, r6, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r6, r11, r8, r12\n\t" - "ldm lr!, {r7, r8}\n\t" + "LDM lr!, {r7, r8}\n\t" "ADDS r7, r7, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r7, r11, r9, r12\n\t" @@ -2511,7 +2511,7 @@ void fe_sq_op() __asm__ __volatile__ ( "SUB sp, sp, #0x20\n\t" "STR r0, [sp, #28]\n\t" - "ldm r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" + "LDM r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" /* Square */ "UMULL r9, r10, r0, r0\n\t" "UMULL r11, r12, r0, r1\n\t" @@ -2660,7 +2660,7 @@ void fe_mul121666(fe r, fe a) __asm__ __volatile__ ( /* Multiply by 121666 */ - "ldm %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "MOV r12, #0xdb42\n\t" "MOVT r12, #0x1\n\t" "UMULL r2, r10, r2, r12\n\t" @@ -2720,7 +2720,7 @@ void fe_mul121666(fe r, fe a) __asm__ __volatile__ ( /* Multiply by 121666 */ - "ldm %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "MOV r11, #0xdb42\n\t" "MOVT r11, #0x1\n\t" "UMULL r2, r12, r2, r11\n\t" @@ -2790,7 +2790,7 @@ int curve25519(byte* r, const byte* n, const byte* a) "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADD r3, sp, #0x40\n\t" /* Copy */ - "ldm r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "MOV %[n], #0x1e\n\t" "STR %[n], [sp, #180]\n\t" @@ -2822,8 +2822,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "RSB %[n], %[n], #0x0\n\t" "MOV r3, r0\n\t" "ADD r12, sp, #0x40\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2834,8 +2834,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2846,8 +2846,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2858,8 +2858,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2875,8 +2875,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "RSB %[n], %[n], #0x0\n\t" "MOV r3, sp\n\t" "ADD r12, sp, #0x20\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2887,8 +2887,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2899,8 +2899,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -2911,8 +2911,8 @@ int curve25519(byte* r, const byte* n, const byte* a) "EOR r7, r7, r9\n\t" "STM r3!, {r4, r5}\n\t" "STM r12!, {r6, r7}\n\t" - "ldm r3, {r4, r5}\n\t" - "ldm r12, {r6, r7}\n\t" + "LDM r3, {r4, r5}\n\t" + "LDM r12, {r6, r7}\n\t" "EOR r8, r4, r6\n\t" "EOR r9, r5, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -3292,7 +3292,7 @@ int curve25519(byte* r, const byte* n, const byte* a) "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADD r3, sp, #0x40\n\t" /* Copy */ - "ldm r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "MOV %[a], #0xfe\n\t" "\n" @@ -3314,7 +3314,7 @@ int curve25519(byte* r, const byte* n, const byte* a) "STR %[a], [sp, #164]\n\t" /* Conditional Swap */ "ADD r11, sp, #0xb0\n\t" - "ldm r11, {r4, r5, r6, r7}\n\t" + "LDM r11, {r4, r5, r6, r7}\n\t" "EOR r8, r4, r5\n\t" "EOR r9, r6, r7\n\t" "AND r8, r8, %[n]\n\t" @@ -3395,7 +3395,7 @@ int curve25519(byte* r, const byte* n, const byte* a) /* Cycle Count: 166 */ "LDR %[n], [sp, #184]\n\t" /* Copy */ - "ldm r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "STM sp, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" /* Invert */ "ADD r1, sp, #0x0\n\t" @@ -3635,7 +3635,7 @@ int curve25519(byte* r, const byte* n, const byte* a) "BL fe_mul_op\n\t" /* Ensure result is less than modulus */ "LDR %[r], [sp, #176]\n\t" - "ldm %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "MOV %[a], #0x13\n\t" "AND %[a], %[a], r11, ASR #31\n\t" "ADDS r4, r4, %[a]\n\t" @@ -4081,7 +4081,7 @@ void fe_sq2(fe r, const fe a) "ADD lr, sp, #0x20\n\t" "STM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" "ADD lr, sp, #0x4\n\t" - "ldm lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -4090,7 +4090,7 @@ void fe_sq2(fe r, const fe a) "ADCS r9, r9, r9\n\t" "ADCS r10, r10, r10\n\t" "STM lr!, {r4, r5, r6, r7, r8, r9, r10}\n\t" - "ldm lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t" "ADCS r3, r3, r3\n\t" "ADCS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" @@ -4101,7 +4101,7 @@ void fe_sq2(fe r, const fe a) "ADC r10, r0, #0x0\n\t" "STM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "ADD lr, sp, #0x4\n\t" - "ldm lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t" "MOV lr, sp\n\t" /* A[0] * A[0] */ "LDR r12, [r1]\n\t" @@ -4126,7 +4126,7 @@ void fe_sq2(fe r, const fe a) "UMLAL r9, r11, r12, r12\n\t" "ADDS r10, r10, r11\n\t" "STM lr!, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" - "ldm lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" + "LDM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" /* A[4] * A[4] */ "LDR r12, [r1, #16]\n\t" "ADCS r3, r3, #0x0\n\t" @@ -4161,7 +4161,7 @@ void fe_sq2(fe r, const fe a) "LSL r11, r11, #1\n\t" "ORR r11, r11, r10, LSR #31\n\t" "MUL r11, r11, r12\n\t" - "ldm lr!, {r1, r2}\n\t" + "LDM lr!, {r1, r2}\n\t" "MOV r12, #0x26\n\t" "ADDS r1, r1, r11\n\t" "ADC r11, r0, #0x0\n\t" @@ -4169,21 +4169,21 @@ void fe_sq2(fe r, const fe a) "ADDS r2, r2, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r2, r11, r4, r12\n\t" - "ldm lr!, {r3, r4}\n\t" + "LDM lr!, {r3, r4}\n\t" "ADDS r3, r3, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r3, r11, r5, r12\n\t" "ADDS r4, r4, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r4, r11, r6, r12\n\t" - "ldm lr!, {r5, r6}\n\t" + "LDM lr!, {r5, r6}\n\t" "ADDS r5, r5, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r5, r11, r7, r12\n\t" "ADDS r6, r6, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r6, r11, r8, r12\n\t" - "ldm lr!, {r7, r8}\n\t" + "LDM lr!, {r7, r8}\n\t" "ADDS r7, r7, r11\n\t" "ADC r11, r0, #0x0\n\t" "UMLAL r7, r11, r9, r12\n\t" @@ -4247,7 +4247,7 @@ void fe_sq2(fe r, const fe a) __asm__ __volatile__ ( "SUB sp, sp, #0x24\n\t" "STRD r0, r1, [sp, #28]\n\t" - "ldm r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" + "LDM r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t" /* Square * 2 */ "UMULL r9, r10, r0, r0\n\t" "UMULL r11, r12, r0, r1\n\t" @@ -4838,7 +4838,7 @@ void ge_madd(ge_p1p1 * r, const ge_p3 * p, const ge_precomp * q) "ADD r1, r1, #0x40\n\t" "ADD r0, r0, #0x20\n\t" /* Double */ - "ldm r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -4927,7 +4927,7 @@ void ge_msub(ge_p1p1 * r, const ge_p3 * p, const ge_precomp * q) "ADD r1, r1, #0x40\n\t" "ADD r0, r0, #0x20\n\t" /* Double */ - "ldm r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -5012,7 +5012,7 @@ void ge_add(ge_p1p1 * r, const ge_p3 * p, const ge_cached* q) "LDR r1, [sp]\n\t" "ADD r0, sp, #0xc\n\t" /* Double */ - "ldm r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -5102,7 +5102,7 @@ void ge_sub(ge_p1p1 * r, const ge_p3 * p, const ge_cached* q) "LDR r1, [sp]\n\t" "ADD r0, sp, #0xc\n\t" /* Double */ - "ldm r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" + "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" "ADDS r4, r4, r4\n\t" "ADCS r5, r5, r5\n\t" "ADCS r6, r6, r6\n\t" @@ -5161,7 +5161,7 @@ void sc_reduce(byte* s) "STR %[s], [sp, #52]\n\t" /* Load bits 252-511 */ "ADD %[s], %[s], #0x1c\n\t" - "ldm %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "LSR lr, r9, #24\n\t" "LSL r9, r9, #4\n\t" "ORR r9, r9, r8, LSR #28\n\t" @@ -5217,14 +5217,14 @@ void sc_reduce(byte* s) "MOV r1, #0x2c13\n\t" "MOVT r1, #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5234,7 +5234,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5244,7 +5244,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5260,14 +5260,14 @@ void sc_reduce(byte* s) "MOV r1, #0x9ce5\n\t" "MOVT r1, #0xa7ed\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5277,7 +5277,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5287,7 +5287,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5301,14 +5301,14 @@ void sc_reduce(byte* s) "MOV r1, #0x6329\n\t" "MOVT r1, #0x5d08\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5318,7 +5318,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5328,7 +5328,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5342,14 +5342,14 @@ void sc_reduce(byte* s) "MOV r1, #0x621\n\t" "MOVT r1, #0xeb21\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5359,7 +5359,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5369,7 +5369,7 @@ void sc_reduce(byte* s) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -5381,19 +5381,19 @@ void sc_reduce(byte* s) "STM r12!, {r10, r11, lr}\n\t" "SUB r12, r12, #0x20\n\t" /* Subtract at 4 * 32 */ - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SUBS r10, r10, r2\n\t" "SBCS r11, r11, r3\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r4\n\t" "SBCS r11, r11, r5\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r6\n\t" "SBCS r11, r11, r7\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r8\n\t" "SBC r11, r11, r9\n\t" "STM r12!, {r10, r11}\n\t" @@ -5416,30 +5416,30 @@ void sc_reduce(byte* s) "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r9, r9, lr\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, r1\n\t" "ADCS r11, r11, r2\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r3\n\t" "ADCS r11, r11, r4\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r5\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, #0x0\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10}\n\t" + "LDM r12, {r10}\n\t" "ADCS r10, r10, #0x0\n\t" "STM r12!, {r10}\n\t" "SUB %[s], %[s], #0x10\n\t" "MOV r12, sp\n\t" /* Load bits 252-376 */ "ADD r12, r12, #0x1c\n\t" - "ldm r12, {r1, r2, r3, r4, r5}\n\t" + "LDM r12, {r1, r2, r3, r4, r5}\n\t" "LSL r5, r5, #4\n\t" "ORR r5, r5, r4, LSR #28\n\t" "LSL r4, r4, #4\n\t" @@ -5456,7 +5456,7 @@ void sc_reduce(byte* s) "MOV r1, #0x2c13\n\t" "MOVT r1, #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, lr, r2, r1\n\t" "ADDS r7, r7, lr\n\t" "MOV lr, #0x0\n\t" @@ -5476,7 +5476,7 @@ void sc_reduce(byte* s) "MOV r1, #0x9ce5\n\t" "MOVT r1, #0xa7ed\n\t" "MOV r10, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r10, r2, r1\n\t" "ADDS r7, r7, r10\n\t" "MOV r10, #0x0\n\t" @@ -5496,7 +5496,7 @@ void sc_reduce(byte* s) "MOV r1, #0x6329\n\t" "MOVT r1, #0x5d08\n\t" "MOV r11, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r11, r2, r1\n\t" "ADDS r7, r7, r11\n\t" "MOV r11, #0x0\n\t" @@ -5516,7 +5516,7 @@ void sc_reduce(byte* s) "MOV r1, #0x621\n\t" "MOVT r1, #0xeb21\n\t" "MOV r12, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r12, r2, r1\n\t" "ADDS r7, r7, r12\n\t" "MOV r12, #0x0\n\t" @@ -5533,7 +5533,7 @@ void sc_reduce(byte* s) "STM %[s], {r6, r7, r8, r9}\n\t" "ADD %[s], %[s], #0x4\n\t" /* Add overflows at 4 * 32 */ - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "BFC r9, #28, #4\n\t" "ADDS r6, r6, lr\n\t" "ADCS r7, r7, r10\n\t" @@ -5546,7 +5546,7 @@ void sc_reduce(byte* s) "SBCS r9, r9, r5\n\t" "SBC r1, r1, r1\n\t" "SUB %[s], %[s], #0x10\n\t" - "ldm %[s], {r2, r3, r4, r5}\n\t" + "LDM %[s], {r2, r3, r4, r5}\n\t" "MOV r10, #0xd3ed\n\t" "MOVT r10, #0x5cf5\n\t" "MOV r11, #0x631a\n\t" @@ -5596,7 +5596,7 @@ void sc_reduce(byte* s) "STR %[s], [sp, #52]\n\t" /* Load bits 252-511 */ "ADD %[s], %[s], #0x1c\n\t" - "ldm %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "LSR lr, r9, #24\n\t" "LSL r9, r9, #4\n\t" "ORR r9, r9, r8, LSR #28\n\t" @@ -5643,19 +5643,19 @@ void sc_reduce(byte* s) "MOV r1, #0x2c13\n\t" "MOVT r1, #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "UMAAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r4, r1\n\t" "UMAAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r6, r1\n\t" "UMAAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r8, r1\n\t" "BFC r11, #28, #4\n\t" "UMAAL r11, lr, r9, r1\n\t" @@ -5665,19 +5665,19 @@ void sc_reduce(byte* s) "MOV r1, #0x9ce5\n\t" "MOVT r1, #0xa7ed\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "UMAAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, r1\n\t" "UMAAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, r1\n\t" "UMAAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, r1\n\t" "UMAAL r11, lr, r9, r1\n\t" "STM r12!, {r10, r11, lr}\n\t" @@ -5685,19 +5685,19 @@ void sc_reduce(byte* s) "MOV r1, #0x6329\n\t" "MOVT r1, #0x5d08\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "UMAAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, r1\n\t" "UMAAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, r1\n\t" "UMAAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, r1\n\t" "UMAAL r11, lr, r9, r1\n\t" "STM r12!, {r10, r11, lr}\n\t" @@ -5705,37 +5705,37 @@ void sc_reduce(byte* s) "MOV r1, #0x621\n\t" "MOVT r1, #0xeb21\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, r2, r1\n\t" "UMAAL r11, lr, r3, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, r1\n\t" "UMAAL r11, lr, r5, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, r1\n\t" "UMAAL r11, lr, r7, r1\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, r1\n\t" "UMAAL r11, lr, r9, r1\n\t" "STM r12!, {r10, r11, lr}\n\t" "SUB r12, r12, #0x20\n\t" /* Subtract at 4 * 32 */ - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SUBS r10, r10, r2\n\t" "SBCS r11, r11, r3\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r4\n\t" "SBCS r11, r11, r5\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r6\n\t" "SBCS r11, r11, r7\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r8\n\t" "SBC r11, r11, r9\n\t" "STM r12!, {r10, r11}\n\t" @@ -5758,30 +5758,30 @@ void sc_reduce(byte* s) "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r9, r9, lr\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, r1\n\t" "ADCS r11, r11, r2\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r3\n\t" "ADCS r11, r11, r4\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r5\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, #0x0\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10}\n\t" + "LDM r12, {r10}\n\t" "ADCS r10, r10, #0x0\n\t" "STM r12!, {r10}\n\t" "SUB %[s], %[s], #0x10\n\t" "MOV r12, sp\n\t" /* Load bits 252-376 */ "ADD r12, r12, #0x1c\n\t" - "ldm r12, {r1, r2, r3, r4, r5}\n\t" + "LDM r12, {r1, r2, r3, r4, r5}\n\t" "LSL r5, r5, #4\n\t" "ORR r5, r5, r4, LSR #28\n\t" "LSL r4, r4, #4\n\t" @@ -5798,7 +5798,7 @@ void sc_reduce(byte* s) "MOV r1, #0x2c13\n\t" "MOVT r1, #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, lr, r2, r1\n\t" "UMAAL r7, lr, r3, r1\n\t" "UMAAL r8, lr, r4, r1\n\t" @@ -5809,7 +5809,7 @@ void sc_reduce(byte* s) "MOV r1, #0x9ce5\n\t" "MOVT r1, #0xa7ed\n\t" "MOV r10, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r10, r2, r1\n\t" "UMAAL r7, r10, r3, r1\n\t" "UMAAL r8, r10, r4, r1\n\t" @@ -5820,7 +5820,7 @@ void sc_reduce(byte* s) "MOV r1, #0x6329\n\t" "MOVT r1, #0x5d08\n\t" "MOV r11, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r11, r2, r1\n\t" "UMAAL r7, r11, r3, r1\n\t" "UMAAL r8, r11, r4, r1\n\t" @@ -5831,7 +5831,7 @@ void sc_reduce(byte* s) "MOV r1, #0x621\n\t" "MOVT r1, #0xeb21\n\t" "MOV r12, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r12, r2, r1\n\t" "UMAAL r7, r12, r3, r1\n\t" "UMAAL r8, r12, r4, r1\n\t" @@ -5839,7 +5839,7 @@ void sc_reduce(byte* s) "STM %[s], {r6, r7, r8, r9}\n\t" "ADD %[s], %[s], #0x4\n\t" /* Add overflows at 4 * 32 */ - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "BFC r9, #28, #4\n\t" "ADDS r6, r6, lr\n\t" "ADCS r7, r7, r10\n\t" @@ -5852,7 +5852,7 @@ void sc_reduce(byte* s) "SBCS r9, r9, r5\n\t" "SBC r1, r1, r1\n\t" "SUB %[s], %[s], #0x10\n\t" - "ldm %[s], {r2, r3, r4, r5}\n\t" + "LDM %[s], {r2, r3, r4, r5}\n\t" "MOV r10, #0xd3ed\n\t" "MOVT r10, #0x5cf5\n\t" "MOV r11, #0x631a\n\t" @@ -6235,20 +6235,20 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[s], sp\n\t" /* Add c to a * b */ "LDR lr, [sp, #76]\n\t" - "ldm %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" - "ldm lr!, {r1, r10, r11, r12}\n\t" + "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM lr!, {r1, r10, r11, r12}\n\t" "ADDS %[b], %[b], %[a]\n\t" "ADCS %[c], %[c], r10\n\t" "ADCS r4, r4, r11\n\t" "ADCS r5, r5, r12\n\t" - "ldm lr!, {r1, r10, r11, r12}\n\t" + "LDM lr!, {r1, r10, r11, r12}\n\t" "ADCS r6, r6, %[a]\n\t" "ADCS r7, r7, r10\n\t" "ADCS r8, r8, r11\n\t" "ADCS r9, r9, r12\n\t" "MOV %[a], r9\n\t" "STM %[s]!, {%[b], %[c], r4, r5, r6, r7, r8, r9}\n\t" - "ldm %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "ADCS %[b], %[b], #0x0\n\t" "ADCS %[c], %[c], #0x0\n\t" "ADCS r4, r4, #0x0\n\t" @@ -6313,14 +6313,14 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x2c13\n\t" "MOVT %[a], #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6330,7 +6330,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6340,7 +6340,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6356,14 +6356,14 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x9ce5\n\t" "MOVT %[a], #0xa7ed\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6373,7 +6373,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6383,7 +6383,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6397,14 +6397,14 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x6329\n\t" "MOVT %[a], #0x5d08\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6414,7 +6414,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6424,7 +6424,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6438,14 +6438,14 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x621\n\t" "MOVT %[a], #0xeb21\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "ADDS r11, r11, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6455,7 +6455,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6465,7 +6465,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADC lr, lr, #0x0\n\t" "UMLAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, lr\n\t" "MOV lr, #0x0\n\t" "ADC lr, lr, #0x0\n\t" @@ -6477,19 +6477,19 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "STM r12!, {r10, r11, lr}\n\t" "SUB r12, r12, #0x20\n\t" /* Subtract at 4 * 32 */ - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SUBS r10, r10, %[b]\n\t" "SBCS r11, r11, %[c]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r4\n\t" "SBCS r11, r11, r5\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r6\n\t" "SBCS r11, r11, r7\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r8\n\t" "SBC r11, r11, r9\n\t" "STM r12!, {r10, r11}\n\t" @@ -6512,30 +6512,30 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r9, r9, lr\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, %[a]\n\t" "ADCS r11, r11, %[b]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, %[c]\n\t" "ADCS r11, r11, r4\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r5\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, #0x0\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10}\n\t" + "LDM r12, {r10}\n\t" "ADCS r10, r10, #0x0\n\t" "STM r12!, {r10}\n\t" "SUB %[s], %[s], #0x10\n\t" "MOV r12, sp\n\t" /* Load bits 252-376 */ "ADD r12, r12, #0x1c\n\t" - "ldm r12, {r1, r2, r3, r4, r5}\n\t" + "LDM r12, {r1, r2, r3, r4, r5}\n\t" "LSL r5, r5, #4\n\t" "ORR r5, r5, r4, LSR #28\n\t" "LSL r4, r4, #4\n\t" @@ -6552,7 +6552,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x2c13\n\t" "MOVT %[a], #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, lr, %[b], %[a]\n\t" "ADDS r7, r7, lr\n\t" "MOV lr, #0x0\n\t" @@ -6572,7 +6572,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x9ce5\n\t" "MOVT %[a], #0xa7ed\n\t" "MOV r10, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r10, %[b], %[a]\n\t" "ADDS r7, r7, r10\n\t" "MOV r10, #0x0\n\t" @@ -6592,7 +6592,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x6329\n\t" "MOVT %[a], #0x5d08\n\t" "MOV r11, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r11, %[b], %[a]\n\t" "ADDS r7, r7, r11\n\t" "MOV r11, #0x0\n\t" @@ -6612,7 +6612,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x621\n\t" "MOVT %[a], #0xeb21\n\t" "MOV r12, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r12, %[b], %[a]\n\t" "ADDS r7, r7, r12\n\t" "MOV r12, #0x0\n\t" @@ -6629,7 +6629,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "STM %[s], {r6, r7, r8, r9}\n\t" "ADD %[s], %[s], #0x4\n\t" /* Add overflows at 4 * 32 */ - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "BFC r9, #28, #4\n\t" "ADDS r6, r6, lr\n\t" "ADCS r7, r7, r10\n\t" @@ -6642,7 +6642,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "SBCS r9, r9, r5\n\t" "SBC %[a], %[a], %[a]\n\t" "SUB %[s], %[s], #0x10\n\t" - "ldm %[s], {r2, r3, r4, r5}\n\t" + "LDM %[s], {r2, r3, r4, r5}\n\t" "MOV r10, #0xd3ed\n\t" "MOVT r10, #0x5cf5\n\t" "MOV r11, #0x631a\n\t" @@ -6702,8 +6702,8 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "ADD lr, sp, #0x44\n\t" "STM lr, {%[s], %[a], %[c]}\n\t" "MOV lr, %[b]\n\t" - "ldm %[a], {r0, r1, r2, r3}\n\t" - "ldm lr!, {r4, r5, r6}\n\t" + "LDM %[a], {r0, r1, r2, r3}\n\t" + "LDM lr!, {r4, r5, r6}\n\t" "UMULL r10, r11, %[s], r4\n\t" "UMULL r12, r7, %[a], r4\n\t" "UMAAL r11, r12, %[s], r5\n\t" @@ -6713,7 +6713,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "UMAAL r8, r9, %[c], r4\n\t" "STM sp, {r10, r11, r12}\n\t" "UMAAL r7, r8, %[b], r5\n\t" - "ldm lr!, {r4}\n\t" + "LDM lr!, {r4}\n\t" "UMULL r10, r11, %[a], r6\n\t" "UMAAL r8, r9, %[b], r6\n\t" "UMAAL r7, r10, %[s], r4\n\t" @@ -6723,7 +6723,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "UMAAL r9, r11, %[c], r6\n\t" "UMAAL r9, r10, %[b], r4\n\t" "UMAAL r10, r11, %[c], r4\n\t" - "ldm lr, {r4, r5, r6, r7}\n\t" + "LDM lr, {r4, r5, r6, r7}\n\t" "MOV r12, #0x0\n\t" "UMLAL r8, r12, %[s], r4\n\t" "UMAAL r9, r12, %[a], r4\n\t" @@ -6747,48 +6747,48 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "UMAAL r4, r6, %[b], r7\n\t" "SUB lr, lr, #0x10\n\t" "UMAAL r5, r6, %[c], r7\n\t" - "ldm %[s], {r0, r1, r2, r3}\n\t" + "LDM %[s], {r0, r1, r2, r3}\n\t" "STR r6, [sp, #64]\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r7, #0x0\n\t" "UMLAL r8, r7, %[s], r6\n\t" "UMAAL r9, r7, %[a], r6\n\t" "STR r8, [sp, #16]\n\t" "UMAAL r10, r7, %[b], r6\n\t" "UMAAL r11, r7, %[c], r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r8, #0x0\n\t" "UMLAL r9, r8, %[s], r6\n\t" "UMAAL r10, r8, %[a], r6\n\t" "STR r9, [sp, #20]\n\t" "UMAAL r11, r8, %[b], r6\n\t" "UMAAL r12, r8, %[c], r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r9, #0x0\n\t" "UMLAL r10, r9, %[s], r6\n\t" "UMAAL r11, r9, %[a], r6\n\t" "STR r10, [sp, #24]\n\t" "UMAAL r12, r9, %[b], r6\n\t" "UMAAL r4, r9, %[c], r6\n\t" - "ldm lr!, {r6}\n\t" + "LDM lr!, {r6}\n\t" "MOV r10, #0x0\n\t" "UMLAL r11, r10, %[s], r6\n\t" "UMAAL r12, r10, %[a], r6\n\t" "STR r11, [sp, #28]\n\t" "UMAAL r4, r10, %[b], r6\n\t" "UMAAL r5, r10, %[c], r6\n\t" - "ldm lr!, {r11}\n\t" + "LDM lr!, {r11}\n\t" "UMAAL r12, r7, %[s], r11\n\t" "UMAAL r4, r7, %[a], r11\n\t" "LDR r6, [sp, #64]\n\t" "UMAAL r5, r7, %[b], r11\n\t" "UMAAL r6, r7, %[c], r11\n\t" - "ldm lr!, {r11}\n\t" + "LDM lr!, {r11}\n\t" "UMAAL r4, r8, %[s], r11\n\t" "UMAAL r5, r8, %[a], r11\n\t" "UMAAL r6, r8, %[b], r11\n\t" "UMAAL r7, r8, %[c], r11\n\t" - "ldm lr, {r11, lr}\n\t" + "LDM lr, {r11, lr}\n\t" "UMAAL r5, r9, %[s], r11\n\t" "UMAAL r6, r10, %[s], lr\n\t" "UMAAL r6, r9, %[a], r11\n\t" @@ -6803,20 +6803,20 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[s], sp\n\t" /* Add c to a * b */ "LDR lr, [sp, #76]\n\t" - "ldm %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" - "ldm lr!, {r1, r10, r11, r12}\n\t" + "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM lr!, {r1, r10, r11, r12}\n\t" "ADDS %[b], %[b], %[a]\n\t" "ADCS %[c], %[c], r10\n\t" "ADCS r4, r4, r11\n\t" "ADCS r5, r5, r12\n\t" - "ldm lr!, {r1, r10, r11, r12}\n\t" + "LDM lr!, {r1, r10, r11, r12}\n\t" "ADCS r6, r6, %[a]\n\t" "ADCS r7, r7, r10\n\t" "ADCS r8, r8, r11\n\t" "ADCS r9, r9, r12\n\t" "MOV %[a], r9\n\t" "STM %[s]!, {%[b], %[c], r4, r5, r6, r7, r8, r9}\n\t" - "ldm %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" + "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t" "ADCS %[b], %[b], #0x0\n\t" "ADCS %[c], %[c], #0x0\n\t" "ADCS r4, r4, #0x0\n\t" @@ -6872,19 +6872,19 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x2c13\n\t" "MOVT %[a], #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "UMAAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r4, %[a]\n\t" "UMAAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r6, %[a]\n\t" "UMAAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm %[s]!, {r10, r11}\n\t" + "LDM %[s]!, {r10, r11}\n\t" "UMAAL r10, lr, r8, %[a]\n\t" "BFC r11, #28, #4\n\t" "UMAAL r11, lr, r9, %[a]\n\t" @@ -6894,19 +6894,19 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x9ce5\n\t" "MOVT %[a], #0xa7ed\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "UMAAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, %[a]\n\t" "UMAAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, %[a]\n\t" "UMAAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, %[a]\n\t" "UMAAL r11, lr, r9, %[a]\n\t" "STM r12!, {r10, r11, lr}\n\t" @@ -6914,19 +6914,19 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x6329\n\t" "MOVT %[a], #0x5d08\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "UMAAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, %[a]\n\t" "UMAAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, %[a]\n\t" "UMAAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, %[a]\n\t" "UMAAL r11, lr, r9, %[a]\n\t" "STM r12!, {r10, r11, lr}\n\t" @@ -6934,37 +6934,37 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x621\n\t" "MOVT %[a], #0xeb21\n\t" "MOV lr, #0x0\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMLAL r10, lr, %[b], %[a]\n\t" "UMAAL r11, lr, %[c], %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r4, %[a]\n\t" "UMAAL r11, lr, r5, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r6, %[a]\n\t" "UMAAL r11, lr, r7, %[a]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "UMAAL r10, lr, r8, %[a]\n\t" "UMAAL r11, lr, r9, %[a]\n\t" "STM r12!, {r10, r11, lr}\n\t" "SUB r12, r12, #0x20\n\t" /* Subtract at 4 * 32 */ - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SUBS r10, r10, %[b]\n\t" "SBCS r11, r11, %[c]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r4\n\t" "SBCS r11, r11, r5\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r6\n\t" "SBCS r11, r11, r7\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "SBCS r10, r10, r8\n\t" "SBC r11, r11, r9\n\t" "STM r12!, {r10, r11}\n\t" @@ -6987,30 +6987,30 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "AND r4, r4, lr\n\t" "AND r5, r5, lr\n\t" "AND r9, r9, lr\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADDS r10, r10, %[a]\n\t" "ADCS r11, r11, %[b]\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, %[c]\n\t" "ADCS r11, r11, r4\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, r5\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10, r11}\n\t" + "LDM r12, {r10, r11}\n\t" "ADCS r10, r10, #0x0\n\t" "ADCS r11, r11, #0x0\n\t" "STM r12!, {r10, r11}\n\t" - "ldm r12, {r10}\n\t" + "LDM r12, {r10}\n\t" "ADCS r10, r10, #0x0\n\t" "STM r12!, {r10}\n\t" "SUB %[s], %[s], #0x10\n\t" "MOV r12, sp\n\t" /* Load bits 252-376 */ "ADD r12, r12, #0x1c\n\t" - "ldm r12, {r1, r2, r3, r4, r5}\n\t" + "LDM r12, {r1, r2, r3, r4, r5}\n\t" "LSL r5, r5, #4\n\t" "ORR r5, r5, r4, LSR #28\n\t" "LSL r4, r4, #4\n\t" @@ -7027,7 +7027,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x2c13\n\t" "MOVT %[a], #0xa30a\n\t" "MOV lr, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, lr, %[b], %[a]\n\t" "UMAAL r7, lr, %[c], %[a]\n\t" "UMAAL r8, lr, r4, %[a]\n\t" @@ -7038,7 +7038,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x9ce5\n\t" "MOVT %[a], #0xa7ed\n\t" "MOV r10, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r10, %[b], %[a]\n\t" "UMAAL r7, r10, %[c], %[a]\n\t" "UMAAL r8, r10, r4, %[a]\n\t" @@ -7049,7 +7049,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x6329\n\t" "MOVT %[a], #0x5d08\n\t" "MOV r11, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r11, %[b], %[a]\n\t" "UMAAL r7, r11, %[c], %[a]\n\t" "UMAAL r8, r11, r4, %[a]\n\t" @@ -7060,7 +7060,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "MOV %[a], #0x621\n\t" "MOVT %[a], #0xeb21\n\t" "MOV r12, #0x0\n\t" - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "UMLAL r6, r12, %[b], %[a]\n\t" "UMAAL r7, r12, %[c], %[a]\n\t" "UMAAL r8, r12, r4, %[a]\n\t" @@ -7068,7 +7068,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "STM %[s], {r6, r7, r8, r9}\n\t" "ADD %[s], %[s], #0x4\n\t" /* Add overflows at 4 * 32 */ - "ldm %[s], {r6, r7, r8, r9}\n\t" + "LDM %[s], {r6, r7, r8, r9}\n\t" "BFC r9, #28, #4\n\t" "ADDS r6, r6, lr\n\t" "ADCS r7, r7, r10\n\t" @@ -7081,7 +7081,7 @@ void sc_muladd(byte* s, const byte* a, const byte* b, const byte* c) "SBCS r9, r9, r5\n\t" "SBC %[a], %[a], %[a]\n\t" "SUB %[s], %[s], #0x10\n\t" - "ldm %[s], {r2, r3, r4, r5}\n\t" + "LDM %[s], {r2, r3, r4, r5}\n\t" "MOV r10, #0xd3ed\n\t" "MOVT r10, #0x5cf5\n\t" "MOV r11, #0x631a\n\t" diff --git a/wolfcrypt/src/port/arm/thumb2-mlkem-asm_c.c b/wolfcrypt/src/port/arm/thumb2-mlkem-asm_c.c index 02f6daccb..a8e832961 100644 --- a/wolfcrypt/src/port/arm/thumb2-mlkem-asm_c.c +++ b/wolfcrypt/src/port/arm/thumb2-mlkem-asm_c.c @@ -3110,8 +3110,8 @@ void mlkem_thumb2_basemul_mont(sword16* r, const sword16* a, const sword16* b) #else "L_mlkem_basemul_mont_loop_%=:\n\t" #endif - "ldm %[a]!, {r4, r5}\n\t" - "ldm %[b]!, {r6, r7}\n\t" + "LDM %[a]!, {r4, r5}\n\t" + "LDM %[b]!, {r6, r7}\n\t" "LDR lr, [r3, r8]\n\t" "ADD r8, r8, #0x2\n\t" "PUSH {r8}\n\t" @@ -3261,8 +3261,8 @@ void mlkem_thumb2_basemul_mont_add(sword16* r, const sword16* a, #else "L_mlkem_thumb2_basemul_mont_add_loop_%=:\n\t" #endif - "ldm %[a]!, {r4, r5}\n\t" - "ldm %[b]!, {r6, r7}\n\t" + "LDM %[a]!, {r4, r5}\n\t" + "LDM %[b]!, {r6, r7}\n\t" "LDR lr, [r3, r8]\n\t" "ADD r8, r8, #0x2\n\t" "PUSH {r8}\n\t" @@ -3291,7 +3291,7 @@ void mlkem_thumb2_basemul_mont_add(sword16* r, const sword16* a, "SMULTB r7, r12, r11\n\t" "SMLABB r9, r12, r6, r9\n\t" "SMLABB r11, r12, r7, r11\n\t" - "ldm %[r], {r4, r5}\n\t" + "LDM %[r], {r4, r5}\n\t" "PKHTB r9, r9, r8, ASR #16\n\t" "PKHTB r11, r11, r10, ASR #16\n\t" "SADD16 r4, r4, r9\n\t" @@ -3358,7 +3358,7 @@ void mlkem_thumb2_basemul_mont_add(sword16* r, const sword16* a, "SBFX r5, r7, #0, #16\n\t" "MLA r9, r12, r4, r9\n\t" "MLA r11, r12, r5, r11\n\t" - "ldm %[r], {r4, r5}\n\t" + "LDM %[r], {r4, r5}\n\t" "BFC r9, #0, #16\n\t" "BFC r11, #0, #16\n\t" "ORR r9, r9, r8, LSR #16\n\t" @@ -3421,7 +3421,7 @@ void mlkem_thumb2_csubq(sword16* p) #else "L_mlkem_thumb2_csubq_loop_%=:\n\t" #endif - "ldm %[p], {r2, r3, r4, r5}\n\t" + "LDM %[p], {r2, r3, r4, r5}\n\t" #ifndef WOLFSSL_ARM_ARCH_7M "SSUB16 r2, r2, r12\n\t" "SSUB16 r3, r3, r12\n\t" @@ -3541,7 +3541,7 @@ unsigned int mlkem_thumb2_rej_uniform(sword16* p, unsigned int len, #else "BLT.N L_mlkem_thumb2_rej_uniform_done_no_fail_%=\n\t" #endif - "ldm %[r]!, {r4, r5, r6}\n\t" + "LDM %[r]!, {r4, r5, r6}\n\t" "UBFX r7, r4, #0, #12\n\t" "STRH r7, [%[p], r9]\n\t" "SUB r10, r7, r8\n\t" @@ -3627,7 +3627,7 @@ unsigned int mlkem_thumb2_rej_uniform(sword16* p, unsigned int len, #else "L_mlkem_thumb2_rej_uniform_loop_%=:\n\t" #endif - "ldm %[r]!, {r4, r5, r6}\n\t" + "LDM %[r]!, {r4, r5, r6}\n\t" "UBFX r7, r4, #0, #12\n\t" "CMP r7, r8\n\t" #if defined(__GNUC__) diff --git a/wolfcrypt/src/port/arm/thumb2-poly1305-asm_c.c b/wolfcrypt/src/port/arm/thumb2-poly1305-asm_c.c index 0e3911c0a..43f4c3d91 100644 --- a/wolfcrypt/src/port/arm/thumb2-poly1305-asm_c.c +++ b/wolfcrypt/src/port/arm/thumb2-poly1305-asm_c.c @@ -73,7 +73,7 @@ void poly1305_blocks_thumb2_16(Poly1305* ctx, const byte* m, word32 len, "STM lr, {%[ctx], %[m], %[len], %[notLast]}\n\t" /* Get h pointer */ "ADD lr, %[ctx], #0x10\n\t" - "ldm lr, {r4, r5, r6, r7, r8}\n\t" + "LDM lr, {r4, r5, r6, r7, r8}\n\t" "\n" #if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000) "L_poly1305_thumb2_16_loop:\n\t" @@ -195,7 +195,7 @@ void poly1305_blocks_thumb2_16(Poly1305* ctx, const byte* m, word32 len, "MOV r12, %[ctx]\n\t" "MLA r11, %[notLast], %[len], r11\n\t" #else - "ldm %[m], {r0, r1, r2, r3}\n\t" + "LDM %[m], {r0, r1, r2, r3}\n\t" /* r[0] * h[0] */ "UMULL r10, r11, %[ctx], r4\n\t" /* r[1] * h[0] */ @@ -243,7 +243,7 @@ void poly1305_blocks_thumb2_16(Poly1305* ctx, const byte* m, word32 len, /* r[3] * h[4] */ "UMAAL r11, r12, %[notLast], r5\n\t" /* DONE */ - "ldm sp, {r4, r5, r6}\n\t" + "LDM sp, {r4, r5, r6}\n\t" #endif /* WOLFSSL_ARM_ARCH_7M */ /* r12 will be zero because r is masked. */ /* Load length */ @@ -321,7 +321,7 @@ void poly1305_set_key(Poly1305* ctx, const byte* key) __asm__ __volatile__ ( /* Load mask. */ "MOV r10, %[L_poly1305_thumb2_clamp]\n\t" - "ldm r10, {r6, r7, r8, r9}\n\t" + "LDM r10, {r6, r7, r8, r9}\n\t" /* Load and cache padding. */ "LDR r2, [%[key], #16]\n\t" "LDR r3, [%[key], #20]\n\t" @@ -370,7 +370,7 @@ void poly1305_final(Poly1305* ctx, byte* mac) __asm__ __volatile__ ( "ADD r11, %[ctx], #0x10\n\t" - "ldm r11, {r2, r3, r4, r5, r6}\n\t" + "LDM r11, {r2, r3, r4, r5, r6}\n\t" /* Add 5 and check for h larger than p. */ "ADDS r7, r2, #0x5\n\t" "ADCS r7, r3, #0x0\n\t" @@ -388,7 +388,7 @@ void poly1305_final(Poly1305* ctx, byte* mac) "ADC r5, r5, #0x0\n\t" /* Add padding */ "ADD r11, %[ctx], #0x24\n\t" - "ldm r11, {r7, r8, r9, r10}\n\t" + "LDM r11, {r7, r8, r9, r10}\n\t" "ADDS r2, r2, r7\n\t" "ADCS r3, r3, r8\n\t" "ADCS r4, r4, r9\n\t" diff --git a/wolfcrypt/src/sp_arm32.c b/wolfcrypt/src/sp_arm32.c index 8974314d4..a70eb35eb 100644 --- a/wolfcrypt/src/sp_arm32.c +++ b/wolfcrypt/src/sp_arm32.c @@ -109,9 +109,9 @@ static void sp_2048_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -251,11 +251,18 @@ static void sp_2048_to_bin_64(sp_digit* r, byte* a) * a A single precision integer. * b A single precision integer. */ -static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -2233,8 +2240,13 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3, r4, r5, r6}\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -2247,11 +2259,18 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * a A single precision integer. * b A single precision integer. */ -static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #36\n\t" @@ -2587,8 +2606,13 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "sub %[r], %[r], #32\n\t" "stm %[r], {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #36\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -2601,11 +2625,18 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * a A single precision integer. * b A single precision integer. */ -static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #44\n\t" @@ -2719,8 +2750,13 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "ldm sp, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "stm lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr" ); @@ -2733,11 +2769,18 @@ static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -2756,8 +2799,13 @@ static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -2768,10 +2816,16 @@ static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_sub_in_place_16(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_in_place_16(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -2803,8 +2857,13 @@ static sp_digit sp_2048_sub_in_place_16(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -2816,11 +2875,19 @@ static sp_digit sp_2048_sub_in_place_16(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -2853,8 +2920,13 @@ static sp_digit sp_2048_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -2930,10 +3002,16 @@ SP_NOINLINE static void sp_2048_mul_16(sp_digit* r, const sp_digit* a, * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -2993,8 +3071,13 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -3006,11 +3089,19 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -3071,8 +3162,13 @@ static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -3152,10 +3248,16 @@ SP_NOINLINE static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -3271,8 +3373,13 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -3284,11 +3391,19 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -3405,8 +3520,13 @@ static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -3487,10 +3607,16 @@ SP_NOINLINE static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -4685,8 +4811,13 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2, r3, r4, r8}\n\t" "stm %[r]!, {r2, r3, r4, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -4698,10 +4829,16 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -4929,8 +5066,13 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) "sub %[r], %[r], #32\n\t" "stm %[r], {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -4942,10 +5084,16 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -5046,8 +5194,13 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) "ldm sp, {r0, r1, r2, r3, r4, r5, r6}\n\t" "stm lr, {r0, r1, r2, r3, r4, r5, r6}\n\t" "add sp, sp, #32\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -5060,11 +5213,18 @@ static void sp_2048_sqr_8(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -5082,8 +5242,13 @@ static sp_digit sp_2048_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -5131,11 +5296,19 @@ SP_NOINLINE static void sp_2048_sqr_16(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_sub_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -5167,8 +5340,13 @@ static sp_digit sp_2048_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -5216,11 +5394,19 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -5280,8 +5466,13 @@ static sp_digit sp_2048_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -5331,11 +5522,19 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -5355,8 +5554,13 @@ static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], r12\n\t" "bne L_sp_2048_add_64_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -5370,10 +5574,16 @@ static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -5392,8 +5602,13 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_2048_sub_in_pkace_64_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -5408,11 +5623,18 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x200\n\t" @@ -5595,8 +5817,13 @@ static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_2048_mul_64_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -5607,10 +5834,16 @@ static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_sqr_64(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x200\n\t" @@ -5753,8 +5986,13 @@ static void sp_2048_sqr_64(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_2048_sqr_64_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -5786,11 +6024,19 @@ static void sp_2048_mask_32(sp_digit* r, const sp_digit* a, sp_digit m) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -5810,8 +6056,13 @@ static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], r12\n\t" "bne L_sp_2048_add_32_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -5825,10 +6076,16 @@ static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -5847,8 +6104,13 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_2048_sub_in_pkace_32_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -5863,11 +6125,18 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x100\n\t" @@ -6050,8 +6319,13 @@ static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_2048_mul_32_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -6062,10 +6336,16 @@ static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_sqr_32(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x100\n\t" @@ -6208,8 +6488,13 @@ static void sp_2048_sqr_32(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_2048_sqr_32_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -6245,11 +6530,17 @@ static void sp_2048_mont_setup(const sp_digit* a, sp_digit* rho) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_mul_d_64(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_2048_mul_d_64(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -6330,8 +6621,13 @@ static void sp_2048_mul_d_64(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x100\n\t" "blt L_sp_2048_mul_d_64_word_%=\n\t" "str r3, [%[r], #256]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -6343,11 +6639,17 @@ static void sp_2048_mul_d_64(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_mul_d_64(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_2048_mul_d_64(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -8395,8 +8697,13 @@ static void sp_2048_mul_d_64(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r3}\n\t" "str r4, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -8426,13 +8733,20 @@ static void sp_2048_mont_norm_32(sp_digit* r, const sp_digit* m) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -8451,8 +8765,13 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x80\n\t" "blt L_sp_2048_cond_sub_32_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -8467,13 +8786,20 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -8590,8 +8916,13 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -8605,11 +8936,19 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -9571,8 +9910,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -9586,11 +9930,19 @@ static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -9867,8 +10219,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -9882,11 +10239,19 @@ static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -10073,8 +10438,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -10119,11 +10489,17 @@ SP_NOINLINE static void sp_2048_mont_sqr_32(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -10204,8 +10580,13 @@ static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x80\n\t" "blt L_sp_2048_mul_d_32_word_%=\n\t" "str r3, [%[r], #128]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -10217,11 +10598,17 @@ static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -11245,8 +11632,13 @@ static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r4}\n\t" "str r5, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -11262,11 +11654,17 @@ static void sp_2048_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -11304,8 +11702,13 @@ static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -11321,11 +11724,17 @@ static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -11442,8 +11851,13 @@ static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -11457,10 +11871,16 @@ static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_2048_cmp_32(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_2048_cmp_32(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -11841,8 +12261,13 @@ static sp_int32 sp_2048_cmp_32(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -12252,13 +12677,20 @@ static void sp_2048_mont_norm_64(sp_digit* r, const sp_digit* m) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -12277,8 +12709,13 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x100\n\t" "blt L_sp_2048_cond_sub_64_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -12293,13 +12730,20 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -12528,8 +12972,13 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -12543,11 +12992,19 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -14437,8 +14894,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -14452,11 +14914,19 @@ static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -14989,8 +15459,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -15004,11 +15479,19 @@ static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -15355,8 +15838,13 @@ static SP_NOINLINE void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_ "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -15401,11 +15889,19 @@ SP_NOINLINE static void sp_2048_mont_sqr_64(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -15424,8 +15920,13 @@ static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], lr\n\t" "bne L_sp_2048_sub_64_word_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -15439,11 +15940,19 @@ static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -15559,8 +16068,13 @@ static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -15577,11 +16091,17 @@ static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digi * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -15619,8 +16139,13 @@ static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -15636,11 +16161,17 @@ static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -15757,8 +16288,13 @@ static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -15876,10 +16412,16 @@ static void sp_2048_mask_64(sp_digit* r, const sp_digit* a, sp_digit m) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_2048_cmp_64(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_2048_cmp_64(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -16612,8 +17154,13 @@ static sp_int32 sp_2048_cmp_64(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -17145,13 +17692,20 @@ int sp_RsaPublic_2048(const byte* in, word32 inLen, const mp_int* em, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -17170,8 +17724,13 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, "cmp r12, #0x80\n\t" "blt L_sp_2048_cond_add_32_words_%=\n\t" "mov %[r], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -17186,13 +17745,20 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r8, #0\n\t" @@ -17309,8 +17875,13 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, "adcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "adc %[r], r8, r8\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; @@ -17631,11 +18202,17 @@ int sp_ModExp_2048(const mp_int* base, const mp_int* exp, const mp_int* mod, #ifdef WOLFSSL_HAVE_SP_DH #ifdef HAVE_FFDHE_2048 +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_2048_lshift_64(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_2048_lshift_64(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #31\n\t" @@ -18023,8 +18600,13 @@ static void sp_2048_lshift_64(sp_digit* r_p, const sp_digit* a_p, byte n_p) "orr r6, r6, r3\n\t" "str r5, [%[r]]\n\t" "str r6, [%[r], #4]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } @@ -18312,9 +18894,9 @@ static void sp_3072_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -18453,11 +19035,18 @@ static void sp_3072_to_bin_96(sp_digit* r, byte* a) * a A single precision integer. * b A single precision integer. */ -static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #48\n\t" @@ -23937,8 +24526,13 @@ static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3, r4, r5, r6}\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -23950,11 +24544,19 @@ static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -23980,8 +24582,13 @@ static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -23992,10 +24599,16 @@ static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_sub_in_place_24(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_in_place_24(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -24041,8 +24654,13 @@ static sp_digit sp_3072_sub_in_place_24(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -24054,11 +24672,19 @@ static sp_digit sp_3072_sub_in_place_24(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_24(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_24(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_24(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -24105,8 +24731,13 @@ static sp_digit sp_3072_add_24(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -24186,10 +24817,16 @@ SP_NOINLINE static void sp_3072_mul_24(sp_digit* r, const sp_digit* a, * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -24277,8 +24914,13 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -24290,11 +24932,19 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -24383,8 +25033,13 @@ static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -24464,10 +25119,16 @@ SP_NOINLINE static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -24639,8 +25300,13 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -24652,11 +25318,19 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -24829,8 +25503,13 @@ static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -24910,10 +25589,16 @@ SP_NOINLINE static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_sqr_12(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #48\n\t" @@ -27961,8 +28646,13 @@ static void sp_3072_sqr_12(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2, r3, r4, r8}\n\t" "stm %[r]!, {r2, r3, r4, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -27974,11 +28664,19 @@ static void sp_3072_sqr_12(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -28003,8 +28701,13 @@ static sp_digit sp_3072_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -28052,11 +28755,19 @@ SP_NOINLINE static void sp_3072_sqr_24(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_sub_24(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_sub_24(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_24(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -28102,8 +28813,13 @@ static sp_digit sp_3072_sub_24(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -28151,11 +28867,19 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_sub_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -28243,8 +28967,13 @@ static sp_digit sp_3072_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -28294,11 +29023,19 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -28318,8 +29055,13 @@ static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], r12\n\t" "bne L_sp_3072_add_96_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -28333,10 +29075,16 @@ static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -28355,8 +29103,13 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_3072_sub_in_pkace_96_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -28371,11 +29124,18 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x300\n\t" @@ -28558,8 +29318,13 @@ static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_3072_mul_96_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -28570,10 +29335,16 @@ static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_sqr_96(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x300\n\t" @@ -28716,8 +29487,13 @@ static void sp_3072_sqr_96(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_3072_sqr_96_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -28749,11 +29525,19 @@ static void sp_3072_mask_48(sp_digit* r, const sp_digit* a, sp_digit m) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -28773,8 +29557,13 @@ static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], r12\n\t" "bne L_sp_3072_add_48_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -28788,10 +29577,16 @@ static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -28810,8 +29605,13 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_3072_sub_in_pkace_48_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -28826,11 +29626,18 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x180\n\t" @@ -29013,8 +29820,13 @@ static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_3072_mul_48_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -29025,10 +29837,16 @@ static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_sqr_48(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x180\n\t" @@ -29171,8 +29989,13 @@ static void sp_3072_sqr_48(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_3072_sqr_48_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -29208,11 +30031,17 @@ static void sp_3072_mont_setup(const sp_digit* a, sp_digit* rho) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_mul_d_96(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_3072_mul_d_96(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -29293,8 +30122,13 @@ static void sp_3072_mul_d_96(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x180\n\t" "blt L_sp_3072_mul_d_96_word_%=\n\t" "str r3, [%[r], #384]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -29306,11 +30140,17 @@ static void sp_3072_mul_d_96(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_mul_d_96(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_3072_mul_d_96(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -32382,8 +33222,13 @@ static void sp_3072_mul_d_96(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r5}\n\t" "str r3, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -32413,13 +33258,20 @@ static void sp_3072_mont_norm_48(sp_digit* r, const sp_digit* m) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -32438,8 +33290,13 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0xc0\n\t" "blt L_sp_3072_cond_sub_48_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -32454,13 +33311,20 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -32633,8 +33497,13 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -32648,11 +33517,19 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -34078,8 +34955,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -34093,11 +34975,19 @@ static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -34502,8 +35392,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -34517,11 +35412,19 @@ static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -34788,8 +35691,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_ "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -34834,11 +35742,17 @@ SP_NOINLINE static void sp_3072_mont_sqr_48(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -34919,8 +35833,13 @@ static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0xc0\n\t" "blt L_sp_3072_mul_d_48_word_%=\n\t" "str r3, [%[r], #192]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -34932,11 +35851,17 @@ static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -36472,8 +37397,13 @@ static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r5}\n\t" "str r3, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -36489,11 +37419,17 @@ static void sp_3072_mul_d_48(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -36531,8 +37467,13 @@ static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -36548,11 +37489,17 @@ static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -36669,8 +37616,13 @@ static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -36684,10 +37636,16 @@ static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_3072_cmp_48(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_3072_cmp_48(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -37244,8 +38202,13 @@ static sp_int32 sp_3072_cmp_48(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -37655,13 +38618,20 @@ static void sp_3072_mont_norm_96(sp_digit* r, const sp_digit* m) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -37680,8 +38650,13 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x180\n\t" "blt L_sp_3072_cond_sub_96_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -37696,13 +38671,20 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -38043,8 +39025,13 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -38058,11 +39045,19 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -40880,8 +41875,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -40895,11 +41895,19 @@ static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -41688,8 +42696,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_ "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -41703,11 +42716,19 @@ static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -42214,8 +43235,13 @@ static SP_NOINLINE void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_ "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -42260,11 +43286,19 @@ SP_NOINLINE static void sp_3072_mont_sqr_96(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -42283,8 +43317,13 @@ static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], lr\n\t" "bne L_sp_3072_sub_96_word_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -42298,11 +43337,19 @@ static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -42474,8 +43521,13 @@ static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -42492,11 +43544,17 @@ static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digi * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -42534,8 +43592,13 @@ static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -42551,11 +43614,17 @@ static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -42672,8 +43741,13 @@ static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -42791,10 +43865,16 @@ static void sp_3072_mask_96(sp_digit* r, const sp_digit* a, sp_digit m) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_3072_cmp_96(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_3072_cmp_96(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -43884,8 +44964,13 @@ static sp_int32 sp_3072_cmp_96(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -44417,13 +45502,20 @@ int sp_RsaPublic_3072(const byte* in, word32 inLen, const mp_int* em, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -44442,8 +45534,13 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, "cmp r12, #0xc0\n\t" "blt L_sp_3072_cond_add_48_words_%=\n\t" "mov %[r], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -44458,13 +45555,20 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r8, #0\n\t" @@ -44637,8 +45741,13 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, "adcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "adc %[r], r8, r8\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; @@ -44959,11 +46068,17 @@ int sp_ModExp_3072(const mp_int* base, const mp_int* exp, const mp_int* mod, #ifdef WOLFSSL_HAVE_SP_DH #ifdef HAVE_FFDHE_3072 +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_3072_lshift_96(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_3072_lshift_96(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #31\n\t" @@ -45543,8 +46658,13 @@ static void sp_3072_lshift_96(sp_digit* r_p, const sp_digit* a_p, byte n_p) "orr r4, r4, r3\n\t" "str r6, [%[r]]\n\t" "str r4, [%[r], #4]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } @@ -45832,9 +46952,9 @@ static void sp_4096_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -45972,10 +47092,16 @@ static void sp_4096_to_bin_128(sp_digit* r, byte* a) * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -46203,8 +47329,13 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -46216,12 +47347,19 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -46450,8 +47588,13 @@ static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -46540,12 +47683,19 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -46565,8 +47715,13 @@ static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, "cmp %[a], r12\n\t" "bne L_sp_4096_add_128_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -46580,10 +47735,16 @@ static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -46602,8 +47763,13 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_4096_sub_in_pkace_128_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -46618,11 +47784,18 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_4096_mul_128(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x400\n\t" @@ -46805,8 +47978,13 @@ static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_4096_mul_128_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -46817,10 +47995,16 @@ static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_4096_sqr_128(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x400\n\t" @@ -46963,8 +48147,13 @@ static void sp_4096_sqr_128(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_4096_sqr_128_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -46998,11 +48187,17 @@ static void sp_4096_mont_setup(const sp_digit* a, sp_digit* rho) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_4096_mul_d_128(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_4096_mul_d_128(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -47083,8 +48278,13 @@ static void sp_4096_mul_d_128(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x200\n\t" "blt L_sp_4096_mul_d_128_word_%=\n\t" "str r3, [%[r], #512]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -47096,11 +48296,17 @@ static void sp_4096_mul_d_128(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_4096_mul_d_128(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_4096_mul_d_128(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -51196,8 +52402,13 @@ static void sp_4096_mul_d_128(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r4}\n\t" "str r5, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -51228,13 +52439,20 @@ static void sp_4096_mont_norm_128(sp_digit* r, const sp_digit* m) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -51253,8 +52471,13 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x200\n\t" "blt L_sp_4096_cond_sub_128_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -51269,13 +52492,20 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -51728,8 +52958,13 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -51743,11 +52978,19 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -55493,8 +56736,13 @@ static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -55508,11 +56756,19 @@ static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -56557,8 +57813,13 @@ static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -56572,11 +57833,19 @@ static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -57243,8 +58512,13 @@ static SP_NOINLINE void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -57289,12 +58563,19 @@ SP_NOINLINE static void sp_4096_mont_sqr_128(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -57313,8 +58594,13 @@ static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, "cmp %[a], lr\n\t" "bne L_sp_4096_sub_128_word_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -57328,12 +58614,19 @@ static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -57561,8 +58854,13 @@ static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -57579,11 +58877,17 @@ static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -57621,8 +58925,13 @@ static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -57638,11 +58947,17 @@ static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -57759,8 +59074,13 @@ static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -57878,10 +59198,16 @@ static void sp_4096_mask_128(sp_digit* r, const sp_digit* a, sp_digit m) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_4096_cmp_128(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_4096_cmp_128(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -59323,8 +60649,13 @@ static sp_int32 sp_4096_cmp_128(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -59856,13 +61187,20 @@ int sp_RsaPublic_4096(const byte* in, word32 inLen, const mp_int* em, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -59881,8 +61219,13 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, "cmp r12, #0x100\n\t" "blt L_sp_4096_cond_add_64_words_%=\n\t" "mov %[r], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -59897,13 +61240,20 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r8, #0\n\t" @@ -60132,8 +61482,13 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, "adcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "adc %[r], r8, r8\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; @@ -60454,11 +61809,17 @@ int sp_ModExp_4096(const mp_int* base, const mp_int* exp, const mp_int* mod, #ifdef WOLFSSL_HAVE_SP_DH #ifdef HAVE_FFDHE_4096 +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_4096_lshift_128(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_4096_lshift_128(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #31\n\t" @@ -61230,8 +62591,13 @@ static void sp_4096_lshift_128(sp_digit* r_p, const sp_digit* a_p, byte n_p) "orr r5, r5, r3\n\t" "str r4, [%[r]]\n\t" "str r5, [%[r], #4]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } @@ -61524,11 +62890,18 @@ static const sp_digit p256_b[8] = { * a A single precision integer. * b A single precision integer. */ -static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x40\n\t" @@ -61711,8 +63084,13 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_256_mul_8_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -61726,11 +63104,18 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p * a A single precision integer. * b A single precision integer. */ -static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -63708,8 +65093,13 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3, r4, r5, r6}\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -63722,11 +65112,18 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p * a A single precision integer. * b A single precision integer. */ -static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #36\n\t" @@ -64062,8 +65459,13 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p "sub %[r], %[r], #32\n\t" "stm %[r], {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #36\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -64076,11 +65478,18 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p * a A single precision integer. * b A single precision integer. */ -static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #44\n\t" @@ -64194,8 +65603,13 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p "ldm sp, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "stm lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr" ); @@ -64209,10 +65623,16 @@ static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x40\n\t" @@ -64355,8 +65775,13 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_256_sqr_8_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -64369,10 +65794,16 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -65567,8 +66998,13 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2, r3, r4, r8}\n\t" "stm %[r]!, {r2, r3, r4, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -65580,10 +67016,16 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -65811,8 +67253,13 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) "sub %[r], %[r], #32\n\t" "stm %[r], {r3, r4, r5, r6, r7, r8, r9, r10}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -65824,10 +67271,16 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #32\n\t" @@ -65928,8 +67381,13 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) "ldm sp, {r0, r1, r2, r3, r4, r5, r6}\n\t" "stm lr, {r0, r1, r2, r3, r4, r5, r6}\n\t" "add sp, sp, #32\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); @@ -65944,11 +67402,18 @@ static void sp_256_sqr_8(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -65968,8 +67433,13 @@ static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* "cmp %[a], r12\n\t" "bne L_sp_256_add_8_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -65983,11 +67453,18 @@ static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -66006,8 +67483,13 @@ static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -66020,11 +67502,18 @@ static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* * a The number to convert. * m The modulus (prime). */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_256_mod_mul_norm_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#else +static int sp_256_mod_mul_norm_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #24\n\t" @@ -66243,12 +67732,21 @@ static int sp_256_mod_mul_norm_8(sp_digit* r_p, const sp_digit* a_p, "stm %[r], {r2, r3, r4, r5, r6, r7, r8, lr}\n\t" "mov %[r], #0\n\t" "add sp, sp, #24\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr", "r10" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ return (word32)(size_t)r; } @@ -66457,12 +67955,19 @@ static int sp_256_point_to_ecc_point_8(const sp_point_256* p, ecc_point* pm) * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -68560,13 +70065,26 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #64]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r12" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #elif defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7) @@ -68579,12 +70097,19 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -69039,13 +70564,26 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #64]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #else @@ -69058,12 +70596,19 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x4c\n\t" @@ -69296,13 +70841,26 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #68]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x4c\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #endif @@ -69314,11 +70872,18 @@ static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, co * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -70496,13 +72061,26 @@ static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #64]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r12", "r8", "r9", "r10", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #elif defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7) @@ -70513,11 +72091,18 @@ static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, co * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -70864,13 +72449,26 @@ static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #64]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #else @@ -70881,11 +72479,18 @@ static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, co * m Modulus (prime). * mp Montgomery multiplier. */ -static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -71106,13 +72711,26 @@ static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, co "ldr %[r], [sp, #64]\n\t" "stm %[r], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #endif @@ -71219,10 +72837,16 @@ static void sp_256_mont_inv_8(sp_digit* r, const sp_digit* a, sp_digit* td) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_256_cmp_8(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_256_cmp_8(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -71339,8 +72963,13 @@ static sp_int32 sp_256_cmp_8(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -71361,13 +72990,20 @@ static sp_int32 sp_256_cmp_8(const sp_digit* a_p, const sp_digit* b_p) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -71386,8 +73022,13 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #32\n\t" "blt L_sp_256_cond_sub_8_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -71402,13 +73043,20 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -71441,8 +73089,13 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -71459,11 +73112,19 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -71729,8 +73390,13 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -71744,11 +73410,19 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -71833,8 +73507,13 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -71848,11 +73527,19 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -71919,8 +73606,13 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -71935,9 +73627,17 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -72071,13 +73771,26 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, "ldr %[a], [sp, #64]\n\t" "stm %[a], {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" "add sp, sp, #0x44\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4) @@ -72087,12 +73800,19 @@ static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -72358,8 +74078,13 @@ static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -72373,12 +74098,19 @@ static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -72463,8 +74195,13 @@ static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -72478,12 +74215,19 @@ static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -72550,8 +74294,13 @@ static SP_NOINLINE void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -72607,12 +74356,19 @@ static void sp_256_map_8(sp_point_256* r, const sp_point_256* p, * b Second number to add in Montgomery form. * m Modulus (prime). */ -static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -72650,12 +74406,21 @@ static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r11, r11, lr, lsr #31\n\t" "sbc r12, r12, lr\n\t" "stm %[r], {r5, r6, r7, r8, r9, r10, r11, r12}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Double a Montgomery form number (r = a + a % m). @@ -72664,10 +74429,17 @@ static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a Number to double in Montgomery form. * m Modulus (prime). */ -static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #0\n\t" @@ -72701,12 +74473,21 @@ static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r10, r10, r2, lsr #31\n\t" "sbc r11, r11, r2\n\t" "stm %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Triple a Montgomery form number (r = a + a + a % m). @@ -72715,10 +74496,17 @@ static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a Number to triple in Montgomery form. * m Modulus (prime). */ -static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -72784,12 +74572,21 @@ static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r10, r10, r12, lsr #31\n\t" "sbc r11, r11, r12\n\t" "stm %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3", "r12" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Subtract two Montgomery form numbers (r = a - b % m). @@ -72799,12 +74596,19 @@ static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit * b Number to subtract with in Montgomery form. * m Modulus (prime). */ -static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_256_mont_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -72840,12 +74644,21 @@ static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "adcs r11, r11, lr, lsr #31\n\t" "adc r12, r12, lr\n\t" "stm %[r], {r5, r6, r7, r8, r9, r10, r11, r12}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Divide the number by 2 mod the modulus (prime). (r = a / 2 % m) @@ -72854,11 +74667,19 @@ static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a Number to divide. * m Modulus (prime). */ -static void sp_256_mont_div2_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_mont_div2_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_256_mont_div2_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r4, r5, r6, r7}\n\t" @@ -72918,8 +74739,13 @@ static void sp_256_mont_div2_8(sp_digit* r_p, const sp_digit* a_p, const sp_digi "orr r10, r10, r7, lsl #31\n\t" "orr r11, r11, r3, lsl #31\n\t" "stm %[r], {r8, r9, r10, r11}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3" ); @@ -76427,9 +78253,15 @@ int sp_ecc_mulmod_base_add_256(const mp_int* km, const ecc_point* am, * * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_add_one_8(sp_digit* a_p) +#else +static void sp_256_add_one_8(sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r1, r2, r3, r4}\n\t" @@ -76444,8 +78276,13 @@ static void sp_256_add_one_8(sp_digit* a_p) "adcs r3, r3, #0\n\t" "adcs r4, r4, #0\n\t" "stm %[a]!, {r1, r2, r3, r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -76484,9 +78321,9 @@ static void sp_256_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -76835,10 +78672,16 @@ int sp_ecc_secret_gen_256_nb(sp_ecc_ctx_t* sp_ctx, const mp_int* priv, * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_256_sub_in_place_8(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -76857,8 +78700,13 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_256_sub_in_pkace_8_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -76871,10 +78719,16 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_256_sub_in_place_8(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -76892,8 +78746,13 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -76907,11 +78766,17 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -76992,8 +78857,13 @@ static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #32\n\t" "blt L_sp_256_mul_d_8_word_%=\n\t" "str r3, [%[r], #32]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -77005,11 +78875,17 @@ static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -77265,8 +79141,13 @@ static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r4}\n\t" "str r5, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -77282,11 +79163,17 @@ static void sp_256_mul_d_8(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -77324,8 +79211,13 @@ static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -77341,11 +79233,17 @@ static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -77462,8 +79360,13 @@ static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -78123,11 +80026,18 @@ int sp_ecc_sign_256_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -78146,8 +80056,13 @@ static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* "cmp %[a], lr\n\t" "bne L_sp_256_sub_8_word_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -78161,11 +80076,18 @@ static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -78183,18 +80105,29 @@ static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } #endif /* WOLFSSL_SP_SMALL */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_256_rshift1_8(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_256_rshift1_8(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -78261,8 +80194,13 @@ static void sp_256_rshift1_8(sp_digit* r_p, const sp_digit* a_p) #else "strd r8, r9, [%[r], #8]\n\t" #endif +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr", "r10" ); @@ -78274,11 +80212,18 @@ static void sp_256_rshift1_8(sp_digit* r_p, const sp_digit* a_p) * a Number to divide. * m Modulus. */ -static void sp_256_div2_mod_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_256_div2_mod_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_256_div2_mod_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -78348,8 +80293,13 @@ static void sp_256_div2_mod_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit "orr r10, r10, r7, lsl #31\n\t" "orr r11, r11, r3, lsl #31\n\t" "stm %[r], {r8, r9, r10, r11}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -78391,11 +80341,21 @@ static const byte L_sp_256_num_bits_8_table[] = { 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, }; +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_256_num_bits_8(const sp_digit* a_p) +#else +static int sp_256_num_bits_8(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register byte* L_sp_256_num_bits_8_table_c asm ("r1") = (byte*)&L_sp_256_num_bits_8_table; +#else + register byte* L_sp_256_num_bits_8_table_c = + (byte*)&L_sp_256_num_bits_8_table; + +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, %[L_sp_256_num_bits_8_table]\n\t" @@ -78707,18 +80667,30 @@ static int sp_256_num_bits_8(const sp_digit* a_p) "\n" "L_sp_256_num_bits_8_9_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [L_sp_256_num_bits_8_table] "+r" (L_sp_256_num_bits_8_table_c) : +#else + : + : [a] "r" (a), + [L_sp_256_num_bits_8_table] "r" (L_sp_256_num_bits_8_table_c) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; } #else +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_256_num_bits_8(const sp_digit* a_p) +#else +static int sp_256_num_bits_8(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r1, [%[a], #28]\n\t" @@ -78791,8 +80763,13 @@ static int sp_256_num_bits_8(const sp_digit* a_p) "\n" "L_sp_256_num_bits_8_9_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; @@ -79877,11 +81854,18 @@ static const sp_digit p384_b[12] = { * a A single precision integer. * b A single precision integer. */ -static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x60\n\t" @@ -80064,8 +82048,13 @@ static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_384_mul_12_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -80078,11 +82067,18 @@ static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * a A single precision integer. * b A single precision integer. */ -static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #48\n\t" @@ -85562,8 +87558,13 @@ static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3, r4, r5, r6}\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -85576,10 +87577,16 @@ static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x60\n\t" @@ -85722,8 +87729,13 @@ static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_384_sqr_12_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -85735,10 +87747,16 @@ static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #48\n\t" @@ -88786,8 +90804,13 @@ static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2, r3, r4, r8}\n\t" "stm %[r]!, {r2, r3, r4, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -88801,11 +90824,18 @@ static void sp_384_sqr_12(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -88825,8 +90855,13 @@ static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit "cmp %[a], r12\n\t" "bne L_sp_384_add_12_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -88840,11 +90875,18 @@ static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -88870,8 +90912,13 @@ static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -89183,13 +91230,20 @@ static int sp_384_point_to_ecc_point_12(const sp_point_384* p, ecc_point* pm) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -89208,8 +91262,13 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #48\n\t" "blt L_sp_384_cond_sub_12_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -89224,13 +91283,20 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -89277,8 +91343,13 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -89294,11 +91365,19 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -89680,8 +91759,13 @@ static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -89695,11 +91779,19 @@ static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -89816,8 +91908,13 @@ static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p "str r12, [%[a]]\n\t" "str lr, [%[a], #4]\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -89831,11 +91928,19 @@ static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -89922,8 +92027,13 @@ static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p "str r7, [%[a], #12]\n\t" "str r8, [%[a], #16]\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -90080,10 +92190,16 @@ static void sp_384_mont_inv_12(sp_digit* r, const sp_digit* a, sp_digit* td) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_384_cmp_12(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_384_cmp_12(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -90244,8 +92360,13 @@ static sp_int32 sp_384_cmp_12(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -90304,13 +92425,20 @@ static void sp_384_map_12(sp_point_384* r, const sp_point_384* p, * b Second number to add in Montgomery form. * m Modulus (prime). */ -static void sp_384_mont_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mont_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_384_mont_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register const sp_digit* m asm ("r3") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ sp_digit o; @@ -90324,11 +92452,19 @@ static void sp_384_mont_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a Number to double in Montgomery form. * m Modulus (prime). */ -static void sp_384_mont_dbl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mont_dbl_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_384_mont_dbl_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ sp_digit o; @@ -90342,11 +92478,19 @@ static void sp_384_mont_dbl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a Number to triple in Montgomery form. * m Modulus (prime). */ -static void sp_384_mont_tpl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mont_tpl_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_384_mont_tpl_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ sp_digit o; @@ -90363,11 +92507,18 @@ static void sp_384_mont_tpl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -90386,8 +92537,13 @@ static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit "cmp %[a], lr\n\t" "bne L_sp_384_sub_12_word_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -90401,11 +92557,18 @@ static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -90430,8 +92593,13 @@ static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -90447,13 +92615,20 @@ static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -90472,8 +92647,13 @@ static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, "cmp r12, #48\n\t" "blt L_sp_384_cond_add_12_words_%=\n\t" "mov %[r], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -90488,13 +92668,20 @@ static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r8, #0\n\t" @@ -90541,8 +92728,13 @@ static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, "adcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "adc %[r], r8, r8\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; @@ -90556,13 +92748,20 @@ static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, * b Number to subtract with in Montgomery form. * m Modulus (prime). */ -static void sp_384_mont_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_mont_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_384_mont_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register const sp_digit* m asm ("r3") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ sp_digit o; @@ -90573,10 +92772,16 @@ static void sp_384_mont_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi #ifdef WOLFSSL_SP_SMALL #else #endif /* WOLFSSL_SP_SMALL */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_rshift1_12(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_384_rshift1_12(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3}\n\t" @@ -90625,8 +92830,13 @@ static void sp_384_rshift1_12(sp_digit* r_p, const sp_digit* a_p) "lsr r4, r4, #1\n\t" "str r3, [%[r], #40]\n\t" "str r4, [%[r], #44]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4" ); } @@ -94206,9 +96416,15 @@ int sp_ecc_mulmod_base_add_384(const mp_int* km, const ecc_point* am, * * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_add_one_12(sp_digit* a_p) +#else +static void sp_384_add_one_12(sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r1, r2, r3, r4}\n\t" @@ -94229,8 +96445,13 @@ static void sp_384_add_one_12(sp_digit* a_p) "adcs r3, r3, #0\n\t" "adcs r4, r4, #0\n\t" "stm %[a]!, {r1, r2, r3, r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -94269,9 +96490,9 @@ static void sp_384_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -94620,10 +96841,16 @@ int sp_ecc_secret_gen_384_nb(sp_ecc_ctx_t* sp_ctx, const mp_int* priv, * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_384_sub_in_place_12(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -94642,8 +96869,13 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_384_sub_in_pkace_12_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -94656,10 +96888,16 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_384_sub_in_place_12(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -94684,8 +96922,13 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -94699,11 +96942,17 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -94784,8 +97033,13 @@ static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #48\n\t" "blt L_sp_384_mul_d_12_word_%=\n\t" "str r3, [%[r], #48]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -94797,11 +97051,17 @@ static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -95185,8 +97445,13 @@ static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r5}\n\t" "str r3, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -95202,11 +97467,17 @@ static void sp_384_mul_d_12(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -95244,8 +97515,13 @@ static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -95261,11 +97537,17 @@ static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -95382,8 +97664,13 @@ static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -96013,11 +98300,19 @@ int sp_ecc_sign_384_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * a Number to divide. * m Modulus. */ -static void sp_384_div2_mod_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_384_div2_mod_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_384_div2_mod_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r4}\n\t" @@ -96109,8 +98404,13 @@ static void sp_384_div2_mod_12(sp_digit* r_p, const sp_digit* a_p, const sp_digi "orr r10, r10, r3, lsl #31\n\t" "str r9, [%[r], #40]\n\t" "str r10, [%[r], #44]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -96152,11 +98452,21 @@ static const byte L_sp_384_num_bits_12_table[] = { 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, }; +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_384_num_bits_12(const sp_digit* a_p) +#else +static int sp_384_num_bits_12(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register byte* L_sp_384_num_bits_12_table_c asm ("r1") = (byte*)&L_sp_384_num_bits_12_table; +#else + register byte* L_sp_384_num_bits_12_table_c = + (byte*)&L_sp_384_num_bits_12_table; + +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, %[L_sp_384_num_bits_12_table]\n\t" @@ -96699,18 +99009,30 @@ static int sp_384_num_bits_12(const sp_digit* a_p) "\n" "L_sp_384_num_bits_12_13_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [L_sp_384_num_bits_12_table] "+r" (L_sp_384_num_bits_12_table_c) : +#else + : + : [a] "r" (a), + [L_sp_384_num_bits_12_table] "r" (L_sp_384_num_bits_12_table_c) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; } #else +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_384_num_bits_12(const sp_digit* a_p) +#else +static int sp_384_num_bits_12(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r1, [%[a], #44]\n\t" @@ -96839,8 +99161,13 @@ static int sp_384_num_bits_12(const sp_digit* a_p) "\n" "L_sp_384_num_bits_12_13_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; @@ -97971,11 +100298,18 @@ static const sp_digit p521_b[17] = { * a A single precision integer. * b A single precision integer. */ -static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x88\n\t" @@ -98161,8 +100495,13 @@ static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_521_mul_17_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -98175,11 +100514,18 @@ static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * a A single precision integer. * b A single precision integer. */ -static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -109178,8 +111524,13 @@ static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3}\n\t" "stm %[r]!, {r3}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -109192,10 +111543,16 @@ static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_ * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x88\n\t" @@ -109341,8 +111698,13 @@ static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_521_sqr_17_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -109354,10 +111716,16 @@ static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -115214,8 +117582,13 @@ static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2}\n\t" "stm %[r]!, {r2}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -115229,11 +117602,18 @@ static void sp_521_sqr_17(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -115259,8 +117639,13 @@ static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit "stm %[r]!, {r4}\n\t" "mov r4, #0\n\t" "adc %[r], r4, #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -115274,11 +117659,18 @@ static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -115315,8 +117707,13 @@ static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit "stm %[r]!, {r3}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -115545,13 +117942,20 @@ static int sp_521_point_to_ecc_point_17(const sp_point_521* p, ecc_point* pm) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -115570,8 +117974,13 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x44\n\t" "blt L_sp_521_cond_sub_17_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -115586,13 +117995,20 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -115658,8 +118074,13 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, "sbcs r4, r4, r6\n\t" "str r4, [%[r]]\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -115672,9 +118093,17 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_521_mont_reduce_17(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_521_mont_reduce_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_521_mont_reduce_17(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x44\n\t" @@ -115785,13 +118214,26 @@ static SP_NOINLINE void sp_521_mont_reduce_17(sp_digit* a_p, const sp_digit* m_p "adcs r7, r7, #0\n\t" "adcs r8, r8, #0\n\t" "stm %[a]!, {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)mp_p; +#else + (void)mp; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } #if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4) @@ -115801,12 +118243,19 @@ static SP_NOINLINE void sp_521_mont_reduce_17(sp_digit* a_p, const sp_digit* m_p * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -116415,8 +118864,13 @@ static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digi "lsr r3, r4, #9\n\t" "add %[a], %[a], #4\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -116430,12 +118884,19 @@ static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digi * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -116674,8 +119135,13 @@ static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digi "lsr r3, r4, #9\n\t" "add %[a], %[a], #4\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -116689,12 +119155,19 @@ static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digi * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digit* m_p, - sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a, + const sp_digit* m, sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -116888,8 +119361,13 @@ static SP_NOINLINE void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digi "lsr lr, r10, #9\n\t" "add %[a], %[a], #4\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -117043,10 +119521,16 @@ static void sp_521_mont_inv_17(sp_digit* r, const sp_digit* a, sp_digit* td) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_521_cmp_17(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_521_cmp_17(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -117262,8 +119746,13 @@ static sp_int32 sp_521_cmp_17(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -117322,12 +119811,19 @@ static void sp_521_map_17(sp_point_521* r, const sp_point_521* p, * b Second number to add in Montgomery form. * m Modulus (prime). */ -static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_521_mont_add_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -117395,12 +119891,21 @@ static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi "ldm %[r], {r4}\n\t" "adcs r4, r4, #0\n\t" "stm %[r]!, {r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Double a Montgomery form number (r = a + a % m). @@ -117409,10 +119914,18 @@ static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a Number to double in Montgomery form. * m Modulus (prime). */ -static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_521_mont_dbl_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #0\n\t" @@ -117471,12 +119984,21 @@ static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi "ldm %[r], {r4}\n\t" "adcs r4, r4, #0\n\t" "stm %[r]!, {r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Triple a Montgomery form number (r = a + a + a % m). @@ -117485,10 +120007,18 @@ static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a Number to triple in Montgomery form. * m Modulus (prime). */ -static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_521_mont_tpl_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #0\n\t" @@ -117567,12 +120097,21 @@ static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi "ldm %[r], {r4}\n\t" "adcs r4, r4, #0\n\t" "stm %[r]!, {r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } /* Subtract two Montgomery form numbers (r = a - b % m). @@ -117582,12 +120121,19 @@ static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi * b Number to subtract with in Montgomery form. * m Modulus (prime). */ -static void sp_521_mont_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, - const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_mont_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_521_mont_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -117656,18 +120202,33 @@ static void sp_521_mont_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi "ldm %[r], {r4}\n\t" "sbcs r4, r4, #0\n\t" "stm %[r]!, {r4}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; +#else + (void)m; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ } +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_rshift1_17(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_521_rshift1_17(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3}\n\t" @@ -117736,8 +120297,13 @@ static void sp_521_rshift1_17(sp_digit* r_p, const sp_digit* a_p) "lsr r3, r3, #1\n\t" "str r2, [%[r], #60]\n\t" "str r3, [%[r], #64]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4" ); } @@ -121939,9 +124505,15 @@ int sp_ecc_mulmod_base_add_521(const mp_int* km, const ecc_point* am, * * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_add_one_17(sp_digit* a_p) +#else +static void sp_521_add_one_17(sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r1, r2, r3, r4}\n\t" @@ -121971,8 +124543,13 @@ static void sp_521_add_one_17(sp_digit* a_p) "ldm %[a], {r1}\n\t" "adcs r1, r1, #0\n\t" "stm %[a]!, {r1}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -122011,9 +124588,9 @@ static void sp_521_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -122355,11 +124932,17 @@ int sp_ecc_secret_gen_521_nb(sp_ecc_ctx_t* sp_ctx, const mp_int* priv, #endif /* HAVE_ECC_DHE */ #if defined(HAVE_ECC_SIGN) || defined(HAVE_ECC_VERIFY) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_rshift_17(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_521_rshift_17(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #32\n\t" @@ -122453,8 +125036,13 @@ static void sp_521_rshift_17(sp_digit* r_p, const sp_digit* a_p, byte n_p) #else "strd r4, r5, [%[r], #60]\n\t" #endif +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } @@ -122463,11 +125051,17 @@ static void sp_521_rshift_17(sp_digit* r_p, const sp_digit* a_p, byte n_p) #if defined(HAVE_ECC_SIGN) || defined(HAVE_ECC_VERIFY) #endif #if defined(HAVE_ECC_SIGN) || defined(HAVE_ECC_VERIFY) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_lshift_17(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_521_lshift_17(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #31\n\t" @@ -122573,17 +125167,28 @@ static void sp_521_lshift_17(sp_digit* r_p, const sp_digit* a_p, byte n_p) "orr r5, r5, r3\n\t" "str r4, [%[r]]\n\t" "str r5, [%[r], #4]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_lshift_34(sp_digit* r_p, const sp_digit* a_p, byte n_p) +#else +static void sp_521_lshift_34(sp_digit* r, const sp_digit* a, byte n) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register byte n asm ("r2") = (byte)n_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "rsb r12, %[n], #31\n\t" @@ -122791,8 +125396,13 @@ static void sp_521_lshift_34(sp_digit* r_p, const sp_digit* a_p, byte n_p) "orr r6, r6, r3\n\t" "str r5, [%[r]]\n\t" "str r6, [%[r], #4]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : +#else + : + : [r] "r" (r), [a] "r" (a), [n] "r" (n) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r3", "r12" ); } @@ -122803,10 +125413,16 @@ static void sp_521_lshift_34(sp_digit* r_p, const sp_digit* a_p, byte n_p) * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_521_sub_in_place_17(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -122830,8 +125446,13 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) "sbcs r2, r2, r6\n\t" "stm %[a]!, {r2}\n\t" "sbc %[a], %[a], %[a]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -122844,10 +125465,16 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_521_sub_in_place_17(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -122883,8 +125510,13 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) "sbcs r2, r2, r6\n\t" "stm %[a]!, {r2}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -122898,11 +125530,17 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -122983,8 +125621,13 @@ static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x44\n\t" "blt L_sp_521_mul_d_17_word_%=\n\t" "str r3, [%[r], #68]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -122996,11 +125639,17 @@ static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -123544,8 +126193,13 @@ static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r4}\n\t" "str r5, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -123561,11 +126215,17 @@ static void sp_521_mul_d_17(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -123603,8 +126263,13 @@ static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -123620,11 +126285,17 @@ static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -123741,8 +126412,13 @@ static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -124403,11 +127079,18 @@ int sp_ecc_sign_521_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -124431,8 +127114,13 @@ static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r3, r3, r7\n\t" "stm %[r]!, {r3}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "lr" ); @@ -124446,11 +127134,18 @@ static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -124486,8 +127181,13 @@ static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit "sbcs r3, r3, r7\n\t" "stm %[r]!, {r3}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -124500,11 +127200,19 @@ static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit * a Number to divide. * m Modulus. */ -static void sp_521_div2_mod_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_521_div2_mod_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) +#else +static void sp_521_div2_mod_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r4}\n\t" @@ -124631,8 +127339,13 @@ static void sp_521_div2_mod_17(sp_digit* r_p, const sp_digit* a_p, const sp_digi "orr r9, r9, r3, lsl #31\n\t" "str r8, [%[r], #60]\n\t" "str r9, [%[r], #64]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -124674,11 +127387,21 @@ static const byte L_sp_521_num_bits_17_table[] = { 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, }; +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_521_num_bits_17(const sp_digit* a_p) +#else +static int sp_521_num_bits_17(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register byte* L_sp_521_num_bits_17_table_c asm ("r1") = (byte*)&L_sp_521_num_bits_17_table; +#else + register byte* L_sp_521_num_bits_17_table_c = + (byte*)&L_sp_521_num_bits_17_table; + +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, %[L_sp_521_num_bits_17_table]\n\t" @@ -125511,18 +128234,30 @@ static int sp_521_num_bits_17(const sp_digit* a_p) "\n" "L_sp_521_num_bits_17_18_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [L_sp_521_num_bits_17_table] "+r" (L_sp_521_num_bits_17_table_c) : +#else + : + : [a] "r" (a), + [L_sp_521_num_bits_17_table] "r" (L_sp_521_num_bits_17_table_c) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; } #else +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static int sp_521_num_bits_17(const sp_digit* a_p) +#else +static int sp_521_num_bits_17(const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r1, [%[a], #64]\n\t" @@ -125716,8 +128451,13 @@ static int sp_521_num_bits_17(const sp_digit* a_p) "\n" "L_sp_521_num_bits_17_18_%=: \n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a) : +#else + : + : [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r1", "r2", "r3", "r12", "lr" ); return (word32)(size_t)a; @@ -126731,11 +129471,18 @@ typedef struct sp_point_1024 { * a A single precision integer. * b A single precision integer. */ -static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_1024_mul_16(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x40\n\t" @@ -136477,8 +139224,13 @@ static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r5, r6}\n\t" "ldm sp!, {r3, r4, r5, r6}\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12" ); @@ -136489,10 +139241,16 @@ static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_sqr_16(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x40\n\t" @@ -141710,8 +144468,13 @@ static void sp_1024_sqr_16(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r2, r3, r4, r8}\n\t" "ldm sp!, {r2, r3, r4, r8}\n\t" "stm %[r]!, {r2, r3, r4, r8}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12" ); @@ -141723,11 +144486,19 @@ static void sp_1024_sqr_16(sp_digit* r_p, const sp_digit* a_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_1024_add_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -141760,8 +144531,13 @@ static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -141772,10 +144548,16 @@ static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer and result. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3, r4, r5}\n\t" @@ -141835,8 +144617,13 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) "sbcs r5, r5, r9\n\t" "stm %[a]!, {r2, r3, r4, r5}\n\t" "sbc %[a], r9, r9\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; @@ -141848,11 +144635,19 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -141913,8 +144708,13 @@ static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi "stm %[r]!, {r3, r4, r5, r6}\n\t" "mov %[r], #0\n\t" "adc %[r], %[r], #0\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -141995,11 +144795,19 @@ SP_NOINLINE static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_1024_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_1024_sub_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_1024_sub_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r3, r4, r5, r6}\n\t" @@ -142031,8 +144839,13 @@ static sp_digit sp_1024_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digi "sbcs r6, r6, r10\n\t" "stm %[r]!, {r3, r4, r5, r6}\n\t" "sbc %[r], r6, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; @@ -142081,11 +144894,18 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) * a A single precision integer. * b A single precision integer. */ -static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x100\n\t" @@ -142268,8 +145088,13 @@ static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_1024_mul_32_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -142280,10 +145105,16 @@ static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b * r A single precision integer. * a A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_sqr_32(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "sub sp, sp, #0x100\n\t" @@ -142426,8 +145257,13 @@ static void sp_1024_sqr_32(sp_digit* r_p, const sp_digit* a_p) "stm %[r]!, {r3, r4, r6, r7, r8, r9, r10, r11}\n\t" "subs r5, r5, #32\n\t" "bgt L_sp_1024_sqr_32_store_%=\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11" ); @@ -142525,10 +145361,16 @@ static const sp_point_1024 p1024_base = { * a A single precision integer. * b A single precision integer. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) +#else +static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -142547,8 +145389,13 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) "cmp %[a], lr\n\t" "bne L_sp_1024_sub_in_pkace_32_word_%=\n\t" "mov %[a], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r12", "lr" ); @@ -142565,13 +145412,20 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a_p, const sp_digit* b_p) * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r6, #0\n\t" @@ -142590,8 +145444,13 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, "cmp lr, #0x80\n\t" "blt L_sp_1024_cond_sub_32_words_%=\n\t" "mov %[r], r12\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -142606,13 +145465,20 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to subtract. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -142729,8 +145595,13 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, "sbcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "sbc %[r], lr, lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7" ); return (word32)(size_t)r; @@ -142744,11 +145615,19 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, * a A single precision integer. * b A single precision integer. */ -static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) +#else +static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r3, #0\n\t" @@ -142768,8 +145647,13 @@ static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi "cmp %[a], r12\n\t" "bne L_sp_1024_add_32_word_%=\n\t" "mov %[r], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12" ); @@ -142784,11 +145668,17 @@ static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digi * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -142869,8 +145759,13 @@ static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) "cmp r9, #0x80\n\t" "blt L_sp_1024_mul_d_32_word_%=\n\t" "str r3, [%[r], #128]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -142882,11 +145777,17 @@ static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * a A single precision integer. * b A single precision digit. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) +#else +static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register sp_digit b asm ("r2") = (sp_digit)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* A[0] * B */ @@ -143910,8 +146811,13 @@ static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) #endif "stm %[r]!, {r4}\n\t" "str r5, [%[r]]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -143927,11 +146833,17 @@ static void sp_1024_mul_d_32(sp_digit* r_p, const sp_digit* a_p, sp_digit b_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr r6, %[div], #16\n\t" @@ -143969,8 +146881,13 @@ static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "sub %[d0], %[d0], r3\n\t" "udiv r3, %[d0], %[div]\n\t" "add %[d1], r4, r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -143986,11 +146903,17 @@ static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) * * Note that this is an approximate div. It may give an answer 1 larger. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +#else +static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit div) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit d1 asm ("r0") = (sp_digit)d1_p; register sp_digit d0 asm ("r1") = (sp_digit)d0_p; register sp_digit div asm ("r2") = (sp_digit)div_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "lsr lr, %[div], #1\n\t" @@ -144107,8 +147030,13 @@ static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) "subs r6, %[div], r7\n\t" "sbc r6, r6, r6\n\t" "sub %[d1], r3, r6\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : +#else + : + : [d1] "r" (d1), [d0] "r" (d0), [div] "r" (div) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)d1; @@ -144152,10 +147080,16 @@ static void sp_1024_mask_32(sp_digit* r, const sp_digit* a, sp_digit m) * return -ve, 0 or +ve if a is less than, equal to or greater than b * respectively. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_int32 sp_1024_cmp_32(const sp_digit* a_p, const sp_digit* b_p) +#else +static sp_int32 sp_1024_cmp_32(const sp_digit* a, const sp_digit* b) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register const sp_digit* a asm ("r0") = (const sp_digit*)a_p; register const sp_digit* b asm ("r1") = (const sp_digit*)b_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r2, #-1\n\t" @@ -144536,8 +147470,13 @@ static sp_int32 sp_1024_cmp_32(const sp_digit* a_p, const sp_digit* b_p) "eor r2, r2, r3\n\t" #endif /*WOLFSSL_SP_SMALL */ "mov %[a], r2\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [b] "+r" (b) : +#else + : + : [a] "r" (a), [b] "r" (b) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)a; @@ -144879,11 +147818,19 @@ static int sp_1024_point_to_ecc_point_32(const sp_point_1024* p, ecc_point* pm) * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( #if !(defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 4)) @@ -145850,8 +148797,13 @@ static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "sbc r10, r10, r10\n\t" "orr r3, r3, r10\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -145865,11 +148817,19 @@ static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldr r11, [%[m]]\n\t" @@ -146151,8 +149111,13 @@ static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "sbc r10, r10, r10\n\t" "orr r3, r3, r10\n\t" "mov %[mp], r3\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -146166,11 +149131,19 @@ static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ * m The single precision number representing the modulus. * mp The digit representing the negative inverse of m mod 2^n. */ -static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) +#else +static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* a asm ("r0") = (sp_digit*)a_p; register const sp_digit* m asm ("r1") = (const sp_digit*)m_p; register sp_digit mp asm ("r2") = (sp_digit)mp_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( /* i = 0 */ @@ -146362,8 +149335,13 @@ static SP_NOINLINE void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_ "sbc r3, r3, r3\n\t" "orr lr, lr, r3\n\t" "mov %[mp], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : +#else + : + : [a] "r" (a), [m] "r" (m), [mp] "r" (mp) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11" ); @@ -146515,13 +149493,20 @@ static void sp_1024_map_32(sp_point_1024* r, const sp_point_1024* p, * b Second number to add in Montgomery form. * m Modulus (prime). */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mont_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_1024_mont_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register const sp_digit* m asm ("r3") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -146676,8 +149661,13 @@ static void sp_1024_mont_add_32(sp_digit* r_p, const sp_digit* a_p, "sbcs r6, r6, r10\n\t" "sbc r7, r7, r11\n\t" "stm %[r]!, {r4, r5, r6, r7}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12" ); @@ -146689,12 +149679,19 @@ static void sp_1024_mont_add_32(sp_digit* r_p, const sp_digit* a_p, * a Number to double in Montgomery form. * m Modulus (prime). */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mont_dbl_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#else +static void sp_1024_mont_dbl_32(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -146833,8 +149830,13 @@ static void sp_1024_mont_dbl_32(sp_digit* r_p, const sp_digit* a_p, "sbcs r6, r6, r10\n\t" "sbc r7, r7, r11\n\t" "stm %[r]!, {r4, r5, r6, r7}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", "r12" ); @@ -146846,12 +149848,19 @@ static void sp_1024_mont_dbl_32(sp_digit* r_p, const sp_digit* a_p, * a Number to triple in Montgomery form. * m Modulus (prime). */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mont_tpl_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +#else +static void sp_1024_mont_tpl_32(sp_digit* r, const sp_digit* a, + const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* m asm ("r2") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r12, #0\n\t" @@ -147145,8 +150154,13 @@ static void sp_1024_mont_tpl_32(sp_digit* r_p, const sp_digit* a_p, "sbcs r6, r6, r10\n\t" "sbc r7, r7, r11\n\t" "stm %[r]!, {r4, r5, r6, r7}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", "r12" ); @@ -147159,13 +150173,20 @@ static void sp_1024_mont_tpl_32(sp_digit* r_p, const sp_digit* a_p, * b Number to subtract with in Montgomery form. * m Modulus (prime). */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_mont_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +#else +static void sp_1024_mont_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register const sp_digit* m asm ("r3") = (const sp_digit*)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a]!, {r4, r5, r6, r7}\n\t" @@ -147314,8 +150335,13 @@ static void sp_1024_mont_sub_32(sp_digit* r_p, const sp_digit* a_p, "adcs r6, r6, r10\n\t" "adc r7, r7, r11\n\t" "stm %[r]!, {r4, r5, r6, r7}\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12" ); @@ -147330,13 +150356,20 @@ static void sp_1024_mont_sub_32(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov lr, #0\n\t" @@ -147355,8 +150388,13 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, "cmp r12, #0x80\n\t" "blt L_sp_1024_cond_add_32_words_%=\n\t" "mov %[r], lr\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6" ); return (word32)(size_t)r; @@ -147371,13 +150409,20 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, * b A single precision number to add. * m Mask value to apply. */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +#else +static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; register const sp_digit* b asm ("r2") = (const sp_digit*)b_p; register sp_digit m asm ("r3") = (sp_digit)m_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "mov r8, #0\n\t" @@ -147494,18 +150539,29 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, "adcs r5, r5, r7\n\t" "stm %[r]!, {r4, r5}\n\t" "adc %[r], r8, r8\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : +#else + : + : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r12", "lr", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } #endif /* WOLFSSL_SP_SMALL */ +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG static void sp_1024_rshift1_32(sp_digit* r_p, const sp_digit* a_p) +#else +static void sp_1024_rshift1_32(sp_digit* r, const sp_digit* a) +#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */ { +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG register sp_digit* r asm ("r0") = (sp_digit*)r_p; register const sp_digit* a asm ("r1") = (const sp_digit*)a_p; +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ __asm__ __volatile__ ( "ldm %[a], {r2, r3}\n\t" @@ -147634,8 +150690,13 @@ static void sp_1024_rshift1_32(sp_digit* r_p, const sp_digit* a_p) "lsr r3, r3, #1\n\t" "str r2, [%[r], #120]\n\t" "str r3, [%[r], #124]\n\t" +#ifndef WOLFSSL_NO_VAR_ASSIGN_REG : [r] "+r" (r), [a] "+r" (a) : +#else + : + : [r] "r" (r), [a] "r" (a) +#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ : "memory", "cc", "r2", "r3", "r4" ); } @@ -156602,9 +159663,9 @@ static void sp_1024_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; diff --git a/wolfcrypt/src/sp_armthumb.c b/wolfcrypt/src/sp_armthumb.c index c9471fcb7..4868f7f93 100644 --- a/wolfcrypt/src/sp_armthumb.c +++ b/wolfcrypt/src/sp_armthumb.c @@ -109,9 +109,9 @@ static void sp_2048_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -30300,9 +30300,9 @@ static void sp_3072_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -83394,9 +83394,9 @@ static void sp_4096_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -103938,9 +103938,9 @@ static void sp_256_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -114847,9 +114847,9 @@ static void sp_384_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -129089,9 +129089,9 @@ static void sp_521_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -218532,9 +218532,9 @@ static void sp_1024_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; diff --git a/wolfcrypt/src/sp_cortexm.c b/wolfcrypt/src/sp_cortexm.c index b4d3b8e7e..fc756ffbe 100644 --- a/wolfcrypt/src/sp_cortexm.c +++ b/wolfcrypt/src/sp_cortexm.c @@ -109,9 +109,9 @@ static void sp_2048_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -252,9 +252,11 @@ static void sp_2048_to_bin_64(sp_digit* r, byte* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +SP_NOINLINE static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -599,7 +601,8 @@ SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_d "ADD sp, sp, #0x24\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -611,9 +614,11 @@ SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_d * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +SP_NOINLINE static void sp_2048_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -736,7 +741,8 @@ SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_d "ADD sp, sp, #0x2c\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", + "r8", "r9", "lr" ); } @@ -748,7 +754,8 @@ SP_NOINLINE static void sp_2048_mul_8(sp_digit* r, const sp_digit* a, const sp_d * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_2048_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -778,7 +785,7 @@ static sp_digit sp_2048_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -831,7 +838,7 @@ static sp_digit sp_2048_sub_in_place_16(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -843,9 +850,11 @@ static sp_digit sp_2048_sub_in_place_16(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_add_16(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_add_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -887,7 +896,7 @@ static sp_digit sp_2048_add_16(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -1033,7 +1042,7 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -1045,9 +1054,11 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -1117,7 +1128,7 @@ static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -1323,7 +1334,7 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -1335,9 +1346,11 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -1463,7 +1476,7 @@ static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -1782,7 +1795,8 @@ SP_NOINLINE static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) "ADD sp, sp, #0x44\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -1899,7 +1913,8 @@ SP_NOINLINE static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) "ADD sp, sp, #0x20\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -1911,7 +1926,8 @@ SP_NOINLINE static void sp_2048_sqr_8(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_2048_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -1940,7 +1956,7 @@ static sp_digit sp_2048_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -1988,9 +2004,11 @@ SP_NOINLINE static void sp_2048_sqr_16(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_sub_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_sub_16(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_sub_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -2031,7 +2049,7 @@ static sp_digit sp_2048_sub_16(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -2079,9 +2097,11 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -2150,7 +2170,7 @@ static sp_digit sp_2048_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -2200,9 +2220,11 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -2241,7 +2263,8 @@ static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -2293,7 +2316,8 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -2307,7 +2331,8 @@ static sp_digit sp_2048_sub_in_place_64(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_2048_mul_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -2421,7 +2446,8 @@ static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -2538,7 +2564,8 @@ static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -2569,9 +2596,11 @@ static void sp_2048_mask_32(sp_digit* r, const sp_digit* a, sp_digit m) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -2610,7 +2639,8 @@ static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -2662,7 +2692,8 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -2676,7 +2707,8 @@ static sp_digit sp_2048_sub_in_place_32(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_2048_mul_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -2790,7 +2822,8 @@ static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -2907,7 +2940,8 @@ static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -2989,7 +3023,7 @@ static void sp_2048_mul_d_64(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #256]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -3335,7 +3369,7 @@ static void sp_2048_mul_d_64(sp_digit* r, const sp_digit* a, sp_digit b) "STR r4, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -3365,9 +3399,11 @@ static void sp_2048_mont_norm_32(sp_digit* r, const sp_digit* m) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -3406,7 +3442,7 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -3421,9 +3457,11 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -3550,7 +3588,7 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -3565,9 +3603,11 @@ static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -3863,7 +3903,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_2048_cond_sub_32(a - 32, a, m, (sp_digit)0 - mp); } @@ -3876,9 +3917,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -3981,7 +4024,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_2048_cond_sub_32(a - 32, a, m, (sp_digit)0 - mp); } @@ -3996,9 +4040,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -4204,7 +4250,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_2048_cond_sub_32(a - 32, a, m, (sp_digit)0 - mp); } @@ -4217,9 +4264,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -4310,7 +4359,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_2048_cond_sub_32(a - 32, a, m, (sp_digit)0 - mp); } @@ -4402,7 +4452,7 @@ static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #128]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -4588,7 +4638,7 @@ static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) "STR r5, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -4604,9 +4654,11 @@ static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -4653,7 +4705,7 @@ SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -4669,9 +4721,11 @@ SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -4735,7 +4789,7 @@ SP_NOINLINE static sp_digit div_2048_word_32(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -5148,7 +5202,7 @@ static sp_int32 sp_2048_cmp_32(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -5557,9 +5611,11 @@ static void sp_2048_mont_norm_64(sp_digit* r, const sp_digit* m) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -5598,7 +5654,7 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -5613,9 +5669,11 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -5854,7 +5912,7 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_dig "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -5869,9 +5927,11 @@ static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, const sp_dig * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -6423,7 +6483,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_2048_cond_sub_64(a - 64, a, m, (sp_digit)0 - mp); } @@ -6436,9 +6497,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -6541,7 +6604,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_2048_cond_sub_64(a - 64, a, m, (sp_digit)0 - mp); } @@ -6556,9 +6620,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -6924,7 +6990,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_2048_cond_sub_64(a - 64, a, m, (sp_digit)0 - mp); } @@ -6937,9 +7004,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -7030,7 +7099,8 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_2048_cond_sub_64(a - 64, a, m, (sp_digit)0 - mp); } @@ -7075,9 +7145,11 @@ SP_NOINLINE static void sp_2048_mont_sqr_64(sp_digit* r, const sp_digit* a, * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -7115,7 +7187,8 @@ static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r11\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -7128,9 +7201,11 @@ static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_2048_sub_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -7255,7 +7330,7 @@ static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -7272,9 +7347,11 @@ static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, const sp_digit* b * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -7321,7 +7398,7 @@ SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -7337,9 +7414,11 @@ SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -7403,7 +7482,7 @@ SP_NOINLINE static sp_digit div_2048_word_64(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -8271,7 +8350,7 @@ static sp_int32 sp_2048_cmp_64(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -8802,9 +8881,11 @@ int sp_RsaPublic_2048(const byte* in, word32 inLen, const mp_int* em, * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -8843,7 +8924,7 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -8858,9 +8939,11 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_2048_cond_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -8987,7 +9070,7 @@ static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig "ADC %[r], r10, r10\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -9707,7 +9790,7 @@ static void sp_2048_lshift_64(sp_digit* r, const sp_digit* a, byte n) "STR r6, [%[r], #4]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -9994,9 +10077,9 @@ static void sp_3072_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -10136,7 +10219,8 @@ static void sp_3072_to_bin_96(sp_digit* r, byte* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_3072_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -11152,7 +11236,8 @@ static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "STM %[r]!, {r3, r4, r5, r6}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", + "r12" ); } @@ -11163,9 +11248,11 @@ static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -11200,7 +11287,7 @@ static sp_digit sp_3072_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -11267,7 +11354,7 @@ static sp_digit sp_3072_sub_in_place_24(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -11279,9 +11366,11 @@ static sp_digit sp_3072_sub_in_place_24(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_24(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_24(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_24(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_24(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -11337,7 +11426,7 @@ static sp_digit sp_3072_add_24(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -11515,7 +11604,7 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -11527,9 +11616,11 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -11627,7 +11718,7 @@ static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -11889,7 +11980,7 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -11901,9 +11992,11 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -12085,7 +12178,7 @@ static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -12855,7 +12948,8 @@ static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "STM %[r]!, {r2, r3, r4, r8}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r12" ); } @@ -12866,9 +12960,11 @@ static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -12902,7 +12998,7 @@ static sp_digit sp_3072_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -12950,9 +13046,11 @@ SP_NOINLINE static void sp_3072_sqr_24(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_sub_24(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_sub_24(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_sub_24(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_sub_24(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -13007,7 +13105,7 @@ static sp_digit sp_3072_sub_24(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -13055,9 +13153,11 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_sub_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_sub_48(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -13154,7 +13254,7 @@ static sp_digit sp_3072_sub_48(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -13204,9 +13304,11 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -13245,7 +13347,8 @@ static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -13297,7 +13400,8 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -13311,7 +13415,8 @@ static sp_digit sp_3072_sub_in_place_96(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_3072_mul_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -13425,7 +13530,8 @@ static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -13542,7 +13648,8 @@ static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -13573,9 +13680,11 @@ static void sp_3072_mask_48(sp_digit* r, const sp_digit* a, sp_digit m) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -13614,7 +13723,8 @@ static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -13666,7 +13776,8 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -13680,7 +13791,8 @@ static sp_digit sp_3072_sub_in_place_48(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_3072_mul_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -13794,7 +13906,8 @@ static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -13911,7 +14024,8 @@ static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -13993,7 +14107,7 @@ static void sp_3072_mul_d_96(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #384]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -14499,7 +14613,7 @@ static void sp_3072_mul_d_96(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -14529,9 +14643,11 @@ static void sp_3072_mont_norm_48(sp_digit* r, const sp_digit* m) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -14570,7 +14686,7 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -14585,9 +14701,11 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_sub_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -14770,7 +14888,7 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_dig "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -14785,9 +14903,11 @@ static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, const sp_dig * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -15211,7 +15331,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_3072_cond_sub_48(a - 48, a, m, (sp_digit)0 - mp); } @@ -15224,9 +15345,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -15329,7 +15452,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_3072_cond_sub_48(a - 48, a, m, (sp_digit)0 - mp); } @@ -15344,9 +15468,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -15632,7 +15758,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_3072_cond_sub_48(a - 48, a, m, (sp_digit)0 - mp); } @@ -15645,9 +15772,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -15738,7 +15867,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_3072_cond_sub_48(a - 48, a, m, (sp_digit)0 - mp); } @@ -15830,7 +15960,7 @@ static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #192]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -16096,7 +16226,7 @@ static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -16112,9 +16242,11 @@ static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -16161,7 +16293,7 @@ SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -16177,9 +16309,11 @@ SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -16243,7 +16377,7 @@ SP_NOINLINE static sp_digit div_3072_word_48(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -16832,7 +16966,7 @@ static sp_int32 sp_3072_cmp_48(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -17241,9 +17375,11 @@ static void sp_3072_mont_norm_96(sp_digit* r, const sp_digit* m) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -17282,7 +17418,7 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -17297,9 +17433,11 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -17650,7 +17788,7 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_dig "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -17665,9 +17803,11 @@ static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, const sp_dig * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -18475,7 +18615,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_3072_cond_sub_96(a - 96, a, m, (sp_digit)0 - mp); } @@ -18488,9 +18629,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -18593,7 +18736,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_3072_cond_sub_96(a - 96, a, m, (sp_digit)0 - mp); } @@ -18608,9 +18752,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19136,7 +19282,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_3072_cond_sub_96(a - 96, a, m, (sp_digit)0 - mp); } @@ -19149,9 +19296,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19242,7 +19391,8 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_3072_cond_sub_96(a - 96, a, m, (sp_digit)0 - mp); } @@ -19287,9 +19437,11 @@ SP_NOINLINE static void sp_3072_mont_sqr_96(sp_digit* r, const sp_digit* a, * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19327,7 +19479,8 @@ static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r11\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -19340,9 +19493,11 @@ static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_3072_sub_96(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19523,7 +19678,7 @@ static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -19540,9 +19695,11 @@ static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, const sp_digit* b * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19589,7 +19746,7 @@ SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -19605,9 +19762,11 @@ SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -19671,7 +19830,7 @@ SP_NOINLINE static sp_digit div_3072_word_96(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -20891,7 +21050,7 @@ static sp_int32 sp_3072_cmp_96(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -21422,9 +21581,11 @@ int sp_RsaPublic_3072(const byte* in, word32 inLen, const mp_int* em, * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -21463,7 +21624,7 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -21478,9 +21639,11 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_3072_cond_add_48(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -21663,7 +21826,7 @@ static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, const sp_dig "ADC %[r], r10, r10\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -22575,7 +22738,7 @@ static void sp_3072_lshift_96(sp_digit* r, const sp_digit* a, byte n) "STR r4, [%[r], #4]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -22862,9 +23025,9 @@ static void sp_4096_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -23241,7 +23404,7 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -23253,9 +23416,11 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -23493,7 +23658,7 @@ static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, const sp_digit* "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -23582,9 +23747,11 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_4096_add_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -23623,7 +23790,8 @@ static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, const sp_digit* "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -23675,7 +23843,8 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -23689,7 +23858,8 @@ static sp_digit sp_4096_sub_in_place_128(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_4096_mul_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_4096_mul_128(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -23803,7 +23973,8 @@ static void sp_4096_mul_128(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -23920,7 +24091,8 @@ static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -24000,7 +24172,7 @@ static void sp_4096_mul_d_128(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #512]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -24666,7 +24838,7 @@ static void sp_4096_mul_d_128(sp_digit* r, const sp_digit* a, sp_digit b) "STR r5, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -24697,9 +24869,11 @@ static void sp_4096_mont_norm_128(sp_digit* r, const sp_digit* m) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -24738,7 +24912,7 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_di "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -24753,9 +24927,11 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_di * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_4096_cond_sub_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -25218,7 +25394,7 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_di "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -25233,9 +25409,11 @@ static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, const sp_di * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -26299,7 +26477,8 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_4096_cond_sub_128(a - 128, a, m, (sp_digit)0 - mp); } @@ -26312,9 +26491,11 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -26417,7 +26598,8 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_4096_cond_sub_128(a - 128, a, m, (sp_digit)0 - mp); } @@ -26432,9 +26614,11 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27120,7 +27304,8 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_4096_cond_sub_128(a - 128, a, m, (sp_digit)0 - mp); } @@ -27133,9 +27318,11 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27226,7 +27413,8 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); sp_4096_cond_sub_128(a - 128, a, m, (sp_digit)0 - mp); } @@ -27271,9 +27459,11 @@ SP_NOINLINE static void sp_4096_mont_sqr_128(sp_digit* r, const sp_digit* a, * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27311,7 +27501,8 @@ static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* "MOV %[r], r11\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -27324,9 +27515,11 @@ static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_4096_sub_128(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27563,7 +27756,7 @@ static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -27580,9 +27773,11 @@ static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, const sp_digit* * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27629,7 +27824,7 @@ SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -27645,9 +27840,11 @@ SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -27711,7 +27908,7 @@ SP_NOINLINE static sp_digit div_4096_word_128(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -29283,7 +29480,7 @@ static sp_int32 sp_4096_cmp_128(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -29814,9 +30011,11 @@ int sp_RsaPublic_4096(const byte* in, word32 inLen, const mp_int* em, * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -29855,7 +30054,7 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -29870,9 +30069,11 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_4096_cond_add_64(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -30111,7 +30312,7 @@ static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, const sp_dig "ADC %[r], r10, r10\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -31215,7 +31416,7 @@ static void sp_4096_lshift_128(sp_digit* r, const sp_digit* a, byte n) "STR r5, [%[r], #4]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -31508,7 +31709,8 @@ static const sp_digit p256_b[8] = { * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -31622,7 +31824,8 @@ static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -31635,9 +31838,11 @@ static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +SP_NOINLINE static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -31982,7 +32187,8 @@ SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_di "ADD sp, sp, #0x24\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -31994,9 +32200,11 @@ SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_di * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +SP_NOINLINE static void sp_256_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b) +SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -32119,7 +32327,8 @@ SP_NOINLINE static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_di "ADD sp, sp, #0x2c\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", + "r8", "r9", "lr" ); } @@ -32239,7 +32448,8 @@ static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -32489,7 +32699,8 @@ SP_NOINLINE static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) "ADD sp, sp, #0x44\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -32606,7 +32817,8 @@ SP_NOINLINE static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) "ADD sp, sp, #0x20\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); } @@ -32620,7 +32832,8 @@ SP_NOINLINE static void sp_256_sqr_8(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -32661,7 +32874,8 @@ static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -32674,7 +32888,8 @@ static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_256_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -32704,7 +32919,7 @@ static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -32717,9 +32932,11 @@ static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b) * m The modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static int sp_256_mod_mul_norm_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +static int sp_256_mod_mul_norm_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -static int sp_256_mod_mul_norm_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +static int sp_256_mod_mul_norm_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -32946,7 +33163,8 @@ static int sp_256_mod_mul_norm_8(sp_digit* r, const sp_digit* a, const sp_digit* "ADD sp, sp, #0x18\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -33162,9 +33380,11 @@ static int sp_256_point_to_ecc_point_8(const sp_point_256* p, ecc_point* pm) * mp Montgomery multiplier. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -33628,7 +33848,8 @@ SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const "ADD sp, sp, #0x44\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -33653,9 +33874,11 @@ SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const * mp Montgomery multiplier. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -33897,7 +34120,8 @@ SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const "ADD sp, sp, #0x4c\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", "r8", "r9", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r10", "r11", "r12", "r7", + "r8", "r9", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -33921,9 +34145,11 @@ SP_NOINLINE static void sp_256_mont_mul_8(sp_digit* r, const sp_digit* a, const * mp Montgomery multiplier. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -34278,7 +34504,8 @@ SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, const "ADD sp, sp, #0x44\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -34301,9 +34528,11 @@ SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, const * mp Montgomery multiplier. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -34527,7 +34756,8 @@ SP_NOINLINE static void sp_256_mont_sqr_8(sp_digit* r, const sp_digit* a, const "ADD sp, sp, #0x44\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -34781,7 +35011,7 @@ static sp_int32 sp_256_cmp_8(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -34802,9 +35032,11 @@ static sp_int32 sp_256_cmp_8(const sp_digit* a, const sp_digit* b) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -34843,7 +35075,7 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -34858,9 +35090,11 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_256_cond_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -34903,7 +35137,7 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -34920,9 +35154,11 @@ static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, const sp_digit * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35026,7 +35262,8 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_256_cond_sub_8(a - 8, a, m, (sp_digit)0 - mp); } @@ -35039,9 +35276,11 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35127,7 +35366,8 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_256_cond_sub_8(a - 8, a, m, (sp_digit)0 - mp); } @@ -35141,9 +35381,11 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a_p, const sp_digit* m_p, + sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35284,7 +35526,8 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ "ADD sp, sp, #0x44\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", + "r10", "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -35306,9 +35549,11 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, sp_ * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35412,7 +35657,8 @@ SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_256_cond_sub_8(a - 8, a, m, (sp_digit)0 - mp); } @@ -35425,9 +35671,11 @@ SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35513,7 +35761,8 @@ SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_256_cond_sub_8(a - 8, a, m, (sp_digit)0 - mp); } @@ -35568,9 +35817,11 @@ static void sp_256_map_8(sp_point_256* r, const sp_point_256* p, * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35617,7 +35868,8 @@ SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, const "STM %[r], {r5, r6, r7, r8, r9, r10, r11, r12}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -35633,9 +35885,11 @@ SP_NOINLINE static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35677,7 +35931,8 @@ SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a, const "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r2" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -35693,9 +35948,11 @@ SP_NOINLINE static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35769,7 +36026,8 @@ SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a, const "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r2", "r3", "r12" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -35786,9 +36044,11 @@ SP_NOINLINE static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35833,7 +36093,8 @@ SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r, const sp_digit* a, const "STM %[r], {r5, r6, r7, r8, r9, r10, r11, r12}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -35849,9 +36110,11 @@ SP_NOINLINE static void sp_256_mont_sub_8(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_256_mont_div2_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_256_mont_div2_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_256_mont_div2_8(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_256_mont_div2_8(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -35900,7 +36163,8 @@ SP_NOINLINE static void sp_256_mont_div2_8(sp_digit* r, const sp_digit* a, const "STM %[r], {r8, r9, r10, r11}\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3" ); } @@ -39431,7 +39695,7 @@ static void sp_256_add_one_8(sp_digit* a) "STM %[a]!, {r1, r2, r3, r4}\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -39469,9 +39733,9 @@ static void sp_256_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -39860,7 +40124,8 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -39900,7 +40165,7 @@ static sp_digit sp_256_sub_in_place_8(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -39961,7 +40226,7 @@ static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #32]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -40027,7 +40292,7 @@ static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, sp_digit b) "STR r5, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -40043,9 +40308,11 @@ static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -40092,7 +40359,7 @@ SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit di "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -40108,9 +40375,11 @@ SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit di * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -40174,7 +40443,7 @@ SP_NOINLINE static sp_digit div_256_word_8(sp_digit d1, sp_digit d0, sp_digit di "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -40833,7 +41102,8 @@ int sp_ecc_sign_256_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -40873,7 +41143,8 @@ static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "MOV %[r], r11\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -40886,7 +41157,8 @@ static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_256_sub_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -40915,7 +41187,7 @@ static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b) "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -40961,7 +41233,8 @@ static void sp_256_rshift1_8(sp_digit* r, const sp_digit* a) "STRD r8, r9, [%[r], #8]\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); } @@ -40972,7 +41245,8 @@ static void sp_256_rshift1_8(sp_digit* r, const sp_digit* a) * m Modulus. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_256_div2_mod_8(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +static void sp_256_div2_mod_8(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else static void sp_256_div2_mod_8(sp_digit* r, const sp_digit* a, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -41053,7 +41327,8 @@ static void sp_256_div2_mod_8(sp_digit* r, const sp_digit* a, const sp_digit* m) "STM %[r], {r8, r9, r10, r11}\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); } @@ -41256,7 +41531,7 @@ static int sp_256_num_bits_8(const sp_digit* a) "MOV %[a], r4\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "r5", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4", "r5" ); return (word32)(size_t)a; } @@ -42340,7 +42615,8 @@ static const sp_digit p384_b[12] = { * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -42454,7 +42730,8 @@ static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -42466,7 +42743,8 @@ static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_384_mul_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -43482,7 +43760,8 @@ static void sp_384_mul_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "STM %[r]!, {r3, r4, r5, r6}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", + "r12" ); } @@ -43601,7 +43880,8 @@ static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -44302,7 +44582,8 @@ static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "STM %[r]!, {r2, r3, r4, r8}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r12" ); } @@ -44315,7 +44596,8 @@ static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -44356,7 +44638,8 @@ static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -44369,7 +44652,8 @@ static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_384_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -44406,7 +44690,7 @@ static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -44718,9 +45002,11 @@ static int sp_384_point_to_ecc_point_12(const sp_point_384* p, ecc_point* pm) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -44759,7 +45045,7 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digi "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -44774,9 +45060,11 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digi * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_384_cond_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -44833,7 +45121,7 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digi "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -44849,9 +45137,11 @@ static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, const sp_digi * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -44987,7 +45277,8 @@ SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, sp "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_384_cond_sub_12(a - 12, a, m, (sp_digit)0 - mp); } @@ -45000,9 +45291,11 @@ SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, sp * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45108,7 +45401,8 @@ SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, sp "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_384_cond_sub_12(a - 12, a, m, (sp_digit)0 - mp); } @@ -45443,7 +45737,7 @@ static sp_int32 sp_384_cmp_12(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -45502,9 +45796,11 @@ static void sp_384_map_12(sp_point_384* r, const sp_point_384* p, * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_384_mont_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_384_mont_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_384_mont_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45527,9 +45823,11 @@ SP_NOINLINE static void sp_384_mont_add_12(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_dbl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_384_mont_dbl_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_384_mont_dbl_12(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_384_mont_dbl_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45551,9 +45849,11 @@ SP_NOINLINE static void sp_384_mont_dbl_12(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45578,7 +45878,8 @@ SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r, const sp_digit* a, const * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -45618,7 +45919,8 @@ static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "MOV %[r], r11\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -45631,7 +45933,8 @@ static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_384_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -45667,7 +45970,7 @@ static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -45683,9 +45986,11 @@ static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45724,7 +46029,7 @@ static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digi "MOV %[r], r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -45739,9 +46044,11 @@ static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digi * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_384_cond_add_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45798,7 +46105,7 @@ static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digi "ADC %[r], r10, r10\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -45812,9 +46119,11 @@ static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, const sp_digi * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_384_mont_sub_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_384_mont_sub_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_384_mont_sub_12(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_384_mont_sub_12(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -45893,7 +46202,7 @@ static void sp_384_rshift1_12(sp_digit* r, const sp_digit* a) "STR r4, [%[r], #44]\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "cc" + : "memory", "cc", "r2", "r3", "r4" ); } @@ -49503,7 +49812,7 @@ static void sp_384_add_one_12(sp_digit* a) "STM %[a]!, {r1, r2, r3, r4}\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -49541,9 +49850,9 @@ static void sp_384_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -49932,7 +50241,8 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -49979,7 +50289,7 @@ static sp_digit sp_384_sub_in_place_12(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -50040,7 +50350,7 @@ static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #48]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -50126,7 +50436,7 @@ static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -50142,9 +50452,11 @@ static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -50191,7 +50503,7 @@ SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit d "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -50207,9 +50519,11 @@ SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit d * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -50273,7 +50587,7 @@ SP_NOINLINE static sp_digit div_384_word_12(sp_digit d1, sp_digit d0, sp_digit d "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -50902,9 +51216,11 @@ int sp_ecc_sign_384_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * m Modulus. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_384_div2_mod_12(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +static void sp_384_div2_mod_12(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -static void sp_384_div2_mod_12(sp_digit* r, const sp_digit* a, const sp_digit* m) +static void sp_384_div2_mod_12(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -51021,7 +51337,8 @@ static void sp_384_div2_mod_12(sp_digit* r, const sp_digit* a, const sp_digit* m "STR r10, [%[r], #44]\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); } @@ -51324,7 +51641,7 @@ static int sp_384_num_bits_12(const sp_digit* a) "MOV %[a], r4\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "r5", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4", "r5" ); return (word32)(size_t)a; } @@ -52454,7 +52771,8 @@ static const sp_digit p521_b[17] = { * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -52571,7 +52889,8 @@ static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -52583,7 +52902,8 @@ static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_521_mul_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -54613,7 +54933,8 @@ static void sp_521_mul_17(sp_digit* r, const sp_digit* a, const sp_digit* b) "STM %[r]!, {r3}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", + "r12" ); } @@ -54735,7 +55056,8 @@ static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -56020,7 +56342,8 @@ static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "STM %[r]!, {r2}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r12" ); } @@ -56033,7 +56356,8 @@ static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -56080,7 +56404,8 @@ static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) "ADC %[r], r4, #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -56093,7 +56418,8 @@ static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_521_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -56141,7 +56467,7 @@ static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b) "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -56370,9 +56696,11 @@ static int sp_521_point_to_ecc_point_17(const sp_point_521* p, ecc_point* pm) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -56411,7 +56739,7 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digi "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -56426,9 +56754,11 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digi * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_521_cond_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -56504,7 +56834,7 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digi "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -56517,9 +56847,11 @@ static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, const sp_digi * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -56632,7 +56964,8 @@ SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a, const sp_digit* m, sp "STM %[a]!, {r1, r2, r3, r4, r5, r6, r7, r8}\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", + "r10", "r11", "r12", "lr" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -56654,9 +56987,11 @@ SP_NOINLINE static void sp_521_mont_reduce_17(sp_digit* a, const sp_digit* m, sp * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -56919,7 +57254,8 @@ SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_521_cond_sub_17(a - 17, a, m, (sp_digit)0 - mp); } @@ -56932,9 +57268,11 @@ SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, + const sp_digit* m, sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -57152,7 +57490,8 @@ SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_521_cond_sub_17(a - 17, a, m, (sp_digit)0 - mp); } @@ -57539,7 +57878,7 @@ static sp_int32 sp_521_cmp_17(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -57598,9 +57937,11 @@ static void sp_521_map_17(sp_point_521* r, const sp_point_521* p, * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -57672,7 +58013,8 @@ SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r, const sp_digit* a, const "STM %[r]!, {r4}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -57688,9 +58030,11 @@ SP_NOINLINE static void sp_521_mont_add_17(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -57752,7 +58096,8 @@ SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r, const sp_digit* a, const "STM %[r]!, {r4}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r2", "r3" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -57768,9 +58113,11 @@ SP_NOINLINE static void sp_521_mont_dbl_17(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -57852,7 +58199,8 @@ SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r, const sp_digit* a, const "STM %[r]!, {r4}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r2", "r3", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r2", "r3" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -57869,9 +58217,11 @@ SP_NOINLINE static void sp_521_mont_tpl_17(sp_digit* r, const sp_digit* a, const * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_521_mont_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_521_mont_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_521_mont_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_521_mont_sub_17(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -57944,7 +58294,8 @@ SP_NOINLINE static void sp_521_mont_sub_17(sp_digit* r, const sp_digit* a, const "STM %[r]!, {r4}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); #ifndef WOLFSSL_NO_VAR_ASSIGN_REG (void)m_p; @@ -58033,7 +58384,7 @@ static void sp_521_rshift1_17(sp_digit* r, const sp_digit* a) "STR r3, [%[r], #64]\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "cc" + : "memory", "cc", "r2", "r3", "r4" ); } @@ -62274,7 +62625,7 @@ static void sp_521_add_one_17(sp_digit* a) "STM %[a]!, {r1}\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4" ); } @@ -62312,9 +62663,9 @@ static void sp_521_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++; @@ -62753,7 +63104,7 @@ static void sp_521_rshift_17(sp_digit* r, const sp_digit* a, byte n) "STRD r4, r5, [%[r], #60]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -62879,7 +63230,7 @@ static void sp_521_lshift_17(sp_digit* r, const sp_digit* a, byte n) "STR r5, [%[r], #4]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -63103,7 +63454,7 @@ static void sp_521_lshift_34(sp_digit* r, const sp_digit* a, byte n) "STR r6, [%[r], #4]\n\t" : [r] "+r" (r), [a] "+r" (a), [n] "+r" (n) : - : "memory", "r4", "r5", "r6", "r3", "r7", "cc" + : "memory", "cc", "r4", "r5", "r6", "r3", "r7" ); } @@ -63158,7 +63509,8 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a, const sp_digit* b) "SBC %[a], %[a], %[a]\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -63216,7 +63568,7 @@ static sp_digit sp_521_sub_in_place_17(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -63277,7 +63629,7 @@ static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #68]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -63388,7 +63740,7 @@ static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, sp_digit b) "STR r5, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -63404,9 +63756,11 @@ static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -63453,7 +63807,7 @@ SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit d "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -63469,9 +63823,11 @@ SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit d * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -63535,7 +63891,7 @@ SP_NOINLINE static sp_digit div_521_word_17(sp_digit d1, sp_digit d0, sp_digit d "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -64195,7 +64551,8 @@ int sp_ecc_sign_521_nb(sp_ecc_ctx_t* sp_ctx, const byte* hash, word32 hashLen, W * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -64240,7 +64597,8 @@ static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12" ); return (word32)(size_t)r; } @@ -64253,7 +64611,8 @@ static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_521_sub_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -64300,7 +64659,7 @@ static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -64313,9 +64672,11 @@ static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, const sp_digit* b) * m Modulus. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_521_div2_mod_17(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +static void sp_521_div2_mod_17(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -static void sp_521_div2_mod_17(sp_digit* r, const sp_digit* a, const sp_digit* m) +static void sp_521_div2_mod_17(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -64467,7 +64828,8 @@ static void sp_521_div2_mod_17(sp_digit* r, const sp_digit* a, const sp_digit* m "STR r9, [%[r], #64]\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); } @@ -64895,7 +65257,7 @@ static int sp_521_num_bits_17(const sp_digit* a) "MOV %[a], r4\n\t" : [a] "+r" (a) : - : "memory", "r1", "r2", "r3", "r4", "r5", "cc" + : "memory", "cc", "r1", "r2", "r3", "r4", "r5" ); return (word32)(size_t)a; } @@ -65908,7 +66270,8 @@ typedef struct sp_point_1024 { * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_1024_mul_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_1024_mul_16(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -67706,7 +68069,8 @@ static void sp_1024_mul_16(sp_digit* r, const sp_digit* a, const sp_digit* b) "STM %[r]!, {r3, r4, r5, r6}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", "r12", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r11", + "r12" ); } @@ -68858,7 +69222,8 @@ static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "STM %[r]!, {r2, r3, r4, r8}\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r12" ); } @@ -68869,9 +69234,11 @@ static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_1024_add_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_1024_add_16(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_1024_add_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -68913,7 +69280,7 @@ static sp_digit sp_1024_add_16(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -68994,7 +69361,7 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) "SBC %[a], r9, r9\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)a; } @@ -69006,9 +69373,11 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -69078,7 +69447,7 @@ static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b "ADC %[r], %[r], #0x0\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -69159,9 +69528,11 @@ SP_NOINLINE static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_sub_16(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_1024_sub_16(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_1024_sub_16(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_1024_sub_16(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -69202,7 +69573,7 @@ static sp_digit sp_1024_sub_16(sp_digit* r, const sp_digit* a, const sp_digit* b "SBC %[r], r6, r6\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -69251,7 +69622,8 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static void sp_1024_mul_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ @@ -69365,7 +69737,8 @@ static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, const sp_digit* b) #endif : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -69482,7 +69855,8 @@ static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) #endif : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", "r11", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr", + "r11" ); } @@ -69618,7 +69992,8 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) "MOV %[a], r10\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11" ); return (word32)(size_t)a; } @@ -69634,9 +70009,11 @@ static sp_digit sp_1024_sub_in_place_32(sp_digit* a, const sp_digit* b) * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -69675,7 +70052,7 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r4\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -69690,9 +70067,11 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_1024_cond_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -69819,7 +70198,7 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig "SBC %[r], r5, r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9" ); return (word32)(size_t)r; } @@ -69833,9 +70212,11 @@ static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, const sp_dig * b A single precision integer. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p) +static sp_digit sp_1024_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p) #else -static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b) +static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -69874,7 +70255,8 @@ static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b "MOV %[r], r3\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r3", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r3", "r12" ); return (word32)(size_t)r; } @@ -69935,7 +70317,7 @@ static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) "STR r3, [%[r], #128]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); } @@ -70121,7 +70503,7 @@ static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) "STR r5, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8" ); } @@ -70137,9 +70519,11 @@ static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, sp_digit b) * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -70186,7 +70570,7 @@ SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit "ADD %[d1], r6, r3\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -70202,9 +70586,11 @@ SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit * Note that this is an approximate div. It may give an answer 1 larger. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, sp_digit div_p) +SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1_p, sp_digit d0_p, + sp_digit div_p) #else -SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit div) +SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, + sp_digit div) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -70268,7 +70654,7 @@ SP_NOINLINE static sp_digit div_1024_word_32(sp_digit d1, sp_digit d0, sp_digit "SUB %[d1], r3, r8\n\t" : [d1] "+r" (d1), [d0] "+r" (d0), [div] "+r" (div) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)d1; } @@ -70711,7 +71097,7 @@ static sp_int32 sp_1024_cmp_32(const sp_digit* a, const sp_digit* b) "MOV %[a], r2\n\t" : [a] "+r" (a), [b] "+r" (b) : - : "memory", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)a; } @@ -71052,9 +71438,11 @@ static int sp_1024_point_to_ecc_point_32(const sp_point_1024* p, ecc_point* pm) * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -71355,7 +71743,8 @@ SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r3\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_1024_cond_sub_32(a - 32, a, m, mp); } @@ -71368,9 +71757,11 @@ SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, s * mp The digit representing the negative inverse of m mod 2^n. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a_p, const sp_digit* m_p, sp_digit mp_p) +SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a_p, + const sp_digit* m_p, sp_digit mp_p) #else -SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, sp_digit mp) +SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, + sp_digit mp) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -71581,7 +71972,8 @@ SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, s "MOV %[mp], r5\n\t" : [a] "+r" (a), [m] "+r" (m), [mp] "+r" (mp) : - : "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "lr", "cc" + : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", + "r11", "r12", "lr" ); sp_1024_cond_sub_32(a - 32, a, m, mp); } @@ -71732,9 +72124,11 @@ static void sp_1024_map_32(sp_point_1024* r, const sp_point_1024* p, * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -71899,7 +72293,8 @@ SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r, const sp_digit* a, cons "STM %[r]!, {r4, r5, r6, r7}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r12" ); } @@ -71910,9 +72305,11 @@ SP_NOINLINE static void sp_1024_mont_add_32(sp_digit* r, const sp_digit* a, cons * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -72060,7 +72457,8 @@ SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r, const sp_digit* a, cons "STM %[r]!, {r4, r5, r6, r7}\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", "r12", "cc" + : "memory", "cc", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", + "r12" ); } @@ -72071,9 +72469,11 @@ SP_NOINLINE static void sp_1024_mont_dbl_32(sp_digit* r, const sp_digit* a, cons * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* m_p) +SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* m_p) #else -SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r, const sp_digit* a, const sp_digit* m) +SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r, const sp_digit* a, + const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -72376,7 +72776,8 @@ SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r, const sp_digit* a, cons "STM %[r]!, {r4, r5, r6, r7}\n\t" : [r] "+r" (r), [a] "+r" (a), [m] "+r" (m) : - : "memory", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", "r12", "cc" + : "memory", "cc", "r8", "r9", "r10", "r11", "r4", "r5", "r6", "r7", + "r12" ); } @@ -72388,9 +72789,11 @@ SP_NOINLINE static void sp_1024_mont_tpl_32(sp_digit* r, const sp_digit* a, cons * m Modulus (prime). */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, const sp_digit* m_p) +SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, const sp_digit* m_p) #else -SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r, const sp_digit* a, const sp_digit* b, const sp_digit* m) +SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, const sp_digit* m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -72549,7 +72952,8 @@ SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r, const sp_digit* a, cons "STM %[r]!, {r4, r5, r6, r7}\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", + "r12" ); } @@ -72563,9 +72967,11 @@ SP_NOINLINE static void sp_1024_mont_sub_32(sp_digit* r, const sp_digit* a, cons * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -72604,7 +73010,7 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig "MOV %[r], r5\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8" ); return (word32)(size_t)r; } @@ -72619,9 +73025,11 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig * m Mask value to apply. */ #ifndef WOLFSSL_NO_VAR_ASSIGN_REG -static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, const sp_digit* b_p, sp_digit m_p) +static sp_digit sp_1024_cond_add_32(sp_digit* r_p, const sp_digit* a_p, + const sp_digit* b_p, sp_digit m_p) #else -static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, const sp_digit* b, sp_digit m) +static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, + const sp_digit* b, sp_digit m) #endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */ { #ifndef WOLFSSL_NO_VAR_ASSIGN_REG @@ -72748,7 +73156,7 @@ static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, const sp_dig "ADC %[r], r10, r10\n\t" : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b), [m] "+r" (m) : - : "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "cc" + : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10" ); return (word32)(size_t)r; } @@ -72894,7 +73302,7 @@ static void sp_1024_rshift1_32(sp_digit* r, const sp_digit* a) "STR r3, [%[r], #124]\n\t" : [r] "+r" (r), [a] "+r" (a) : - : "memory", "r2", "r3", "r4", "cc" + : "memory", "cc", "r2", "r3", "r4" ); } @@ -81860,9 +82268,9 @@ static void sp_1024_from_bin(sp_digit* r, int size, const byte* a, int n) } #else switch (i) { - case 2: d[2] = a[2]; //fallthrough - case 1: d[1] = a[1]; //fallthrough - case 0: d[0] = a[0]; //fallthrough + case 2: d[i-2] = a[2]; //fallthrough + case 1: d[i-1] = a[1]; //fallthrough + case 0: d[i-0] = a[0]; //fallthrough } #endif j++;