mirror of https://github.com/wolfSSL/wolfssl.git
11 lines
589 B
C
11 lines
589 B
C
/* Config bits for PI32MZ, Starter Kit */
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#pragma config FPLLIDIV = DIV_1 // System PLL Input Divider (1x Divider)
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#pragma config FPLLRNG = RANGE_5_10_MHZ
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#pragma config FPLLICLK = PLL_FRC // System PLL Input Clock Selection (FRC is input to the System PLL)
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#pragma config FPLLMULT = MUL_50 // System PLL Multiplier (PLL Multiply by 50)
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#pragma config FPLLODIV = DIV_2
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// DEVCFG1
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#pragma config FNOSC = SPLL // Oscillator Selection (System PLL)
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#pragma config ICESEL = ICS_PGx2
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/* ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2) */ |