mirror of https://github.com/wolfSSL/wolfBoot.git
Update stm32f4 test-app to use config options to setup clock and uart
Allows the pll clock to be configured using the config macros instead of being hard coded.pull/572/head
Alex Lanzano
parent
72baf96440
commit
248fd985b3
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@ -34,14 +34,15 @@
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#ifdef TARGET_stm32f4
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#define UART1 (0x40011000)
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#define UART1_SR (*(volatile uint32_t *)(UART1))
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#define UART1_DR (*(volatile uint32_t *)(UART1 + 0x04))
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#define UART1_BRR (*(volatile uint32_t *)(UART1 + 0x08))
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#define UART1_CR1 (*(volatile uint32_t *)(UART1 + 0x0c))
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#define UART1_CR2 (*(volatile uint32_t *)(UART1 + 0x10))
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#ifndef CLOCK_SPEED
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#define CLOCK_SPEED (168000000)
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#endif
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/* Common UART Config */
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#if !defined(USE_UART1) && !defined(USE_UART3)
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#define USE_UART3
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#endif
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#define UART_PIN_AF 7
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#define UART_CR1_UART_ENABLE (1 << 13)
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#define UART_CR1_SYMBOL_LEN (1 << 12)
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#define UART_CR1_PARITY_ENABLED (1 << 10)
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@ -53,21 +54,52 @@
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#define UART_SR_RX_NOTEMPTY (1 << 5)
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#define CLOCK_SPEED (168000000)
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/* Common GPIO Config */
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#define GPIO_MODE_AF (2)
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#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40023844))
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#define UART1_APB2_CLOCK_ER (1 << 4)
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/* UART1 Config */
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#ifdef USE_UART1
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#define UART_RX_PIN 7
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#define UART_TX_PIN 6
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#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
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#define GPIOB_AHB1_CLOCK_ER (1 << 1)
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#define UART1 (0x40011000)
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#define UART_SR (*(volatile uint32_t *)(UART1))
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#define UART_DR (*(volatile uint32_t *)(UART1 + 0x04))
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#define UART_BRR (*(volatile uint32_t *)(UART1 + 0x08))
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#define UART_CR1 (*(volatile uint32_t *)(UART1 + 0x0c))
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#define UART_CR2 (*(volatile uint32_t *)(UART1 + 0x10))
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#define UART_CLOCK_ER (*(volatile uint32_t *)(0x40023844))
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#define UART_CLOCK_ER_VAL (1 << 4)
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#define GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
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#define GPIO_CLOCK_ER_VAL (1 << 1)
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#define GPIOB_BASE 0x40020400
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#define GPIO_MODE (*(volatile uint32_t *)(GPIOB_BASE + 0x00))
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#define GPIO_AF (*(volatile uint32_t *)(GPIOB_BASE + 0x20))
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#endif
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#define GPIOB_MODE (*(volatile uint32_t *)(GPIOB_BASE + 0x00))
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#define GPIOB_AFL (*(volatile uint32_t *)(GPIOB_BASE + 0x20))
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#define GPIOB_AFH (*(volatile uint32_t *)(GPIOB_BASE + 0x24))
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#define UART1_PIN_AF 7
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#define UART1_RX_PIN 7
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#define UART1_TX_PIN 6
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/* UART3 Config */
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#ifdef USE_UART3
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#define UART_RX_PIN 9
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#define UART_TX_PIN 8
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#define UART3 (0x40004800)
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#define UART_SR (*(volatile uint32_t *)(UART3))
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#define UART_DR (*(volatile uint32_t *)(UART3 + 0x04))
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#define UART_BRR (*(volatile uint32_t *)(UART3 + 0x08))
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#define UART_CR1 (*(volatile uint32_t *)(UART3 + 0x0c))
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#define UART_CR2 (*(volatile uint32_t *)(UART3 + 0x10))
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#define UART_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
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#define UART_CLOCK_ER_VAL (1 << 18)
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#define GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
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#define GPIO_CLOCK_ER_VAL (1 << 3)
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#define GPIOD_BASE 0x40020c00
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#define GPIO_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
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#define GPIO_AF (*(volatile uint32_t *)(GPIOD_BASE + 0x20))
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#endif
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#define MSGSIZE 16
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#define PAGESIZE (256)
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@ -100,26 +132,26 @@ void uart_write(const char c)
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{
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uint32_t reg;
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do {
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reg = UART1_SR;
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reg = UART_SR;
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} while ((reg & UART_SR_TX_EMPTY) == 0);
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UART1_DR = c;
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UART_DR = c;
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}
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static void uart_pins_setup(void)
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{
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uint32_t reg;
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AHB1_CLOCK_ER |= GPIOB_AHB1_CLOCK_ER;
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GPIO_CLOCK_ER |= GPIO_CLOCK_ER_VAL;
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/* Set mode = AF */
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reg = GPIOB_MODE & ~ (0x03 << (UART1_RX_PIN * 2));
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GPIOB_MODE = reg | (2 << (UART1_RX_PIN * 2));
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reg = GPIOB_MODE & ~ (0x03 << (UART1_TX_PIN * 2));
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GPIOB_MODE = reg | (2 << (UART1_TX_PIN * 2));
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reg = GPIO_MODE & ~ (0x03 << (UART_RX_PIN * 2));
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GPIO_MODE = reg | (2 << (UART_RX_PIN * 2));
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reg = GPIO_MODE & ~ (0x03 << (UART_TX_PIN * 2));
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GPIO_MODE = reg | (2 << (UART_TX_PIN * 2));
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/* Alternate function: use low pins (6 and 7) */
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reg = GPIOB_AFL & ~(0xf << ((UART1_TX_PIN) * 4));
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GPIOB_AFL = reg | (UART1_PIN_AF << ((UART1_TX_PIN) * 4));
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reg = GPIOB_AFL & ~(0xf << ((UART1_RX_PIN) * 4));
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GPIOB_AFL = reg | (UART1_PIN_AF << ((UART1_RX_PIN) * 4));
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reg = GPIO_AF & ~(0xf << ((UART_TX_PIN) * 4));
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GPIO_AF = reg | (UART_PIN_AF << ((UART_TX_PIN) * 4));
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reg = GPIO_AF & ~(0xf << ((UART_RX_PIN) * 4));
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GPIO_AF = reg | (UART_PIN_AF << ((UART_RX_PIN) * 4));
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}
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int uart_setup(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
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@ -128,40 +160,40 @@ int uart_setup(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
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/* Enable pins and configure for AF7 */
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uart_pins_setup();
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/* Turn on the device */
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APB2_CLOCK_ER |= UART1_APB2_CLOCK_ER;
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UART_CLOCK_ER |= UART_CLOCK_ER_VAL;
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/* Configure for TX + RX */
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UART1_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE);
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UART_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE);
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/* Configure clock */
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UART1_BRR = CLOCK_SPEED / bitrate;
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UART_BRR = CLOCK_SPEED / bitrate;
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/* Configure data bits */
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if (data == 8)
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UART1_CR1 &= ~UART_CR1_SYMBOL_LEN;
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UART_CR1 &= ~UART_CR1_SYMBOL_LEN;
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else
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UART1_CR1 |= UART_CR1_SYMBOL_LEN;
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UART_CR1 |= UART_CR1_SYMBOL_LEN;
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/* Configure parity */
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switch (parity) {
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case 'O':
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UART1_CR1 |= UART_CR1_PARITY_ODD;
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UART_CR1 |= UART_CR1_PARITY_ODD;
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/* fall through to enable parity */
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case 'E':
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UART1_CR1 |= UART_CR1_PARITY_ENABLED;
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UART_CR1 |= UART_CR1_PARITY_ENABLED;
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break;
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default:
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UART1_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD);
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UART_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD);
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}
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/* Set stop bits */
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reg = UART1_CR2 & ~UART_CR2_STOPBITS;
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reg = UART_CR2 & ~UART_CR2_STOPBITS;
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if (stop > 1)
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UART1_CR2 = reg & (2 << 12);
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UART_CR2 = reg & (2 << 12);
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else
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UART1_CR2 = reg;
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UART_CR2 = reg;
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/* Turn on uart */
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UART1_CR1 |= UART_CR1_UART_ENABLE;
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UART_CR1 |= UART_CR1_UART_ENABLE;
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return 0;
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}
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@ -171,9 +203,9 @@ char uart_read(void)
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char c;
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volatile uint32_t reg;
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do {
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reg = UART1_SR;
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reg = UART_SR;
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} while ((reg & UART_SR_RX_NOTEMPTY) == 0);
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c = (char)(UART1_DR & 0xff);
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c = (char)(UART_DR & 0xff);
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return c;
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}
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@ -215,7 +247,7 @@ void main(void) {
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flash_set_waitstates();
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clock_config();
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led_pwm_setup();
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pwm_init(CPU_FREQ, 0);
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pwm_init(CLOCK_SPEED, 0);
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/* Dim the led by altering the PWM duty-cicle
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* in isr_tim2 (timer.c)
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@ -224,7 +256,7 @@ void main(void) {
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* to the blue led increases/decreases making a pulse
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* effect.
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*/
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timer_init(CPU_FREQ, 1, 50);
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timer_init(CLOCK_SPEED, 1, 50);
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uart_setup(115200, 8, 'N', 1);
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memset(page, 0xFF, PAGESIZE);
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asm volatile ("cpsie i");
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@ -57,12 +57,20 @@
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#define RCC_PRESCALER_DIV_4 9
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/* STM32F4-Discovery, 168 MHz */
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/* STM32F4 */
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#ifdef TARGET_stm32f4
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# define PLLM 8
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# define PLLN 336
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# define PLLP 2
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# define PLLQ 7
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# if defined(STM32_PLLM) && defined(STM32_PLLN) && \
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defined(STM32_PLLP) && defined(STM32_PLLQ)
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# define PLLM STM32_PLLM
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# define PLLN STM32_PLLN
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# define PLLP STM32_PLLP
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# define PLLQ STM32_PLLQ
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# else
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# define PLLM 8
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# define PLLN 336
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# define PLLP 2
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# define PLLQ 7
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# endif
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# define PLLR 0
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# define TARGET_FLASH_WAITSTATES 5
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#endif
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