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Fixes for NXP P1021 NAND flash mapping and boot page.

pull/267/head
David Garske 2022-12-21 15:58:29 -08:00 committed by Daniele Lacamera
parent f91e82a452
commit 63c35ac95a
3 changed files with 19 additions and 9 deletions
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10
config/examples/nxp-p1021.config
View File

@ -22,13 +22,13 @@ DUALBANK_SWAP?=0
WOLFTPM?=0
# NAND Base Address
ARCH_FLASH_OFFSET?=0xEC000000
ARCH_FLASH_OFFSET?=0x00000000
# Flash Sector Size
WOLFBOOT_SECTOR_SIZE=0x4000
# wolfBoot start address
WOLFBOOT_ORIGIN=0xEC000000
WOLFBOOT_ORIGIN=0x1000
# wolfBoot partition size (2MB)
BOOTLOADER_PARTITION_SIZE=0x200000
@ -36,12 +36,12 @@ BOOTLOADER_PARTITION_SIZE=0x200000
WOLFBOOT_PARTITION_SIZE?=0x1000000
# Location in Flash for Application Partition
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xEC200000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x200000
# Load Partition to RAM Address
WOLFBOOT_LOAD_ADDRESS?=0x1E000000
# Location in Flash for Update Partition
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xED200000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x01200000
# Location of temporary sector used during updates (end of boot partition)
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xEC1FC000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1FC000

12
docs/Targets.md
View File

@ -1037,10 +1037,20 @@ WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x84000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xff000
```
## NXP QorIQ P1021 PPC
The NXP QorIQ P1021 is a PPC e500v2 based processor (two cores). This has been tested with a NAND boot source.
wolfBoot supports loading from external flash using the eLBC FMC (Flash Machine) with NAND.
When each e500 core comes out of reset, its MMU has one 4-Kbyte page defined at `0x0_FFFF_Fnnn`. For NAND boot the first 4KB is loaded to this region with the first offset jump instruction at `0x0_FFFF_FFFC`.
## NXP QorIQ T2080 PPC
The NXP QorIQ T2080 is a PPC e6500 based processor. Support has been tested with the NAII 68PPC2.
The NXP QorIQ T2080 is a PPC e6500 based processor (four cores). Support has been tested with the NAII 68PPC2.
Example configurations for this target are provided in:
* NXP T2080: [/config/examples/nxp-t2080.config](/config/examples/nxp-t2080.config).

6
hal/nxp_p1021.ld
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@ -4,10 +4,10 @@ ENTRY( _reset )
/* On initial start, only a limited space(4k) is accessible.
* Code here bootstraps to enable access to other needed address spaces */
BOOTSTRAP_TLB = 0xEFFFF000;
BOOTSTRAP_TLB = 0x00000000;
/* Entry point where RCW directs code to execute from */
BOOTSTRAP_ENTRY = 0xEFFFFFFC;
/* Entry point where boot ROM directs code to execute from */
BOOTSTRAP_ENTRY = 0x00000FFC;
MEMORY
{