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wolfBoot
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Refactor to eliminate PLATFORM_ -> TARGET_. Fix CI errors.

pull/491/head
David Garske 2024-08-08 10:09:57 -07:00 committed by Daniele Lacamera
parent cf936dffa2
commit 8a7f5e5baa
47 changed files with 130 additions and 120 deletions
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4
CMakeLists.txt
View File

@ -270,7 +270,7 @@ if(${WOLFBOOT_TARGET} STREQUAL "x86_64_efi")
set(GNU_EFI_CRT0 "${GNU_EFI_LIB_PATH}/crt0-efi-x86_64.c")
set(GNU_EFI_LSCRIPT "${GNU_EFI_LIB_PATH}/elf_x86_64_efi.lds")
include_directories("/usr/include/efi" "/usr/include/efi/x86_64")
add_compile_definitions("PLATFORM_X86_64_EFI")
add_compile_definitions("TARGET_X86_64_EFI")
set(CMAKE_EXE_LINKER_FLAGS "-shared -Bsymbolic -L/usr/lib -T${GNU_EFI_LSCRIPT}")
set(LD_START_GROUP ${GNU_EFI_CRT0})
set(LD_END_GROUP "-lgnuefi -lefi")
@ -613,7 +613,7 @@ if(FLAGS_HOME)
list(APPEND WOLFBOOT_DEFS FLAGS_HOME=1)
endif()
list(APPEND WOLFBOOT_DEFS PLATFORM_${WOLFBOOT_TARGET})
list(APPEND WOLFBOOT_DEFS TARGET_${WOLFBOOT_TARGET})
if(SPMATHALL)
list(APPEND USER_SETTINGS WOLFSSL_SP_MATH_ALL)

2
IDE/IAR/wolfboot-test-app.ewp
View File

@ -220,7 +220,7 @@
<debug>1</debug>
<option>
<name>CCDefines</name>
<state>PLATFORM_stm32f4</state>
<state>TARGET_stm32f4</state>
<state>ARCH_ARM</state>
<state>WOLFSSL_USER_SETTINGS</state>
<state>DEBUG_CONSOLE_ASSERT_DISABLE=1</state>

2
IDE/IAR/wolfboot.ewp
View File

@ -221,7 +221,7 @@
<option>
<name>CCDefines</name>
<state>__WOLFBOOT</state>
<state>PLATFORM_stm32f4</state>
<state>TARGET_stm32f4</state>
<state>ARCH_ARM</state>
<state>WOLFSSL_USER_SETTINGS</state>
<state>DEBUG_CONSOLE_ASSERT_DISABLE=1</state>

8
IDE/XilinxSDK/.cproject
View File

@ -33,7 +33,7 @@
<listOptionValue builtIn="false" value="DEBUG_ZYNQ"/>
<listOptionValue builtIn="false" value="DEBUG=1"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>
<listOptionValue builtIn="false" value="PLATFORM_zynq"/>
<listOptionValue builtIn="false" value="TARGET_zynq"/>
<listOptionValue builtIn="false" value="ARCH_AARCH64"/>
<listOptionValue builtIn="false" value="MMU"/>
<listOptionValue builtIn="false" value="PART_UPDATE_EXT=1"/>
@ -71,7 +71,7 @@
<listOptionValue builtIn="false" value="DEBUG_ZYNQ"/>
<listOptionValue builtIn="false" value="DEBUG=1"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>
<listOptionValue builtIn="false" value="PLATFORM_zynq"/>
<listOptionValue builtIn="false" value="TARGET_zynq"/>
<listOptionValue builtIn="false" value="ARCH_AARCH64"/>
<listOptionValue builtIn="false" value="MMU"/>
<listOptionValue builtIn="false" value="PART_UPDATE_EXT=1"/>
@ -163,7 +163,7 @@
<listOptionValue builtIn="false" value="DEBUG_ZYNQ"/>
<listOptionValue builtIn="false" value="DEBUG=1"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>
<listOptionValue builtIn="false" value="PLATFORM_zynq"/>
<listOptionValue builtIn="false" value="TARGET_zynq"/>
<listOptionValue builtIn="false" value="ARCH_AARCH64"/>
<listOptionValue builtIn="false" value="MMU"/>
<listOptionValue builtIn="false" value="PART_UPDATE_EXT=1"/>
@ -201,7 +201,7 @@
<listOptionValue builtIn="false" value="DEBUG_ZYNQ"/>
<listOptionValue builtIn="false" value="DEBUG=1"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>
<listOptionValue builtIn="false" value="PLATFORM_zynq"/>
<listOptionValue builtIn="false" value="TARGET_zynq"/>
<listOptionValue builtIn="false" value="ARCH_AARCH64"/>
<listOptionValue builtIn="false" value="MMU"/>
<listOptionValue builtIn="false" value="PART_UPDATE_EXT=1"/>

3
Makefile
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@ -66,8 +66,7 @@ CFLAGS+= \
-I"." -I"include/" -I"lib/wolfssl" \
-Wno-array-bounds \
-D"WOLFSSL_USER_SETTINGS" \
-D"WOLFTPM_USER_SETTINGS" \
-D"PLATFORM_$(TARGET)"
-D"WOLFTPM_USER_SETTINGS"
# Setup default optimizations (for GCC)
ifeq ($(USE_GCC_HEADLESS),1)

2
arch.mk
View File

@ -951,7 +951,7 @@ ifeq ($(TARGET),x86_64_efi)
CFLAGS += -fpic -ffreestanding -fno-stack-protector -fno-stack-check \
-fshort-wchar -mno-red-zone -maccumulate-outgoing-args
CFLAGS += -I/usr/include/efi -I/usr/include/efi/x86_64 \
-DPLATFORM_X86_64_EFI -DWOLFBOOT_DUALBOOT
-DTARGET_X86_64_EFI -DWOLFBOOT_DUALBOOT
# avoid using of fixed LOAD_ADDRESS, uefi target uses dynamic location
CFLAGS += -DNO_WOLFBOOT_LOAD_ADDRESS
LDFLAGS = -shared -Bsymbolic -L/usr/lib -T$(GNU_EFI_LSCRIPT)

6
hal/nxp_ppc.h
View File

@ -22,7 +22,7 @@
#ifndef _NXP_PPC_H_
#define _NXP_PPC_H_
#ifdef PLATFORM_nxp_p1021
#ifdef TARGET_nxp_p1021
/* NXP P1021 */
#define CPU_NUMCORES 2
#define CORE_E500
@ -62,7 +62,7 @@
#define ENABLE_INTERRUPTS
#endif
#elif defined(PLATFORM_nxp_t1024)
#elif defined(TARGET_nxp_t1024)
/* NXP T1024 */
#define CORE_E5500
#define CPU_NUMCORES 2
@ -100,7 +100,7 @@
#define USE_LONG_JUMP
#elif defined(PLATFORM_nxp_t2080)
#elif defined(TARGET_nxp_t2080)
/* NXP T0280 */
#define CORE_E6500
#define CPU_NUMCORES 4

3
hal/spi/spi_drv_nrf52.c
View File

@ -26,8 +26,8 @@
*/
#include <stdint.h>
#include "spi_drv.h"
#include "spi_drv_nrf52.h"
#ifdef TARGET_nrf52
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM)
#define SPI0 (0x40003000)
@ -142,3 +142,4 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int flags)
#endif /* WOLFBOOT_TPM */
#endif /* SPI_FLASH || WOLFBOOT_TPM */
#endif /* TARGET_ */

3
hal/spi/spi_drv_nxp.c
View File

@ -25,8 +25,8 @@
#include <stdint.h>
#include <stddef.h>
#include "spi_drv.h"
#include "spi_drv_nxp.h"
#if defined(TARGET_nxp_p1021) || defined(TARGET_nxp_t1024)
#ifdef WOLFBOOT_TPM
/* functions from nxp_p1021.c and nxp_t1024.c hal */
@ -58,3 +58,4 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int flags)
return hal_espi_xfer(cs, tx, rx, sz, flags);
}
#endif /* WOLFBOOT_TPM */
#endif /* TARGET_ */

4
hal/spi/spi_drv_nxp.h
View File

@ -22,9 +22,9 @@
/* Chip select for TPM - defaults */
#ifndef SPI_CS_TPM
#if defined(PLATFORM_nxp_p1021)
#if defined(TARGET_nxp_p1021)
#define SPI_CS_TPM 2
#elif defined(PLATFORM_nxp_t1024)
#elif defined(TARGET_nxp_t1024)
#define SPI_CS_TPM 1
#endif
#endif

9
hal/spi/spi_drv_renesas_rx.c
View File

@ -23,14 +23,16 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#include <stdint.h>
#include "spi_drv.h"
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include "printf.h"
#include "spi_drv.h"
#ifdef WOLFBOOT_ARCH_RENESAS_RX
#include "printf.h"
#include "hal/renesas-rx.h"
#include "spi_drv_renesas_rx.h"
#if defined(SPI_FLASH) || defined(QSPI_FLASH)
@ -444,3 +446,4 @@ int qspi_transfer(uint8_t fmode, const uint8_t cmd,
return ret;
}
#endif /* QSPI_FLASH */
#endif /* WOLFBOOT_ARCH_RENESAS_RX */

10
hal/spi/spi_drv_stm32.c
View File

@ -27,7 +27,8 @@
#include <stdint.h>
#include <stddef.h>
#include "spi_drv.h"
#include "spi_drv_stm32.h"
#ifdef WOLFBOOT_STM32_SPIDRV
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM) || defined(QSPI_FLASH) || \
defined(OCTOSPI_FLASH)
@ -133,7 +134,7 @@ void RAMFUNCTION spi_cs_on(uint32_t base, int pin)
static void RAMFUNCTION stm_pins_setup(void)
{
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM)
#ifdef PLATFORM_stm32l0
#ifdef TARGET_stm32l0
stm_gpio_config(SPI_CLOCK_PIO_BASE, SPI_CLOCK_PIN, GPIO_MODE_AF,
SPI_CLOCK_PIN_AF, 2, 3);
stm_gpio_config(SPI_MOSI_PIO_BASE, SPI_MOSI_PIN, GPIO_MODE_AF,
@ -398,7 +399,7 @@ void RAMFUNCTION spi_init(int polarity, int phase)
/* Setup clocks */
#if defined(QSPI_FLASH) || defined(OCTOSPI_FLASH)
#ifdef PLATFORM_stm32u5
#ifdef TARGET_stm32u5
/* Clock configuration for QSPI defaults to SYSCLK
* (RM0456 section 11.8.47)
*/
@ -485,7 +486,7 @@ void RAMFUNCTION spi_init(int polarity, int phase)
#endif
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM)
/* Configure SPI1 for master mode */
# ifdef PLATFORM_stm32l0
# ifdef TARGET_stm32l0
SPI1_CR1 = SPI_CR1_MASTER | (polarity << 1) | (phase << 0);
# else
/* baud rate 5 (hclk/6) */
@ -529,3 +530,4 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int flags)
#endif /* WOLFBOOT_TPM */
#endif /* SPI_FLASH || WOLFBOOT_TPM || QSPI_FLASH || OCTOSPI_FLASH */
#endif /* WOLFBOOT_STM32_SPIDRV */

20
hal/spi/spi_drv_stm32.h
View File

@ -20,7 +20,7 @@
#include <stdint.h>
#ifdef PLATFORM_stm32f4
#ifdef TARGET_stm32f4
#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40023844))
#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x40023824))
#define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
@ -38,9 +38,9 @@
#define SPI_CLOCK_PIN 3 /* SPI_SCK: PB3 */
#define SPI_MISO_PIN 4 /* SPI_MISO PB4 */
#define SPI_MOSI_PIN 5 /* SPI_MOSI PB5 */
#endif /* PLATFORM_stm32f4 */
#endif /* TARGET_stm32f4 */
#ifdef PLATFORM_stm32u5
#ifdef TARGET_stm32u5
#ifdef TZEN
#define PERIPH_BASE (0x50000000UL)
@ -149,10 +149,10 @@
#define SPI_CLOCK_PIN 13 /* SPI_SCK: PE13 */
#define SPI_MISO_PIN 14 /* SPI_MISO PE14 */
#define SPI_MOSI_PIN 15 /* SPI_MOSI PE15 */
#endif /* PLATFORM_stm32u5 */
#endif /* TARGET_stm32u5 */
#ifdef PLATFORM_stm32wb
#ifdef TARGET_stm32wb
#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x58000060))
#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x58000040))
#define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(0x5800004C))
@ -170,10 +170,10 @@
#define SPI_CLOCK_PIN 5 /* SPI_SCK: PA5 */
#define SPI_MISO_PIN 6 /* SPI_MISO PA6 */
#define SPI_MOSI_PIN 7 /* SPI_MOSI PA7 */
#endif /* PLATFORM_stm32wb */
#endif /* TARGET_stm32wb */
#ifdef PLATFORM_stm32l0
#ifdef TARGET_stm32l0
#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40021034))
#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x40021024))
#define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(0x4002102C))
@ -196,10 +196,10 @@
#define SPI_MISO_PIN 6 /* SPI_MISO PA6 */
#define SPI_MOSI_PIN 7 /* SPI_MOSI PA7 */
#endif /* SPI_ALT_CONFIGURATION */
#endif /* PLATFORM_stm32l0 */
#endif /* TARGET_stm32l0 */
#ifdef PLATFORM_stm32h7
#ifdef TARGET_stm32h7
#define RCC_BASE (0x58024400UL)
#define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(RCC_BASE + 0xE0)) /* RM0433 - 8.7.43 (RCC_AHB4ENR) */
@ -323,7 +323,7 @@
#define QSPI_IO3_PIN 10
#endif
#endif /* PLATFORM_stm32h7 */
#endif /* TARGET_stm32h7 */
/* Setup SPI PIO Bases */

3
hal/spi/spi_drv_zynq.c
View File

@ -29,6 +29,8 @@
#include "spi_drv.h"
#include "spi_drv_zynq.h"
#ifdef TARGET_zynq
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM)
void spi_cs_off(uint32_t base, int pin)
@ -87,3 +89,4 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int flags)
#endif /* WOLFBOOT_TPM */
#endif /* SPI_FLASH | WOLFBOOT_TPM */
#endif /* TARGET_zynq */

20
hal/stm32_tz.c
View File

@ -21,15 +21,15 @@
#include <stdint.h>
#include <string.h>
#ifdef PLATFORM_stm32l5
#ifdef TARGET_stm32l5
#include "hal/stm32l5.h"
#endif
#ifdef PLATFORM_stm32u5
#ifdef TARGET_stm32u5
#include "hal/stm32u5.h"
#endif
#ifdef PLATFORM_stm32h5
#ifdef TARGET_stm32h5
#include "hal/stm32h5.h"
#endif
@ -109,7 +109,7 @@ void hal_tz_claim_nonsecure_area(uint32_t address, int len)
page_n = (address - FLASH_BANK2_BASE) / FLASH_PAGE_SIZE;
bank = 1;
}
#ifdef PLATFORM_stm32h5
#ifdef TARGET_stm32h5
/* Take into account current swap configuration */
if ((FLASH_OPTSR_CUR & FLASH_OPTSR_SWAP_BANK) >> 31)
bank = !bank;
@ -131,7 +131,7 @@ void hal_tz_claim_nonsecure_area(uint32_t address, int len)
address = start_address;
while (address < end) {
/* Erase claimed non-secure page, in secure mode */
#ifndef PLATFORM_stm32h5
#ifndef TARGET_stm32h5
reg = FLASH_CR & (~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER | FLASH_CR_BKER | FLASH_CR_PG | FLASH_CR_MER1 | FLASH_CR_MER2));
FLASH_CR = reg | ((page_n << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER);
#else
@ -147,7 +147,7 @@ void hal_tz_claim_nonsecure_area(uint32_t address, int len)
address += FLASH_PAGE_SIZE;
page_n++;
}
#ifndef PLATFORM_stm32h5
#ifndef TARGET_stm32h5
FLASH_CR &= ~FLASH_CR_PER ;
#else
FLASH_CR &= ~FLASH_CR_SER ;
@ -209,7 +209,7 @@ void hal_tz_release_nonsecure_area(void)
#ifdef PLATFORM_stm32h5
#ifdef TARGET_stm32h5
#define GTZC1_BASE (0x50032400)
#define GTZC1_TZSC (*(volatile uint32_t *)(GTZC1_BASE + 0x00))
#define GTZC1_TZIC (*(volatile uint32_t *)(GTZC1_BASE + 0x0400))
@ -280,7 +280,7 @@ void hal_gtzc_init(void)
}
#endif
#ifdef PLATFORM_stm32h5
#ifdef TARGET_stm32h5
void hal_tz_sau_init(void)
{
@ -361,7 +361,7 @@ void hal_tz_sau_init(void)
static void hsi48_on(void)
{
#ifdef PLATFORM_stm32l5
#ifdef TARGET_stm32l5
RCC_CRRCR |= RCC_CRRCR_HSI48ON;
while ((RCC_CRRCR & RCC_CRRCR_HSI48RDY) == 0)
;
@ -386,7 +386,7 @@ void hal_trng_init(void)
reg_val |= 0x0F << TRNG_CR_CONFIG1_SHIFT;
reg_val |= 0x0D << TRNG_CR_CONFIG3_SHIFT;
#ifdef PLATFORM_stm32u5 /* RM0456 40.6.2 */
#ifdef TARGET_stm32u5 /* RM0456 40.6.2 */
reg_val |= 0x06 << TRNG_CR_CLKDIV_SHIFT;
#endif
TRNG_CR = TRNG_CR_CONDRST | reg_val;

4
hal/uart/uart_drv_stm32f4.c
View File

@ -25,7 +25,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(UART_FLASH) && defined(TARGET_stm32f4)
#ifdef TARGET_stm32f4
#include <stdint.h>
@ -148,4 +148,4 @@ int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
return 0;
}
#endif /* UART_FLASH && TARGET_stm32f4 */
#endif /* TARGET_stm32f4 */

4
hal/uart/uart_drv_stm32h5.c
View File

@ -25,7 +25,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(UART_FLASH) && defined(TARGET_stm32h5)
#ifdef TARGET_stm32h5
#include <stdint.h>
#include "hal/stm32h5.h"
@ -278,4 +278,4 @@ int uart_rx(uint8_t *c)
#endif
}
#endif /* UART_FLASH && TARGET_stm32h5 */
#endif /* TARGET_stm32h5 */

4
hal/uart/uart_drv_stm32l0.c
View File

@ -25,7 +25,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(UART_FLASH) && defined(TARGET_stm32l0)
#ifdef TARGET_stm32l0
#include <stdint.h>
@ -169,4 +169,4 @@ int uart_rx(uint8_t *c, int len)
return 0;
}
#endif /* UART_FLASH && TARGET_stm32l0 */
#endif /* TARGET_stm32l0 */

4
hal/uart/uart_drv_stm32l5.c
View File

@ -25,7 +25,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(UART_FLASH) && defined(TARGET_stm32l5)
#ifdef TARGET_stm32l5
#include <stdint.h>
#include "hal/stm32l5.h"
@ -158,4 +158,4 @@ int uart_rx(uint8_t *c, int len)
return 0;
}
#endif /* UART_FLASH && TARGET_stm32l5 */
#endif /* TARGET_stm32l5 */

4
hal/uart/uart_drv_stm32wb.c
View File

@ -25,7 +25,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(UART_FLASH) && defined(TARGET_stm32wb)
#ifdef TARGET_stm32wb
#include <stdint.h>
@ -145,4 +145,4 @@ int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
return 0;
}
#endif /* UART_FLASH && TARGET_stm32wb */
#endif /* TARGET_stm32wb */

4
hal/x86_64_efi.c
View File

@ -27,7 +27,7 @@
#include "loader.h"
#include "printf.h"
#ifdef PLATFORM_X86_64_EFI
#ifdef TARGET_X86_64_EFI
#include <efi/efi.h>
#include <efi/efilib.h>
@ -280,4 +280,4 @@ efi_main (EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable)
return EFI_SUCCESS;
}
#endif /* PLATFORM_X86_64_EFI */
#endif /* TARGET_X86_64_EFI */

2
include/hal.h
View File

@ -39,7 +39,7 @@ extern void do_boot(const uint32_t *app_offset);
extern void arch_reboot(void);
/* Simulator-only calls */
#ifdef PLATFORM_sim
#ifdef TARGET_sim
void hal_set_internal_flash_file(const char* file);
void hal_set_external_flash_file(const char* file);
void hal_deinit();

13
include/spi_drv.h
View File

@ -40,21 +40,22 @@
#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM) || defined(QSPI_FLASH) || \
defined(OCTOSPI_FLASH)
#if defined(PLATFORM_stm32f4) || defined(PLATFORM_stm32f7) || \
defined(PLATFORM_stm32wb) || defined(PLATFORM_stm32l0) || \
defined(PLATFORM_stm32u5) || defined(PLATFORM_stm32h7)
#if defined(TARGET_stm32f4) || defined(TARGET_stm32f7) || \
defined(TARGET_stm32wb) || defined(TARGET_stm32l0) || \
defined(TARGET_stm32u5) || defined(TARGET_stm32h7)
#define WOLFBOOT_STM32_SPIDRV
#include "hal/spi/spi_drv_stm32.h"
#endif
#if defined(PLATFORM_zynq)
#if defined(TARGET_zynq)
#include "hal/spi/spi_drv_zynq.h"
#endif
#if defined(PLATFORM_nrf52)
#if defined(TARGET_nrf52)
#include "hal/spi/spi_drv_nrf52.h"
#endif
#if defined(PLATFORM_nxp_p1021) || defined(PLATFORM_nxp_t1024)
#if defined(TARGET_nxp_p1021) || defined(TARGET_nxp_t1024)
#include "hal/spi/spi_drv_nxp.h"
#endif

8
src/boot_arm.c
View File

@ -188,7 +188,7 @@ asm(
void isr_reset(void) {
register unsigned int *src, *dst;
#if defined(PLATFORM_kinetis)
#if defined(TARGET_kinetis)
/* Immediately disable Watchdog after boot */
/* Write Keys to unlock register */
*((volatile unsigned short *)0x4005200E) = 0xC520;
@ -396,7 +396,7 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset)
#endif
}
#ifdef PLATFORM_psoc6
#ifdef TARGET_psoc6
typedef void(*NMIHANDLER)(void);
# define isr_NMI (NMIHANDLER)(0x0000000D)
#else
@ -439,8 +439,8 @@ void (* const IV[])(void) =
isr_empty, // SysTick
/* Fill with extra unused handlers */
#if defined(PLATFORM_stm32l5) || defined(PLATFORM_stm32u5) || \
defined(PLATFORM_stm32h7)
#if defined(TARGET_stm32l5) || defined(TARGET_stm32u5) || \
defined(TARGET_stm32h7)
isr_empty,
isr_empty,
isr_empty,

2
src/boot_ppc_start.S
View File

@ -126,7 +126,7 @@ _reset:
li r1, MSR_DE
mtmsr r1
#ifdef PLATFORM_nxp_p1021
#ifdef TARGET_nxp_p1021
/* Errata: A-005125 - force the core to process all snoops of IO device
* full cache line writes to DDR differently */
msync

4
src/boot_x86_64.c
View File

@ -24,7 +24,7 @@
#include "loader.h"
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_X86_64_EFI
#ifdef TARGET_X86_64_EFI
#include <efi/efi.h>
#include <efi/efilib.h>
@ -45,4 +45,4 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset)
x86_64_efi_do_boot((uint8_t *)app_offset);
}
#endif /* PLATFORM_X86_64_EFI */
#endif /* TARGET_X86_64_EFI */

4
src/loader.c
View File

@ -55,7 +55,7 @@ static volatile const uint32_t __attribute__((used)) wolfboot_version = WOLFBOOT
extern void (** const IV_RAM)(void);
#endif
#ifdef PLATFORM_sim
#ifdef TARGET_sim
/**
* @brief Command line arguments for the test-app in sim mode.
*/
@ -92,7 +92,7 @@ int main(void)
#endif
{
#ifdef PLATFORM_sim
#ifdef TARGET_sim
/* to forward arguments to the test-app for testing. See
* test-app/app_sim.c */
main_argv = argv;

8
src/string.c
View File

@ -27,7 +27,7 @@
#endif
#include <stddef.h>
#ifndef PLATFORM_library
#ifndef TARGET_library
#include <string.h>
#else
size_t strlen(const char *s); /* forward declaration */
@ -40,7 +40,7 @@ size_t strlen(const char *s); /* forward declaration */
#endif
#endif
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(PLATFORM_X86_64_EFI)
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(TARGET_X86_64_EFI)
/* for RAMFUNCTION */
#include "image.h"
#endif
@ -77,7 +77,7 @@ int isalpha(int c)
}
#if !defined(__CCRX__) /* Renesas CCRX */
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(PLATFORM_X86_64_EFI)
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(TARGET_X86_64_EFI)
void *memset(void *s, int c, size_t n)
{
unsigned char *d = (unsigned char *)s;
@ -257,7 +257,7 @@ size_t strlen(const char *s)
}
#endif
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(PLATFORM_X86_64_EFI)
#if !defined(__IAR_SYSTEMS_ICC__) && !defined(TARGET_X86_64_EFI)
void RAMFUNCTION *memcpy(void *dst, const void *src, size_t n)
{
size_t i;

2
src/update_ram.c
View File

@ -134,7 +134,7 @@ void RAMFUNCTION wolfBoot_start(void)
active = wolfBoot_dualboot_candidate();
if (active == PART_BOOT)
source_address = (uint32_t*)WOLFBOOT_PARTITION_BOOT_ADDRESS;
else if (active == PART_UPDATE)
else
source_address = (uint32_t*)WOLFBOOT_PARTITION_UPDATE_ADDRESS;
#else
active = wolfBoot_dualboot_candidate_addr((void**)&source_address);

3
stage1/Makefile
View File

@ -67,8 +67,7 @@ CFLAGS+= \
-I".." -I"../include/" -I"../lib/wolfssl" \
-I"../lib/wolfTPM" \
-D"WOLFSSL_USER_SETTINGS" \
-D"WOLFTPM_USER_SETTINGS" \
-D"PLATFORM_$(TARGET)" \
-D"WOLFTPM_USER_SETTINGS"
# Do not change platform auth in stage 1
CFLAGS+=-D"WOLFBOOT_TPM_NO_CHG_PLAT_AUTH"

2
test-app/CMakeLists.txt
View File

@ -117,7 +117,7 @@ if(BUILD_TEST_APPS)
target_link_libraries(image wolfboot target)
target_compile_definitions(image PRIVATE PLATFORM_${WOLFBOOT_TARGET}
target_compile_definitions(image PRIVATE TARGET_${WOLFBOOT_TARGET}
${TEST_APP_COMPILE_DEFINITIONS} ${WOLFBOOT_DEFS})
target_compile_options(image PRIVATE -Wall -Wstack-usage=1024 -ffreestanding -Wno-unused

3
test-app/Makefile
View File

@ -40,7 +40,8 @@ ifeq ($(TARGET),ti_hercules)
APP_OBJS:=app_$(TARGET).o ../test-app/libwolfboot.o
CFLAGS+=-I"../include"
else
CFLAGS+=-Wall -Wstack-usage=1024 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles
CFLAGS+=-Wall -Wstack-usage=1024 -ffreestanding -Wno-unused -nostartfiles
CFLAGS+=-DTARGET_$(TARGET) -I../include
CFLAGS+=-g
ifeq ($(USE_GCC),1)
CFLAGS+=-ggdb3

4
test-app/app_raspi3.c
View File

@ -27,7 +27,7 @@
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_raspi3
#ifdef TARGET_raspi3
volatile uint32_t time_elapsed = 0;
void __attribute__((section(".boot"))) main(void) {
@ -36,4 +36,4 @@ void __attribute__((section(".boot"))) main(void) {
while(1)
;
}
#endif /** PLATFORM_raspi3 **/
#endif /** TARGET_raspi3 **/

4
test-app/app_sim.c
View File

@ -29,7 +29,7 @@
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_sim
#ifdef TARGET_sim
/* Matches all keys:
* - chacha (32 + 12)
@ -128,4 +128,4 @@ int main(int argc, char *argv[]) {
return 0;
}
#endif /** PLATFORM_sim **/
#endif /** TARGET_sim **/

4
test-app/app_stm32c0.c
View File

@ -27,7 +27,7 @@
#include "led.h"
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_stm32c0
#ifdef TARGET_stm32c0
void main(void) {
boot_led_on();
@ -35,4 +35,4 @@ void main(void) {
while(1)
;
}
#endif /* PLATFORM_stm32c0 */
#endif /* TARGET_stm32c0 */

4
test-app/app_stm32f4.c
View File

@ -31,7 +31,7 @@
#include "wolfboot/wolfboot.h"
#include "spi_flash.h"
#ifdef PLATFORM_stm32f4
#ifdef TARGET_stm32f4
#define UART1 (0x40011000)
@ -314,5 +314,5 @@ void main(void) {
while(1)
;
}
#endif /** PLATFORM_stm32f4 **/
#endif /** TARGET_stm32f4 **/

4
test-app/app_stm32g0.c
View File

@ -27,7 +27,7 @@
#include "led.h"
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_stm32g0
#ifdef TARGET_stm32g0
void main(void) {
boot_led_on();
@ -35,5 +35,5 @@ void main(void) {
while(1)
;
}
#endif /* PLATFORM_stm32g0 */
#endif /* TARGET_stm32g0 */

2
test-app/app_stm32l0.c
View File

@ -30,7 +30,7 @@
#include "spi_flash.h"
#endif
#ifdef PLATFORM_stm32l0
#ifdef TARGET_stm32l0
#define UART2 (0x40004400)
#define UART2_CR1 (*(volatile uint32_t *)(UART2 + 0x00))

4
test-app/app_stm32l4.c
View File

@ -26,7 +26,7 @@
#include "hal.h"
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_stm32l4
#ifdef TARGET_stm32l4
void main(void)
{
@ -49,4 +49,4 @@ void main(void)
}
}
#endif /* PLATFORM_stm32l4 */
#endif /* TARGET_stm32l4 */

2
test-app/app_stm32wb.c
View File

@ -29,7 +29,7 @@
#include "wolfboot/wolfboot.h"
#include "uart_drv.h"
#ifdef PLATFORM_stm32wb
#ifdef TARGET_stm32wb
/* Matches all keys:
* - chacha (32 + 12)

2
test-app/app_x86_fsp_qemu.c
View File

@ -22,7 +22,7 @@
*/
#ifdef PLATFORM_x86_fsp_qemu
#ifdef TARGET_x86_fsp_qemu
#include <printf.h>
#include <stdint.h>

4
test-app/app_zynq.c
View File

@ -27,7 +27,7 @@
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_zynq
#ifdef TARGET_zynq
volatile uint32_t time_elapsed = 0;
void main(void) {
@ -36,4 +36,4 @@ void main(void) {
while(1)
;
}
#endif /** PLATFORM_zynq **/
#endif /** TARGET_zynq **/

20
test-app/led.c
View File

@ -23,7 +23,7 @@
#include <stdint.h>
#include "wolfboot/wolfboot.h"
#ifdef PLATFORM_stm32f4
#ifdef TARGET_stm32f4
#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
#define GPIOD_AHB1_CLOCK_ER (1 << 3)
@ -70,9 +70,9 @@ void boot_led_on(void)
GPIOD_BSRR |= (1 << pin);
}
#endif /* PLATFORM_stm32f4 */
#endif /* TARGET_stm32f4 */
#ifdef PLATFORM_stm32l0
#ifdef TARGET_stm32l0
#define LED_BOOT_PIN (5)
#define RCC_IOPENR (*(volatile uint32_t *)(0x4002102C))
@ -108,9 +108,9 @@ void boot_led_off(void)
GPIOA_BSRR |= (1 << (pin + 16));
}
#endif /* PLATFORM_stm32l0 */
#endif /* TARGET_stm32l0 */
#if defined(PLATFORM_stm32g0) || defined(PLATFORM_stm32c0)
#if defined(TARGET_stm32g0) || defined(TARGET_stm32c0)
/* GPIOA5 */
#define RCC_IOPENR (*(volatile uint32_t *)(0x40021034))
#define RCC_IOPENR_GPIOAEN (1 << 0)
@ -140,9 +140,9 @@ void boot_led_on(void)
GPIOA_BSRR |= (1 << pin); /* set pin */
}
#endif /* PLATFORM_stm32g0 || PLATFORM_stm32c0 */
#endif /* TARGET_stm32g0 || TARGET_stm32c0 */
#ifdef PLATFORM_stm32wb
#ifdef TARGET_stm32wb
#define LED_BOOT_PIN (0)
#define RCC_AHB2_CLOCK_ER (*(volatile uint32_t *)(0x5800004C))
#define GPIOB_AHB2_CLOCK_ER (1 << 1)
@ -178,9 +178,9 @@ void boot_led_off(void)
}
#endif /* PLATFORM_stm32wb */
#endif /* TARGET_stm32wb */
#ifdef PLATFORM_stm32l4
#ifdef TARGET_stm32l4
#define AHB2_CLOCK_ER (*(volatile uint32_t *)(0x4002104C)) /* RCC_AHB2ENR */
#define GPIOB_AHB2_CLOCK_ER (1 << 1)
@ -229,4 +229,4 @@ void boot_led_off(void)
GPIOB_BSRR |= (1 << (LED_BOOT_PIN + 16));
}
#endif /* PLATFORM_stm32l4 */
#endif /* TARGET_stm32l4 */

6
test-app/startup_arm.c
View File

@ -33,7 +33,7 @@ extern unsigned int _start_heap;
extern void isr_tim2(void);
#endif
#ifdef PLATFORM_stm32h5
#ifdef TARGET_stm32h5
extern void isr_usart3(void);
#endif
@ -188,7 +188,7 @@ void (* const IV[])(void) =
isr_empty, // CAN2
isr_empty, // Ethernet
isr_empty, // Hibernate
#elif (defined(PLATFORM_stm32l5) ||defined(PLATFORM_stm32u5)) /* Fill with extra unused handlers */
#elif (defined(TARGET_stm32l5) ||defined(TARGET_stm32u5)) /* Fill with extra unused handlers */
isr_empty, // WWDG_IRQHandler
isr_empty, // PVD_PVM_IRQHandler
isr_empty, // RTC_IRQHandler
@ -299,7 +299,7 @@ void (* const IV[])(void) =
isr_empty, // ICACHE_IRQHandler
isr_empty, // OTFDEC1_IRQHandler
//
#elif defined(PLATFORM_stm32h5)
#elif defined(TARGET_stm32h5)
isr_empty, // WWDG_IRQHandler
isr_empty, // PVD_PVM_IRQHandler
isr_empty, // RTC_IRQHandler

10
test-app/system.c
View File

@ -20,7 +20,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#if defined(PLATFORM_stm32f4) || defined(PLATFORM_stm32f7)
#if defined(TARGET_stm32f4) || defined(TARGET_stm32f7)
#include <stdint.h>
#include "system.h"
@ -58,17 +58,17 @@
/* STM32F4-Discovery, 168 MHz */
#ifdef PLATFORM_stm32f4
#ifdef TARGET_stm32f4
# define PLLM 8
# define PLLN 336
# define PLLP 2
# define PLLP 2
# define PLLQ 7
# define PLLR 0
# define TARGET_FLASH_WAITSTATES 5
#endif
/* STM32F7-Discovery, 216 MHz */
#ifdef PLATFORM_stm32f7
#ifdef TARGET_stm32f7
# define PLLM 25
# define PLLN 432
# define PLLP 2
@ -144,4 +144,4 @@ void clock_config(void)
RCC_CR &= ~RCC_CR_HSION;
}
#endif /* PLATFORM_stm32f4 */
#endif /* TARGET_stm32f4 */

4
test-app/timer.c
View File

@ -21,7 +21,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/
#ifdef PLATFORM_stm32f4
#ifdef TARGET_stm32f4
#include <stdint.h>
#include "system.h"
@ -168,4 +168,4 @@ void isr_tim2(void)
{
}
#endif /* PLATFORM_stm32f4 */
#endif /* TARGET_stm32f4 */

2
tools/keytools/otp/startup.c
View File

@ -173,7 +173,7 @@ void (* const IV[])(void) =
isr_empty, // CAN2
isr_empty, // Ethernet
isr_empty, // Hibernate
#elif (defined(PLATFORM_stm32l5) ||defined(PLATFORM_stm32u5)) /* Fill with extra unused handlers */
#elif (defined(TARGET_stm32l5) ||defined(TARGET_stm32u5)) /* Fill with extra unused handlers */
isr_empty, // WWDG_IRQHandler
isr_empty, // PVD_PVM_IRQHandler
isr_empty, // RTC_IRQHandler