mirror of https://github.com/wolfSSL/wolfBoot.git
Completed Windows/IAR example, removed extra files
Daniele Lacamera
parent
7e6452467b
commit
8c6272df4a
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@ -84,3 +84,8 @@ config/*.ld
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.vs
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*.filters
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*.user
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# IAR files not under version control
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IDE/IAR/settings
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IDE/IAR/*.ewt
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@ -0,0 +1,88 @@
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# wolfBoot demo application for IAR EWARM
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Instruction to compile and test under MS Windows.
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## Target platform
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This example application has been configured to work on STM32F4.
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wolfBoot is stored and executed at the beginning of the flash (0x08000000), while the signed
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application image starts at address 0x08020000.
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## Workspace
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The workspace [wolfboot-test-app.eww](./wolfboot-test-app.eww) contains two projects:
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- wolfBoot
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- wolfBoot-test-app
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Each project will compile into a separate binary, the two binaries can be uploaded to the target using
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ST-Link utilities (e.g. [STSW-LINK004](https://www.st.com/en/development-tools/stsw-link004.html)) as explained below.
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## Instructions
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### Creating the keys
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This step is required to compile the bootloader.
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Open a command line terminal in the [IAR](./) directory. Execute the following script:
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```
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generate_key.bat
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```
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The script will generate a keypair. The file `ecc256.der` in the root of the repository contains the private key that will be used
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to sign valid firmware images. The file `src/ecc256_pub_key.c` now contains the public key that the bootloader embeds in its codebase
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to use it later to verify the image.
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### Compiling and linking the images
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Now both projects (wolfboot and wolfboot-test-app) can be compiled and linked.
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The two resulting images will be placed in the output directory `Debug/Exe`:
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- wolfboot.bin
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- wolfboot-test-app.bin
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### Signing the firmware image
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The test application (main firmware) must be now tagged with a version number and signed. This is done by the script `sign_test_app.bat`.
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The script requires one numeric argument that is used as the version tag for the signed image. Running it with version "1":
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```
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sign_test_app.bat 1
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```
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Will create a new file named `wolfboot-test-app_v1_signed.bin`, which will be placed in the output directory `Debug/Exe`.
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### Uploading the binary images to the target
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Using the ST-LINK Utility, perform the following steps:
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1. Erase the entire flash memory
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*Erase the entire flash memory before uploading the binary files*
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2. Upload `wolfboot.bin` to addess 0x08000000
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3. Upload `wolfboot-test-app_v1_signed.bin` to address 0x08020000. Ensure that the flag "Skip Flash Erase" is active.
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### Verify that the system is up and running
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If you are using a STM32F407-discovery board, a red LED will turn on upon application boot.
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@ -0,0 +1,2 @@
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keytools\keygen.exe --ecc256 ..\..\src\ecc256_pub_key.c
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mv ecc256.der ..\..\
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@ -0,0 +1,3 @@
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## Pre-compiled Key management tools for windows (64bit)
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Full sources available in the [keytools](../../../tools/keytools) directory in this repository.
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Binary file not shown.
Binary file not shown.
File diff suppressed because one or more lines are too long
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@ -1,40 +0,0 @@
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@REM This batch file has been generated by the IAR Embedded Workbench
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@REM C-SPY Debugger, as an aid to preparing a command line for running
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@REM the cspybat command line utility using the appropriate settings.
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@REM
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@REM Note that this file is generated every time a new debug session
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@REM is initialized, so you may want to move or rename the file before
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@REM making changes.
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@REM
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@REM You can launch cspybat by typing the name of this batch file followed
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@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
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@REM
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@REM Read about available command line parameters in the C-SPY Debugging
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@REM Guide. Hints about additional command line parameters that may be
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@REM useful in specific cases:
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@REM --download_only Downloads a code image without starting a debug
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@REM session afterwards.
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@REM --silent Omits the sign-on message.
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@REM --timeout Limits the maximum allowed execution time.
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@REM
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@echo off
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if not "%~1" == "" goto debugFile
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@echo on
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
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@echo off
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goto end
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:debugFile
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@echo on
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
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@echo off
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:end
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@ -1,31 +0,0 @@
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param([String]$debugfile = "");
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# This powershell file has been generated by the IAR Embedded Workbench
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# C - SPY Debugger, as an aid to preparing a command line for running
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# the cspybat command line utility using the appropriate settings.
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#
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# Note that this file is generated every time a new debug session
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# is initialized, so you may want to move or rename the file before
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# making changes.
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#
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# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed
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# by the name of the debug file (usually an ELF / DWARF or UBROF file).
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#
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# Read about available command line parameters in the C - SPY Debugging
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# Guide. Hints about additional command line parameters that may be
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# useful in specific cases :
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# --download_only Downloads a code image without starting a debug
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# session afterwards.
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# --silent Omits the sign - on message.
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# --timeout Limits the maximum allowed execution time.
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#
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if ($debugfile -eq "")
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{
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& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
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}
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else
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{
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& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
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}
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@ -1,19 +0,0 @@
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"--endian=little"
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"--cpu=Cortex-M4"
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"--fpu=None"
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"-p"
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\CONFIG\debugger\ST\STM32F407VG.ddf"
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"--semihosting=none"
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"--device=STM32F407VG"
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"--multicore_nr_of_cores=1"
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@ -1,13 +0,0 @@
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll"
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armsim2.dll"
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"C:\Users\dan\wolfboot\IDE\IAR\Debug\Exe\wolfboot.out"
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--plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armbat.dll"
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--device_macro="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\ST\STM32F4xx.dmac"
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@ -1,13 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<crun>
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<version>1</version>
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<filter_entries>
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<filter index="0" type="default">
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<type>*</type>
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<start_file>*</start_file>
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<end_file>*</end_file>
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<action_debugger>0</action_debugger>
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<action_log>1</action_log>
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</filter>
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</filter_entries>
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</crun>
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@ -1,4 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Project>
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<WindowStorage />
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</Project>
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@ -1,58 +0,0 @@
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<?xml version="1.0"?>
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<settings>
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<Stack>
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<FillEnabled>0</FillEnabled>
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<OverflowWarningsEnabled>1</OverflowWarningsEnabled>
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<WarningThreshold>90</WarningThreshold>
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<SpWarningsEnabled>1</SpWarningsEnabled>
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<WarnLogOnly>1</WarnLogOnly>
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<UseTrigger>1</UseTrigger>
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<TriggerName>main</TriggerName>
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<LimitSize>0</LimitSize>
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<ByteLimit>50</ByteLimit>
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</Stack>
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<Trace1>
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<Enabled>0</Enabled>
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<ShowSource>1</ShowSource>
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</Trace1>
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<InterruptLog>
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<LogEnabled>0</LogEnabled>
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<GraphEnabled>0</GraphEnabled>
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<ShowTimeLog>1</ShowTimeLog>
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<SumEnabled>0</SumEnabled>
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<ShowTimeSum>1</ShowTimeSum>
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<SumSortOrder>0</SumSortOrder>
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</InterruptLog>
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<DataLog>
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<LogEnabled>0</LogEnabled>
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<GraphEnabled>0</GraphEnabled>
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<ShowTimeLog>1</ShowTimeLog>
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<SumEnabled>0</SumEnabled>
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<ShowTimeSum>1</ShowTimeSum>
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</DataLog>
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<DisassembleMode>
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<mode>0</mode>
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</DisassembleMode>
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<Breakpoints2>
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<Count>0</Count>
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</Breakpoints2>
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<Interrupts>
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<Enabled>1</Enabled>
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</Interrupts>
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<MemConfig>
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<Base>1</Base>
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<Manual>0</Manual>
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<Ddf>1</Ddf>
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<TypeViol>0</TypeViol>
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<Stop>1</Stop>
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</MemConfig>
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<Aliases>
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<Count>0</Count>
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<SuppressDialog>0</SuppressDialog>
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</Aliases>
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<Simulator>
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<Freq>10000000</Freq>
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<FreqHi>0</FreqHi>
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<MultiCoreRunAll>1</MultiCoreRunAll>
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</Simulator>
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</settings>
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@ -0,0 +1,13 @@
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echo off
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if "%~1"=="" goto fail
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keytools\sign.exe --ecc256 --sha256 Debug\Exe\wolfboot-test-app.bin ..\..\ecc256.der %1
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goto out
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:fail
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echo please specify a version number.
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:out
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@ -0,0 +1,62 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\linker\ST\IcfEditor\stm32f40x_fsmc.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08020100;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_FLASH_start__ = 0x08020100;
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define symbol __ICFEDIT_region_FLASH_end__ = 0x0803FFFF;
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define symbol __ICFEDIT_region_FSMC11_start__ = 0x0;
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define symbol __ICFEDIT_region_FSMC11_end__ = 0x0;
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define symbol __ICFEDIT_region_FSMC12_start__ = 0x0;
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define symbol __ICFEDIT_region_FSMC12_end__ = 0x0;
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define symbol __ICFEDIT_region_FSMC13_start__ = 0x0;
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define symbol __ICFEDIT_region_FSMC13_end__ = 0x0;
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define symbol __ICFEDIT_region_FSMC14_start__ = 0x0;
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define symbol __ICFEDIT_region_FSMC14_end__ = 0x0;
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define symbol __ICFEDIT_region_NAND1_start__ = 0x0;
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define symbol __ICFEDIT_region_NAND1_end__ = 0x0;
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define symbol __ICFEDIT_region_NAND2_start__ = 0x0;
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define symbol __ICFEDIT_region_NAND2_end__ = 0x0;
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define symbol __ICFEDIT_region_PCARD_start__ = 0x0;
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define symbol __ICFEDIT_region_PCARD_end__ = 0x0;
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define symbol __ICFEDIT_region_CCRAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_CCRAM_end__ = 0x1000FFFF;
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define symbol __ICFEDIT_region_SRAM1_start__ = 0x20000000;
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define symbol __ICFEDIT_region_SRAM1_end__ = 0x2001BFFF;
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define symbol __ICFEDIT_region_SRAM2_start__ = 0x2001C000;
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define symbol __ICFEDIT_region_SRAM2_end__ = 0x2001FFFF;
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define symbol __ICFEDIT_region_BKPR_start__ = 0x40024000;
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define symbol __ICFEDIT_region_BKPR_end__ = 0x40024FFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x2000;
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define symbol __ICFEDIT_size_heap__ = 0x2000;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__ ];
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define region FSMC_region = mem:[from __ICFEDIT_region_FSMC11_start__ to __ICFEDIT_region_FSMC11_end__]
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| mem:[from __ICFEDIT_region_FSMC12_start__ to __ICFEDIT_region_FSMC12_end__]
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| mem:[from __ICFEDIT_region_FSMC13_start__ to __ICFEDIT_region_FSMC13_end__]
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| mem:[from __ICFEDIT_region_FSMC14_start__ to __ICFEDIT_region_FSMC14_end__];
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define region NAND_region = mem:[from __ICFEDIT_region_NAND1_start__ to __ICFEDIT_region_NAND1_end__ ]
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| mem:[from __ICFEDIT_region_NAND2_start__ to __ICFEDIT_region_NAND2_end__ ];
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define region PCARD_region = mem:[from __ICFEDIT_region_PCARD_start__ to __ICFEDIT_region_PCARD_end__ ];
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define region CCRAM_region = mem:[from __ICFEDIT_region_CCRAM_start__ to __ICFEDIT_region_CCRAM_end__ ];
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define region SRAM_region = mem:[from __ICFEDIT_region_SRAM1_start__ to __ICFEDIT_region_SRAM1_end__ ]
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| mem:[from __ICFEDIT_region_SRAM2_start__ to __ICFEDIT_region_SRAM2_end__ ];
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define region BKPR_region = mem:[from __ICFEDIT_region_BKPR_start__ to __ICFEDIT_region_BKPR_end__ ];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in FLASH_region { readonly };
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place in PCARD_region { readonly section application_specific_ro };
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place in CCRAM_region { section .ccram };
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place in SRAM_region { readwrite, block CSTACK, block HEAP };
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place in BKPR_region { section .backup_sram };
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@ -3,5 +3,8 @@
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<project>
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<path>$WS_DIR$\wolfboot.ewp</path>
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</project>
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<project>
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<path>$WS_DIR$\wolfboot-test-app.ewp</path>
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</project>
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<batchBuild />
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</workspace>
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -1,301 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<project>
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<fileVersion>4</fileVersion>
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<fileChecksum>2162361655</fileChecksum>
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<configuration>
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<name>Debug</name>
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<outputs>
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<file>$PROJ_DIR$\Debug\Obj\libwolfboot.o</file>
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<file>$PROJ_DIR$\Debug\Obj\update_flash.o</file>
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<file>$PROJ_DIR$\Debug\Obj\image.xcl</file>
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<file>$PROJ_DIR$\..\..\src\image.c</file>
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<file>$PROJ_DIR$\..\..\src\update_flash.c</file>
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<file>$PROJ_DIR$\..\..\src\xmalloc_ecc.c</file>
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<file>$PROJ_DIR$\Debug\Obj\image.o</file>
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<file>$PROJ_DIR$\Debug\Obj\libwolfboot.xcl</file>
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<file>$PROJ_DIR$\Debug\Obj\boot_arm.o</file>
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<file>$PROJ_DIR$\Debug\Obj\loader.xcl</file>
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<file>$PROJ_DIR$\Debug\Obj\update_flash.xcl</file>
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<file>$PROJ_DIR$\Debug\Obj\xmalloc_ecc.xcl</file>
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<file>$PROJ_DIR$\..\..\src\boot_arm.c</file>
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<file>$PROJ_DIR$\Debug\Obj\string.o</file>
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<file>$PROJ_DIR$\Debug\Obj\loader.o</file>
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<file>$PROJ_DIR$\Debug\Obj\xmalloc_ecc.o</file>
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<file>$PROJ_DIR$\Debug\Obj\string.xcl</file>
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<file>$PROJ_DIR$\..\..\src\string.c</file>
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<file>$PROJ_DIR$\Debug\Obj\boot_arm.xcl</file>
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<file>$PROJ_DIR$\..\..\src\libwolfboot.c</file>
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<file>$PROJ_DIR$\..\..\src\loader.c</file>
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<file>$PROJ_DIR$\Debug\Obj\ecc256_pub_key.xcl</file>
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<file>$PROJ_DIR$\Debug\Obj\ecc256_pub_key.o</file>
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<file>$PROJ_DIR$\Debug\Obj\wolfboot.pbd</file>
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<file>$PROJ_DIR$\..\..\hal\stm32f4.c</file>
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<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\memory.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\ecc.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_int.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\wc_port.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha256.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c</file>
|
||||
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\hash.c</file>
|
||||
<file>$PROJ_DIR$\Debug\Exe\wolfboot.out</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sha256.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\hash.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\wc_port.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\ecc.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\hash.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sp_cortexm.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sp_int.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\ecc.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\memory.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sha.o</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sp_int.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sha256.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\wc_port.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sp_cortexm.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\stm32f4.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\memory.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\sha.xcl</file>
|
||||
<file>$PROJ_DIR$\Debug\Obj\stm32f4.o</file>
|
||||
<file>$PROJ_DIR$\keys\ecc256_pub_key.c</file>
|
||||
</outputs>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\image.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 6</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\update_flash.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 1</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 10</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\xmalloc_ecc.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 15</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 11</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\boot_arm.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 8</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 18</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\string.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 13</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 16</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\libwolfboot.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 0</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 7</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\loader.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 14</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 9</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\hal\stm32f4.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 51</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 48</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\memory.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 42</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 49</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\ecc.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 41</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 43</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 50</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_int.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 40</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 44</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\wc_port.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 36</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 46</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha256.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 34</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 45</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 39</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 47</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\hash.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 35</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 38</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>[ROOT_NODE]</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ILINK</name>
|
||||
<file> 33</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\keys\ecc256_pub_key.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 22</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 21</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
</configuration>
|
||||
<configuration>
|
||||
<name>Release</name>
|
||||
<outputs />
|
||||
<forcedrebuild>
|
||||
<name>[MULTI_TOOL]</name>
|
||||
<tool>ILINK</tool>
|
||||
</forcedrebuild>
|
||||
</configuration>
|
||||
</project>
|
||||
|
|
@ -44,7 +44,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>MemFile</name>
|
||||
<state></state>
|
||||
<state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F407VG.ddf</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RunToEnable</name>
|
||||
|
|
@ -84,11 +84,11 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>OCDynDriverList</name>
|
||||
<state>ARMSIM_ID</state>
|
||||
<state>STLINK_ID</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCLastSavedByProductVersion</name>
|
||||
<state></state>
|
||||
<state>8.50.1.24770</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>UseFlashLoader</name>
|
||||
|
|
@ -112,7 +112,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>FlashLoadersV3</name>
|
||||
<state></state>
|
||||
<state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F4xxx.board</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesSuppressCheck1</name>
|
||||
|
|
@ -180,7 +180,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>OCMulticoreNrOfCores</name>
|
||||
<state></state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCMulticoreWorkspace</name>
|
||||
|
|
@ -1029,7 +1029,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>CCCpuClockEdit</name>
|
||||
<state></state>
|
||||
<state>168.0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSwoClockAuto</name>
|
||||
|
|
|
|||
|
|
@ -655,15 +655,15 @@
|
|||
<option>
|
||||
<name>OOCOutputFormat</name>
|
||||
<version>3</version>
|
||||
<state>0</state>
|
||||
<state>3</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCOutputOverride</name>
|
||||
<state>0</state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OOCOutputFile</name>
|
||||
<state></state>
|
||||
<state>wolfboot.bin</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OOCCommandLineProducer</name>
|
||||
|
|
@ -671,7 +671,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>OOCObjCopyEnable</name>
|
||||
<state>0</state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
|
|
@ -2160,12 +2160,6 @@
|
|||
<name>$PROJ_DIR$\..\..\include\user_settings.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>keys</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\keys\ecc256_pub_key.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>lib</name>
|
||||
<group>
|
||||
|
|
@ -2201,6 +2195,9 @@
|
|||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\boot_arm.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\ecc256_pub_key.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\src\image.c</name>
|
||||
</file>
|
||||
|
|
|
|||
2875
IDE/IAR/wolfboot.ewt
2875
IDE/IAR/wolfboot.ewt
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
After Width: | Height: | Size: 7.8 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 6.8 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 7.1 KiB |
|
|
@ -1,67 +1,67 @@
|
|||
/* system.h
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_H_INCLUDED
|
||||
#define SYSTEM_H_INCLUDED
|
||||
|
||||
/* System specific: PLL with 8 MHz external oscillator, CPU at 168MHz */
|
||||
#define CPU_FREQ (168000000)
|
||||
#define PLL_FULL_MASK (0x7F037FFF)
|
||||
|
||||
/* Assembly helpers */
|
||||
#define DMB() __asm__ volatile ("dmb");
|
||||
#define WFI() __asm__ volatile ("wfi");
|
||||
|
||||
/* Master clock setting */
|
||||
void clock_config(void);
|
||||
void flash_set_waitstates(void);
|
||||
|
||||
|
||||
/* NVIC */
|
||||
/* NVIC ISER Base register (Cortex-M) */
|
||||
|
||||
#define NVIC_TIM2_IRQN (28)
|
||||
#define NVIC_ISER_BASE (0xE000E100)
|
||||
#define NVIC_ICER_BASE (0xE000E180)
|
||||
#define NVIC_IPRI_BASE (0xE000E400)
|
||||
|
||||
static inline void nvic_irq_enable(uint8_t n)
|
||||
{
|
||||
int i = n / 32;
|
||||
volatile uint32_t *nvic_iser = ((volatile uint32_t *)(NVIC_ISER_BASE + 4 * i));
|
||||
*nvic_iser |= (1 << (n % 32));
|
||||
}
|
||||
|
||||
static inline void nvic_irq_disable(uint8_t n)
|
||||
{
|
||||
int i = n / 32;
|
||||
volatile uint32_t *nvic_icer = ((volatile uint32_t *)(NVIC_ICER_BASE + 4 * i));
|
||||
*nvic_icer |= (1 << (n % 32));
|
||||
}
|
||||
|
||||
static inline void nvic_irq_setprio(uint8_t n, uint8_t prio)
|
||||
{
|
||||
volatile uint8_t *nvic_ipri = ((volatile uint8_t *)(NVIC_IPRI_BASE + n));
|
||||
*nvic_ipri = prio;
|
||||
}
|
||||
|
||||
#endif /* !SYSTEM_H_INCLUDED */
|
||||
/* system.h
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_H_INCLUDED
|
||||
#define SYSTEM_H_INCLUDED
|
||||
|
||||
/* System specific: PLL with 8 MHz external oscillator, CPU at 168MHz */
|
||||
#define CPU_FREQ (168000000)
|
||||
#define PLL_FULL_MASK (0x7F037FFF)
|
||||
|
||||
/* Assembly helpers */
|
||||
#define DMB() asm volatile ("dmb");
|
||||
#define WFI() asm volatile ("wfi");
|
||||
|
||||
/* Master clock setting */
|
||||
void clock_config(void);
|
||||
void flash_set_waitstates(void);
|
||||
|
||||
|
||||
/* NVIC */
|
||||
/* NVIC ISER Base register (Cortex-M) */
|
||||
|
||||
#define NVIC_TIM2_IRQN (28)
|
||||
#define NVIC_ISER_BASE (0xE000E100)
|
||||
#define NVIC_ICER_BASE (0xE000E180)
|
||||
#define NVIC_IPRI_BASE (0xE000E400)
|
||||
|
||||
static inline void nvic_irq_enable(uint8_t n)
|
||||
{
|
||||
int i = n / 32;
|
||||
volatile uint32_t *nvic_iser = ((volatile uint32_t *)(NVIC_ISER_BASE + 4 * i));
|
||||
*nvic_iser |= (1 << (n % 32));
|
||||
}
|
||||
|
||||
static inline void nvic_irq_disable(uint8_t n)
|
||||
{
|
||||
int i = n / 32;
|
||||
volatile uint32_t *nvic_icer = ((volatile uint32_t *)(NVIC_ICER_BASE + 4 * i));
|
||||
*nvic_icer |= (1 << (n % 32));
|
||||
}
|
||||
|
||||
static inline void nvic_irq_setprio(uint8_t n, uint8_t prio)
|
||||
{
|
||||
volatile uint8_t *nvic_ipri = ((volatile uint8_t *)(NVIC_IPRI_BASE + n));
|
||||
*nvic_ipri = prio;
|
||||
}
|
||||
|
||||
#endif /* !SYSTEM_H_INCLUDED */
|
||||
|
|
|
|||
342
test-app/timer.c
342
test-app/timer.c
|
|
@ -1,171 +1,171 @@
|
|||
/* timer.c
|
||||
*
|
||||
* Test bare-metal blinking led application
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#ifdef PLATFORM_stm32f4
|
||||
#include <stdint.h>
|
||||
|
||||
#include "system.h"
|
||||
#include "led.h"
|
||||
|
||||
|
||||
/* STM32 specific defines */
|
||||
#define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
|
||||
#define APB1_CLOCK_RST (*(volatile uint32_t *)(0x40023820))
|
||||
#define TIM4_APB1_CLOCK_ER_VAL (1 << 2)
|
||||
#define TIM2_APB1_CLOCK_ER_VAL (1 << 0)
|
||||
|
||||
#define TIM2_BASE (0x40000000)
|
||||
#define TIM2_CR1 (*(volatile uint32_t *)(TIM2_BASE + 0x00))
|
||||
#define TIM2_DIER (*(volatile uint32_t *)(TIM2_BASE + 0x0c))
|
||||
#define TIM2_SR (*(volatile uint32_t *)(TIM2_BASE + 0x10))
|
||||
#define TIM2_PSC (*(volatile uint32_t *)(TIM2_BASE + 0x28))
|
||||
#define TIM2_ARR (*(volatile uint32_t *)(TIM2_BASE + 0x2c))
|
||||
|
||||
#define TIM4_BASE (0x40000800)
|
||||
#define TIM4_CR1 (*(volatile uint32_t *)(TIM4_BASE + 0x00))
|
||||
#define TIM4_DIER (*(volatile uint32_t *)(TIM4_BASE + 0x0c))
|
||||
#define TIM4_SR (*(volatile uint32_t *)(TIM4_BASE + 0x10))
|
||||
#define TIM4_CCMR1 (*(volatile uint32_t *)(TIM4_BASE + 0x18))
|
||||
#define TIM4_CCMR2 (*(volatile uint32_t *)(TIM4_BASE + 0x1c))
|
||||
#define TIM4_CCER (*(volatile uint32_t *)(TIM4_BASE + 0x20))
|
||||
#define TIM4_PSC (*(volatile uint32_t *)(TIM4_BASE + 0x28))
|
||||
#define TIM4_ARR (*(volatile uint32_t *)(TIM4_BASE + 0x2c))
|
||||
#define TIM4_CCR4 (*(volatile uint32_t *)(TIM4_BASE + 0x40))
|
||||
|
||||
#define TIM_DIER_UIE (1 << 0)
|
||||
#define TIM_SR_UIF (1 << 0)
|
||||
#define TIM_CR1_CLOCK_ENABLE (1 << 0)
|
||||
#define TIM_CR1_UPD_RS (1 << 2)
|
||||
#define TIM_CR1_ARPE (1 << 7)
|
||||
|
||||
#define TIM_CCER_CC4_ENABLE (1 << 12)
|
||||
#define TIM_CCMR1_OC1M_PWM1 (0x06 << 4)
|
||||
#define TIM_CCMR2_OC4M_PWM1 (0x06 << 12)
|
||||
|
||||
#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
|
||||
#define GPIOD_AHB1_CLOCK_ER (1 << 3)
|
||||
|
||||
#define GPIOD_BASE 0x40020c00
|
||||
#define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
|
||||
#define GPIOD_OTYPE (*(volatile uint32_t *)(GPIOD_BASE + 0x04))
|
||||
#define GPIOD_PUPD (*(volatile uint32_t *)(GPIOD_BASE + 0x0c))
|
||||
#define GPIOD_ODR (*(volatile uint32_t *)(GPIOD_BASE + 0x14))
|
||||
|
||||
static uint32_t master_clock = 0;
|
||||
|
||||
/** Use TIM4_CH4, which is linked to PD15 AF1 **/
|
||||
int pwm_init(uint32_t clock, uint32_t threshold)
|
||||
{
|
||||
uint32_t val = (clock / 100000); /* Frequency is 100 KHz */
|
||||
uint32_t lvl;
|
||||
master_clock = clock;
|
||||
|
||||
if (threshold > 100)
|
||||
return -1;
|
||||
|
||||
lvl = (val * threshold) / 100;
|
||||
if (lvl != 0)
|
||||
lvl--;
|
||||
|
||||
APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL;
|
||||
__asm__ volatile ("dmb");
|
||||
APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL;
|
||||
APB1_CLOCK_ER |= TIM4_APB1_CLOCK_ER_VAL;
|
||||
|
||||
/* disable CC */
|
||||
TIM4_CCER &= ~TIM_CCER_CC4_ENABLE;
|
||||
TIM4_CR1 = 0;
|
||||
TIM4_PSC = 0;
|
||||
TIM4_ARR = val - 1;
|
||||
TIM4_CCR4 = lvl;
|
||||
TIM4_CCMR1 &= ~(0x03 << 0);
|
||||
TIM4_CCMR1 &= ~(0x07 << 4);
|
||||
TIM4_CCMR1 |= TIM_CCMR1_OC1M_PWM1;
|
||||
TIM4_CCMR2 &= ~(0x03 << 8);
|
||||
TIM4_CCMR2 &= ~(0x07 << 12);
|
||||
TIM4_CCMR2 |= TIM_CCMR2_OC4M_PWM1;
|
||||
TIM4_CCER |= TIM_CCER_CC4_ENABLE;
|
||||
TIM4_CR1 |= TIM_CR1_CLOCK_ENABLE | TIM_CR1_ARPE;
|
||||
__asm__ volatile ("dmb");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int timer_init(uint32_t clock, uint32_t prescaler, uint32_t interval_ms)
|
||||
{
|
||||
uint32_t val = 0;
|
||||
uint32_t psc = 1;
|
||||
uint32_t err = 0;
|
||||
clock = ((clock * prescaler) / 1000) * interval_ms;
|
||||
|
||||
while (psc < 65535) {
|
||||
val = clock / psc;
|
||||
err = clock % psc;
|
||||
if ((val < 65535) && (err == 0)) {
|
||||
val--;
|
||||
break;
|
||||
}
|
||||
val = 0;
|
||||
psc++;
|
||||
}
|
||||
if (val == 0)
|
||||
return -1;
|
||||
|
||||
nvic_irq_enable(NVIC_TIM2_IRQN);
|
||||
nvic_irq_setprio(NVIC_TIM2_IRQN, 0);
|
||||
APB1_CLOCK_RST |= TIM2_APB1_CLOCK_ER_VAL;
|
||||
__asm__ volatile ("dmb");
|
||||
APB1_CLOCK_RST &= ~TIM2_APB1_CLOCK_ER_VAL;
|
||||
APB1_CLOCK_ER |= TIM2_APB1_CLOCK_ER_VAL;
|
||||
|
||||
TIM2_CR1 = 0;
|
||||
__asm__ volatile ("dmb");
|
||||
TIM2_PSC = psc;
|
||||
TIM2_ARR = val;
|
||||
TIM2_CR1 |= TIM_CR1_CLOCK_ENABLE;
|
||||
TIM2_DIER |= TIM_DIER_UIE;
|
||||
__asm__ volatile ("dmb");
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern volatile uint32_t time_elapsed;
|
||||
void isr_tim2(void)
|
||||
{
|
||||
static volatile uint32_t tim2_ticks = 0;
|
||||
TIM2_SR &= ~TIM_SR_UIF;
|
||||
|
||||
/* Dim the led by altering the PWM duty-cicle */
|
||||
if (++tim2_ticks > 15)
|
||||
tim2_ticks = 0;
|
||||
if (tim2_ticks > 8)
|
||||
pwm_init(master_clock, 10 * (16 - tim2_ticks));
|
||||
else
|
||||
pwm_init(master_clock, 10 * tim2_ticks);
|
||||
|
||||
time_elapsed++;
|
||||
}
|
||||
#else
|
||||
void isr_tim2(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* PLATFORM_stm32f4 */
|
||||
/* timer.c
|
||||
*
|
||||
* Test bare-metal blinking led application
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#ifdef PLATFORM_stm32f4
|
||||
#include <stdint.h>
|
||||
|
||||
#include "system.h"
|
||||
#include "led.h"
|
||||
|
||||
|
||||
/* STM32 specific defines */
|
||||
#define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
|
||||
#define APB1_CLOCK_RST (*(volatile uint32_t *)(0x40023820))
|
||||
#define TIM4_APB1_CLOCK_ER_VAL (1 << 2)
|
||||
#define TIM2_APB1_CLOCK_ER_VAL (1 << 0)
|
||||
|
||||
#define TIM2_BASE (0x40000000)
|
||||
#define TIM2_CR1 (*(volatile uint32_t *)(TIM2_BASE + 0x00))
|
||||
#define TIM2_DIER (*(volatile uint32_t *)(TIM2_BASE + 0x0c))
|
||||
#define TIM2_SR (*(volatile uint32_t *)(TIM2_BASE + 0x10))
|
||||
#define TIM2_PSC (*(volatile uint32_t *)(TIM2_BASE + 0x28))
|
||||
#define TIM2_ARR (*(volatile uint32_t *)(TIM2_BASE + 0x2c))
|
||||
|
||||
#define TIM4_BASE (0x40000800)
|
||||
#define TIM4_CR1 (*(volatile uint32_t *)(TIM4_BASE + 0x00))
|
||||
#define TIM4_DIER (*(volatile uint32_t *)(TIM4_BASE + 0x0c))
|
||||
#define TIM4_SR (*(volatile uint32_t *)(TIM4_BASE + 0x10))
|
||||
#define TIM4_CCMR1 (*(volatile uint32_t *)(TIM4_BASE + 0x18))
|
||||
#define TIM4_CCMR2 (*(volatile uint32_t *)(TIM4_BASE + 0x1c))
|
||||
#define TIM4_CCER (*(volatile uint32_t *)(TIM4_BASE + 0x20))
|
||||
#define TIM4_PSC (*(volatile uint32_t *)(TIM4_BASE + 0x28))
|
||||
#define TIM4_ARR (*(volatile uint32_t *)(TIM4_BASE + 0x2c))
|
||||
#define TIM4_CCR4 (*(volatile uint32_t *)(TIM4_BASE + 0x40))
|
||||
|
||||
#define TIM_DIER_UIE (1 << 0)
|
||||
#define TIM_SR_UIF (1 << 0)
|
||||
#define TIM_CR1_CLOCK_ENABLE (1 << 0)
|
||||
#define TIM_CR1_UPD_RS (1 << 2)
|
||||
#define TIM_CR1_ARPE (1 << 7)
|
||||
|
||||
#define TIM_CCER_CC4_ENABLE (1 << 12)
|
||||
#define TIM_CCMR1_OC1M_PWM1 (0x06 << 4)
|
||||
#define TIM_CCMR2_OC4M_PWM1 (0x06 << 12)
|
||||
|
||||
#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
|
||||
#define GPIOD_AHB1_CLOCK_ER (1 << 3)
|
||||
|
||||
#define GPIOD_BASE 0x40020c00
|
||||
#define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
|
||||
#define GPIOD_OTYPE (*(volatile uint32_t *)(GPIOD_BASE + 0x04))
|
||||
#define GPIOD_PUPD (*(volatile uint32_t *)(GPIOD_BASE + 0x0c))
|
||||
#define GPIOD_ODR (*(volatile uint32_t *)(GPIOD_BASE + 0x14))
|
||||
|
||||
static uint32_t master_clock = 0;
|
||||
|
||||
/** Use TIM4_CH4, which is linked to PD15 AF1 **/
|
||||
int pwm_init(uint32_t clock, uint32_t threshold)
|
||||
{
|
||||
uint32_t val = (clock / 100000); /* Frequency is 100 KHz */
|
||||
uint32_t lvl;
|
||||
master_clock = clock;
|
||||
|
||||
if (threshold > 100)
|
||||
return -1;
|
||||
|
||||
lvl = (val * threshold) / 100;
|
||||
if (lvl != 0)
|
||||
lvl--;
|
||||
|
||||
APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL;
|
||||
asm volatile ("dmb");
|
||||
APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL;
|
||||
APB1_CLOCK_ER |= TIM4_APB1_CLOCK_ER_VAL;
|
||||
|
||||
/* disable CC */
|
||||
TIM4_CCER &= ~TIM_CCER_CC4_ENABLE;
|
||||
TIM4_CR1 = 0;
|
||||
TIM4_PSC = 0;
|
||||
TIM4_ARR = val - 1;
|
||||
TIM4_CCR4 = lvl;
|
||||
TIM4_CCMR1 &= ~(0x03 << 0);
|
||||
TIM4_CCMR1 &= ~(0x07 << 4);
|
||||
TIM4_CCMR1 |= TIM_CCMR1_OC1M_PWM1;
|
||||
TIM4_CCMR2 &= ~(0x03 << 8);
|
||||
TIM4_CCMR2 &= ~(0x07 << 12);
|
||||
TIM4_CCMR2 |= TIM_CCMR2_OC4M_PWM1;
|
||||
TIM4_CCER |= TIM_CCER_CC4_ENABLE;
|
||||
TIM4_CR1 |= TIM_CR1_CLOCK_ENABLE | TIM_CR1_ARPE;
|
||||
asm volatile ("dmb");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int timer_init(uint32_t clock, uint32_t prescaler, uint32_t interval_ms)
|
||||
{
|
||||
uint32_t val = 0;
|
||||
uint32_t psc = 1;
|
||||
uint32_t err = 0;
|
||||
clock = ((clock * prescaler) / 1000) * interval_ms;
|
||||
|
||||
while (psc < 65535) {
|
||||
val = clock / psc;
|
||||
err = clock % psc;
|
||||
if ((val < 65535) && (err == 0)) {
|
||||
val--;
|
||||
break;
|
||||
}
|
||||
val = 0;
|
||||
psc++;
|
||||
}
|
||||
if (val == 0)
|
||||
return -1;
|
||||
|
||||
nvic_irq_enable(NVIC_TIM2_IRQN);
|
||||
nvic_irq_setprio(NVIC_TIM2_IRQN, 0);
|
||||
APB1_CLOCK_RST |= TIM2_APB1_CLOCK_ER_VAL;
|
||||
asm volatile ("dmb");
|
||||
APB1_CLOCK_RST &= ~TIM2_APB1_CLOCK_ER_VAL;
|
||||
APB1_CLOCK_ER |= TIM2_APB1_CLOCK_ER_VAL;
|
||||
|
||||
TIM2_CR1 = 0;
|
||||
asm volatile ("dmb");
|
||||
TIM2_PSC = psc;
|
||||
TIM2_ARR = val;
|
||||
TIM2_CR1 |= TIM_CR1_CLOCK_ENABLE;
|
||||
TIM2_DIER |= TIM_DIER_UIE;
|
||||
asm volatile ("dmb");
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern volatile uint32_t time_elapsed;
|
||||
void isr_tim2(void)
|
||||
{
|
||||
static volatile uint32_t tim2_ticks = 0;
|
||||
TIM2_SR &= ~TIM_SR_UIF;
|
||||
|
||||
/* Dim the led by altering the PWM duty-cicle */
|
||||
if (++tim2_ticks > 15)
|
||||
tim2_ticks = 0;
|
||||
if (tim2_ticks > 8)
|
||||
pwm_init(master_clock, 10 * (16 - tim2_ticks));
|
||||
else
|
||||
pwm_init(master_clock, 10 * tim2_ticks);
|
||||
|
||||
time_elapsed++;
|
||||
}
|
||||
#else
|
||||
void isr_tim2(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* PLATFORM_stm32f4 */
|
||||
|
|
|
|||
|
|
@ -62,18 +62,18 @@
|
|||
#define KEYGEN_RSA2048 2
|
||||
#define KEYGEN_RSA4096 3
|
||||
|
||||
const char Ed25519_pub_key_define[] = "const uint8_t ed25519_pub_key[32] = {";
|
||||
const char Ecc256_pub_key_define[] = "const uint8_t ecc256_pub_key[64] = {";
|
||||
const char Rsa_2048_pub_key_define[] = "const uint8_t rsa2048_pub_key[%d] = {";
|
||||
const char Rsa_4096_pub_key_define[] = "const uint8_t rsa4096_pub_key[%d] = {";
|
||||
|
||||
const char Cfile_Banner[] = "/* Public-key file for wolfBoot, automatically generated. Do not edit. */\n" \
|
||||
"/*\n" \
|
||||
" * This file has been generated and contains the public key which is\n" \
|
||||
" * used by wolfBoot to verify the updates.\n" \
|
||||
" */" \
|
||||
"\n#include <stdint.h>\n\n";
|
||||
|
||||
const char Ed25519_pub_key_define[] = "const uint8_t ed25519_pub_key[32] = {";
|
||||
const char Ecc256_pub_key_define[] = "const uint8_t ecc256_pub_key[64] = {";
|
||||
const char Rsa_2048_pub_key_define[] = "const uint8_t rsa2048_pub_key[%d] = {";
|
||||
const char Rsa_4096_pub_key_define[] = "const uint8_t rsa4096_pub_key[%d] = {";
|
||||
|
||||
const char Cfile_Banner[] = "/* Public-key file for wolfBoot, automatically generated. Do not edit. */\n" \
|
||||
"/*\n" \
|
||||
" * This file has been generated and contains the public key which is\n" \
|
||||
" * used by wolfBoot to verify the updates.\n" \
|
||||
" */" \
|
||||
"\n#include <stdint.h>\n\n";
|
||||
|
||||
|
||||
|
||||
static void usage(const char *pname) /* implies exit */
|
||||
|
|
@ -139,7 +139,7 @@ static void keygen_rsa(WC_RNG *rng, char *pubkeyfile, int size)
|
|||
fprintf(fpub, "%s", Cfile_Banner);
|
||||
if (size == 2048)
|
||||
fprintf(fpub, Rsa_2048_pub_key_define, publen);
|
||||
else
|
||||
else
|
||||
fprintf(fpub, Rsa_4096_pub_key_define, publen);
|
||||
|
||||
fwritekey(pub_der, publen, fpub);
|
||||
|
|
|
|||
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Reference in New Issue