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wolfBoot
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Completed Windows/IAR example, removed extra files

iar
Daniele Lacamera 2020-03-31 11:54:58 +02:00
parent 7e6452467b
commit 8c6272df4a
29 changed files with 5568 additions and 4154 deletions
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5
.gitignore vendored
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@ -84,3 +84,8 @@ config/*.ld
.vs .vs
*.filters *.filters
*.user *.user
# IAR files not under version control
IDE/IAR/settings
IDE/IAR/*.ewt

88
IDE/IAR/README.md 100644
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@ -0,0 +1,88 @@
# wolfBoot demo application for IAR EWARM
Instruction to compile and test under MS Windows.
## Target platform
This example application has been configured to work on STM32F4.
wolfBoot is stored and executed at the beginning of the flash (0x08000000), while the signed
application image starts at address 0x08020000.
## Workspace
The workspace [wolfboot-test-app.eww](./wolfboot-test-app.eww) contains two projects:
- wolfBoot
- wolfBoot-test-app
Each project will compile into a separate binary, the two binaries can be uploaded to the target using
ST-Link utilities (e.g. [STSW-LINK004](https://www.st.com/en/development-tools/stsw-link004.html)) as explained below.
## Instructions
### Creating the keys
This step is required to compile the bootloader.
Open a command line terminal in the [IAR](./) directory. Execute the following script:
```
generate_key.bat
```
The script will generate a keypair. The file `ecc256.der` in the root of the repository contains the private key that will be used
to sign valid firmware images. The file `src/ecc256_pub_key.c` now contains the public key that the bootloader embeds in its codebase
to use it later to verify the image.
### Compiling and linking the images
Now both projects (wolfboot and wolfboot-test-app) can be compiled and linked.
The two resulting images will be placed in the output directory `Debug/Exe`:
- wolfboot.bin
- wolfboot-test-app.bin
### Signing the firmware image
The test application (main firmware) must be now tagged with a version number and signed. This is done by the script `sign_test_app.bat`.
The script requires one numeric argument that is used as the version tag for the signed image. Running it with version "1":
```
sign_test_app.bat 1
```
Will create a new file named `wolfboot-test-app_v1_signed.bin`, which will be placed in the output directory `Debug/Exe`.
### Uploading the binary images to the target
Using the ST-LINK Utility, perform the following steps:
1. Erase the entire flash memory
![Erase flash](../../docs/png/windows_erase.png)
*Erase the entire flash memory before uploading the binary files*
2. Upload `wolfboot.bin` to addess 0x08000000
![Upload bootloader](../../docs/png/windows_upload_1.png)
3. Upload `wolfboot-test-app_v1_signed.bin` to address 0x08020000. Ensure that the flag "Skip Flash Erase" is active.
![Upload firmware](../../docs/png/windows_upload_2.png)
### Verify that the system is up and running
If you are using a STM32F407-discovery board, a red LED will turn on upon application boot.

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IDE/IAR/generate_key.bat 100644
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@ -0,0 +1,2 @@
keytools\keygen.exe --ecc256 ..\..\src\ecc256_pub_key.c
mv ecc256.der ..\..\

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IDE/IAR/keytools/README.md 100644
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@ -0,0 +1,3 @@
## Pre-compiled Key management tools for windows (64bit)
Full sources available in the [keytools](../../../tools/keytools) directory in this repository.

BIN
IDE/IAR/keytools/keygen.exe 100644
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IDE/IAR/keytools/sign.exe 100644
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IDE/IAR/settings/wolfBoot.wsdt
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40
IDE/IAR/settings/wolfboot.Debug.cspy.bat
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@ -1,40 +0,0 @@
@REM This batch file has been generated by the IAR Embedded Workbench
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
@echo off
if not "%~1" == "" goto debugFile
@echo on
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
@echo off
goto end
:debugFile
@echo on
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
@echo off
:end

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IDE/IAR/settings/wolfboot.Debug.cspy.ps1
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@ -1,31 +0,0 @@
param([String]$debugfile = "");
# This powershell file has been generated by the IAR Embedded Workbench
# C - SPY Debugger, as an aid to preparing a command line for running
# the cspybat command line utility using the appropriate settings.
#
# Note that this file is generated every time a new debug session
# is initialized, so you may want to move or rename the file before
# making changes.
#
# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed
# by the name of the debug file (usually an ELF / DWARF or UBROF file).
#
# Read about available command line parameters in the C - SPY Debugging
# Guide. Hints about additional command line parameters that may be
# useful in specific cases :
# --download_only Downloads a code image without starting a debug
# session afterwards.
# --silent Omits the sign - on message.
# --timeout Limits the maximum allowed execution time.
#
if ($debugfile -eq "")
{
& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
}
else
{
& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\dan\wolfboot\IDE\IAR\settings\wolfboot.Debug.driver.xcl"
}

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IDE/IAR/settings/wolfboot.Debug.driver.xcl
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@ -1,19 +0,0 @@
"--endian=little"
"--cpu=Cortex-M4"
"--fpu=None"
"-p"
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\CONFIG\debugger\ST\STM32F407VG.ddf"
"--semihosting=none"
"--device=STM32F407VG"
"--multicore_nr_of_cores=1"

13
IDE/IAR/settings/wolfboot.Debug.general.xcl
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@ -1,13 +0,0 @@
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll"
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armsim2.dll"
"C:\Users\dan\wolfboot\IDE\IAR\Debug\Exe\wolfboot.out"
--plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armbat.dll"
--device_macro="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\ST\STM32F4xx.dmac"

13
IDE/IAR/settings/wolfboot.crun
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@ -1,13 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<crun>
<version>1</version>
<filter_entries>
<filter index="0" type="default">
<type>*</type>
<start_file>*</start_file>
<end_file>*</end_file>
<action_debugger>0</action_debugger>
<action_log>1</action_log>
</filter>
</filter_entries>
</crun>

4
IDE/IAR/settings/wolfboot.dbgdt
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@ -1,4 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<Project>
<WindowStorage />
</Project>

58
IDE/IAR/settings/wolfboot.dnx
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@ -1,58 +0,0 @@
<?xml version="1.0"?>
<settings>
<Stack>
<FillEnabled>0</FillEnabled>
<OverflowWarningsEnabled>1</OverflowWarningsEnabled>
<WarningThreshold>90</WarningThreshold>
<SpWarningsEnabled>1</SpWarningsEnabled>
<WarnLogOnly>1</WarnLogOnly>
<UseTrigger>1</UseTrigger>
<TriggerName>main</TriggerName>
<LimitSize>0</LimitSize>
<ByteLimit>50</ByteLimit>
</Stack>
<Trace1>
<Enabled>0</Enabled>
<ShowSource>1</ShowSource>
</Trace1>
<InterruptLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</InterruptLog>
<DataLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
</DataLog>
<DisassembleMode>
<mode>0</mode>
</DisassembleMode>
<Breakpoints2>
<Count>0</Count>
</Breakpoints2>
<Interrupts>
<Enabled>1</Enabled>
</Interrupts>
<MemConfig>
<Base>1</Base>
<Manual>0</Manual>
<Ddf>1</Ddf>
<TypeViol>0</TypeViol>
<Stop>1</Stop>
</MemConfig>
<Aliases>
<Count>0</Count>
<SuppressDialog>0</SuppressDialog>
</Aliases>
<Simulator>
<Freq>10000000</Freq>
<FreqHi>0</FreqHi>
<MultiCoreRunAll>1</MultiCoreRunAll>
</Simulator>
</settings>

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IDE/IAR/sign_test_app.bat 100644
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@ -0,0 +1,13 @@
echo off
if "%~1"=="" goto fail
keytools\sign.exe --ecc256 --sha256 Debug\Exe\wolfboot-test-app.bin ..\..\ecc256.der %1
goto out
:fail
echo please specify a version number.
:out

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IDE/IAR/test-app.icf 100644
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@ -0,0 +1,62 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\linker\ST\IcfEditor\stm32f40x_fsmc.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08020100;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_FLASH_start__ = 0x08020100;
define symbol __ICFEDIT_region_FLASH_end__ = 0x0803FFFF;
define symbol __ICFEDIT_region_FSMC11_start__ = 0x0;
define symbol __ICFEDIT_region_FSMC11_end__ = 0x0;
define symbol __ICFEDIT_region_FSMC12_start__ = 0x0;
define symbol __ICFEDIT_region_FSMC12_end__ = 0x0;
define symbol __ICFEDIT_region_FSMC13_start__ = 0x0;
define symbol __ICFEDIT_region_FSMC13_end__ = 0x0;
define symbol __ICFEDIT_region_FSMC14_start__ = 0x0;
define symbol __ICFEDIT_region_FSMC14_end__ = 0x0;
define symbol __ICFEDIT_region_NAND1_start__ = 0x0;
define symbol __ICFEDIT_region_NAND1_end__ = 0x0;
define symbol __ICFEDIT_region_NAND2_start__ = 0x0;
define symbol __ICFEDIT_region_NAND2_end__ = 0x0;
define symbol __ICFEDIT_region_PCARD_start__ = 0x0;
define symbol __ICFEDIT_region_PCARD_end__ = 0x0;
define symbol __ICFEDIT_region_CCRAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_CCRAM_end__ = 0x1000FFFF;
define symbol __ICFEDIT_region_SRAM1_start__ = 0x20000000;
define symbol __ICFEDIT_region_SRAM1_end__ = 0x2001BFFF;
define symbol __ICFEDIT_region_SRAM2_start__ = 0x2001C000;
define symbol __ICFEDIT_region_SRAM2_end__ = 0x2001FFFF;
define symbol __ICFEDIT_region_BKPR_start__ = 0x40024000;
define symbol __ICFEDIT_region_BKPR_end__ = 0x40024FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__ = 0x2000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_FLASH_start__ to __ICFEDIT_region_FLASH_end__ ];
define region FSMC_region = mem:[from __ICFEDIT_region_FSMC11_start__ to __ICFEDIT_region_FSMC11_end__]
| mem:[from __ICFEDIT_region_FSMC12_start__ to __ICFEDIT_region_FSMC12_end__]
| mem:[from __ICFEDIT_region_FSMC13_start__ to __ICFEDIT_region_FSMC13_end__]
| mem:[from __ICFEDIT_region_FSMC14_start__ to __ICFEDIT_region_FSMC14_end__];
define region NAND_region = mem:[from __ICFEDIT_region_NAND1_start__ to __ICFEDIT_region_NAND1_end__ ]
| mem:[from __ICFEDIT_region_NAND2_start__ to __ICFEDIT_region_NAND2_end__ ];
define region PCARD_region = mem:[from __ICFEDIT_region_PCARD_start__ to __ICFEDIT_region_PCARD_end__ ];
define region CCRAM_region = mem:[from __ICFEDIT_region_CCRAM_start__ to __ICFEDIT_region_CCRAM_end__ ];
define region SRAM_region = mem:[from __ICFEDIT_region_SRAM1_start__ to __ICFEDIT_region_SRAM1_end__ ]
| mem:[from __ICFEDIT_region_SRAM2_start__ to __ICFEDIT_region_SRAM2_end__ ];
define region BKPR_region = mem:[from __ICFEDIT_region_BKPR_start__ to __ICFEDIT_region_BKPR_end__ ];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in FLASH_region { readonly };
place in PCARD_region { readonly section application_specific_ro };
place in CCRAM_region { section .ccram };
place in SRAM_region { readwrite, block CSTACK, block HEAP };
place in BKPR_region { section .backup_sram };

3
IDE/IAR/wolfBoot.eww → IDE/IAR/wolfBoot-test-app.eww
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@ -3,5 +3,8 @@
<project> <project>
<path>$WS_DIR$\wolfboot.ewp</path> <path>$WS_DIR$\wolfboot.ewp</path>
</project> </project>
<project>
<path>$WS_DIR$\wolfboot-test-app.ewp</path>
</project>
<batchBuild /> <batchBuild />
</workspace> </workspace>

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IDE/IAR/wolfboot-test-app.ewd 100644
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IDE/IAR/wolfboot-test-app.ewp 100644
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301
IDE/IAR/wolfboot.dep
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@ -1,301 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<project>
<fileVersion>4</fileVersion>
<fileChecksum>2162361655</fileChecksum>
<configuration>
<name>Debug</name>
<outputs>
<file>$PROJ_DIR$\Debug\Obj\libwolfboot.o</file>
<file>$PROJ_DIR$\Debug\Obj\update_flash.o</file>
<file>$PROJ_DIR$\Debug\Obj\image.xcl</file>
<file>$PROJ_DIR$\..\..\src\image.c</file>
<file>$PROJ_DIR$\..\..\src\update_flash.c</file>
<file>$PROJ_DIR$\..\..\src\xmalloc_ecc.c</file>
<file>$PROJ_DIR$\Debug\Obj\image.o</file>
<file>$PROJ_DIR$\Debug\Obj\libwolfboot.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\boot_arm.o</file>
<file>$PROJ_DIR$\Debug\Obj\loader.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\update_flash.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\xmalloc_ecc.xcl</file>
<file>$PROJ_DIR$\..\..\src\boot_arm.c</file>
<file>$PROJ_DIR$\Debug\Obj\string.o</file>
<file>$PROJ_DIR$\Debug\Obj\loader.o</file>
<file>$PROJ_DIR$\Debug\Obj\xmalloc_ecc.o</file>
<file>$PROJ_DIR$\Debug\Obj\string.xcl</file>
<file>$PROJ_DIR$\..\..\src\string.c</file>
<file>$PROJ_DIR$\Debug\Obj\boot_arm.xcl</file>
<file>$PROJ_DIR$\..\..\src\libwolfboot.c</file>
<file>$PROJ_DIR$\..\..\src\loader.c</file>
<file>$PROJ_DIR$\Debug\Obj\ecc256_pub_key.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\ecc256_pub_key.o</file>
<file>$PROJ_DIR$\Debug\Obj\wolfboot.pbd</file>
<file>$PROJ_DIR$\..\..\hal\stm32f4.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\memory.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\ecc.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_int.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\wc_port.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha256.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c</file>
<file>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\hash.c</file>
<file>$PROJ_DIR$\Debug\Exe\wolfboot.out</file>
<file>$PROJ_DIR$\Debug\Obj\sha256.o</file>
<file>$PROJ_DIR$\Debug\Obj\hash.o</file>
<file>$PROJ_DIR$\Debug\Obj\wc_port.o</file>
<file>$PROJ_DIR$\Debug\Obj\ecc.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\hash.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\sp_cortexm.o</file>
<file>$PROJ_DIR$\Debug\Obj\sp_int.o</file>
<file>$PROJ_DIR$\Debug\Obj\ecc.o</file>
<file>$PROJ_DIR$\Debug\Obj\memory.o</file>
<file>$PROJ_DIR$\Debug\Obj\sha.o</file>
<file>$PROJ_DIR$\Debug\Obj\sp_int.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\sha256.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\wc_port.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\sp_cortexm.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\stm32f4.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\memory.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\sha.xcl</file>
<file>$PROJ_DIR$\Debug\Obj\stm32f4.o</file>
<file>$PROJ_DIR$\keys\ecc256_pub_key.c</file>
</outputs>
<file>
<name>$PROJ_DIR$\..\..\src\image.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 6</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 2</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\update_flash.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 1</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 10</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\xmalloc_ecc.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 15</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 11</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\boot_arm.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 8</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 18</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\string.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 13</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 16</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\libwolfboot.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 0</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 7</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\loader.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 14</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 9</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\hal\stm32f4.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 51</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 48</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\memory.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 42</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 49</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\ecc.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 41</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 37</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 43</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 50</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_int.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 40</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 44</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\wc_port.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 36</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 46</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sha256.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 34</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 45</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 39</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 47</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\lib\wolfssl\wolfcrypt\src\hash.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 35</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 38</file>
</tool>
</outputs>
</file>
<file>
<name>[ROOT_NODE]</name>
<outputs>
<tool>
<name>ILINK</name>
<file> 33</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\keys\ecc256_pub_key.c</name>
<outputs>
<tool>
<name>ICCARM</name>
<file> 22</file>
</tool>
<tool>
<name>BICOMP</name>
<file> 21</file>
</tool>
</outputs>
</file>
</configuration>
<configuration>
<name>Release</name>
<outputs />
<forcedrebuild>
<name>[MULTI_TOOL]</name>
<tool>ILINK</tool>
</forcedrebuild>
</configuration>
</project>

12
IDE/IAR/wolfboot.ewd
View File

@ -44,7 +44,7 @@
</option> </option>
<option> <option>
<name>MemFile</name> <name>MemFile</name>
<state></state> <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F407VG.ddf</state>
</option> </option>
<option> <option>
<name>RunToEnable</name> <name>RunToEnable</name>
@ -84,11 +84,11 @@
</option> </option>
<option> <option>
<name>OCDynDriverList</name> <name>OCDynDriverList</name>
<state>ARMSIM_ID</state> <state>STLINK_ID</state>
</option> </option>
<option> <option>
<name>OCLastSavedByProductVersion</name> <name>OCLastSavedByProductVersion</name>
<state></state> <state>8.50.1.24770</state>
</option> </option>
<option> <option>
<name>UseFlashLoader</name> <name>UseFlashLoader</name>
@ -112,7 +112,7 @@
</option> </option>
<option> <option>
<name>FlashLoadersV3</name> <name>FlashLoadersV3</name>
<state></state> <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F4xxx.board</state>
</option> </option>
<option> <option>
<name>OCImagesSuppressCheck1</name> <name>OCImagesSuppressCheck1</name>
@ -180,7 +180,7 @@
</option> </option>
<option> <option>
<name>OCMulticoreNrOfCores</name> <name>OCMulticoreNrOfCores</name>
<state></state> <state>1</state>
</option> </option>
<option> <option>
<name>OCMulticoreWorkspace</name> <name>OCMulticoreWorkspace</name>
@ -1029,7 +1029,7 @@
</option> </option>
<option> <option>
<name>CCCpuClockEdit</name> <name>CCCpuClockEdit</name>
<state></state> <state>168.0</state>
</option> </option>
<option> <option>
<name>CCSwoClockAuto</name> <name>CCSwoClockAuto</name>

17
IDE/IAR/wolfboot.ewp
View File

@ -655,15 +655,15 @@
<option> <option>
<name>OOCOutputFormat</name> <name>OOCOutputFormat</name>
<version>3</version> <version>3</version>
<state>0</state> <state>3</state>
</option> </option>
<option> <option>
<name>OCOutputOverride</name> <name>OCOutputOverride</name>
<state>0</state> <state>1</state>
</option> </option>
<option> <option>
<name>OOCOutputFile</name> <name>OOCOutputFile</name>
<state></state> <state>wolfboot.bin</state>
</option> </option>
<option> <option>
<name>OOCCommandLineProducer</name> <name>OOCCommandLineProducer</name>
@ -671,7 +671,7 @@
</option> </option>
<option> <option>
<name>OOCObjCopyEnable</name> <name>OOCObjCopyEnable</name>
<state>0</state> <state>1</state>
</option> </option>
</data> </data>
</settings> </settings>
@ -2160,12 +2160,6 @@
<name>$PROJ_DIR$\..\..\include\user_settings.h</name> <name>$PROJ_DIR$\..\..\include\user_settings.h</name>
</file> </file>
</group> </group>
<group>
<name>keys</name>
<file>
<name>$PROJ_DIR$\keys\ecc256_pub_key.c</name>
</file>
</group>
<group> <group>
<name>lib</name> <name>lib</name>
<group> <group>
@ -2201,6 +2195,9 @@
<file> <file>
<name>$PROJ_DIR$\..\..\src\boot_arm.c</name> <name>$PROJ_DIR$\..\..\src\boot_arm.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\src\ecc256_pub_key.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\src\image.c</name> <name>$PROJ_DIR$\..\..\src\image.c</name>
</file> </file>

2875
IDE/IAR/wolfboot.ewt
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134
test-app/system.h
View File

@ -1,67 +1,67 @@
/* system.h /* system.h
* *
* *
* Copyright (C) 2020 wolfSSL Inc. * Copyright (C) 2020 wolfSSL Inc.
* *
* This file is part of wolfBoot. * This file is part of wolfBoot.
* *
* wolfBoot is free software; you can redistribute it and/or modify * wolfBoot is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or * the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version. * (at your option) any later version.
* *
* wolfBoot is distributed in the hope that it will be useful, * wolfBoot is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of * but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/ */
#ifndef SYSTEM_H_INCLUDED #ifndef SYSTEM_H_INCLUDED
#define SYSTEM_H_INCLUDED #define SYSTEM_H_INCLUDED
/* System specific: PLL with 8 MHz external oscillator, CPU at 168MHz */ /* System specific: PLL with 8 MHz external oscillator, CPU at 168MHz */
#define CPU_FREQ (168000000) #define CPU_FREQ (168000000)
#define PLL_FULL_MASK (0x7F037FFF) #define PLL_FULL_MASK (0x7F037FFF)
/* Assembly helpers */ /* Assembly helpers */
#define DMB() __asm__ volatile ("dmb"); #define DMB() asm volatile ("dmb");
#define WFI() __asm__ volatile ("wfi"); #define WFI() asm volatile ("wfi");
/* Master clock setting */ /* Master clock setting */
void clock_config(void); void clock_config(void);
void flash_set_waitstates(void); void flash_set_waitstates(void);
/* NVIC */ /* NVIC */
/* NVIC ISER Base register (Cortex-M) */ /* NVIC ISER Base register (Cortex-M) */
#define NVIC_TIM2_IRQN (28) #define NVIC_TIM2_IRQN (28)
#define NVIC_ISER_BASE (0xE000E100) #define NVIC_ISER_BASE (0xE000E100)
#define NVIC_ICER_BASE (0xE000E180) #define NVIC_ICER_BASE (0xE000E180)
#define NVIC_IPRI_BASE (0xE000E400) #define NVIC_IPRI_BASE (0xE000E400)
static inline void nvic_irq_enable(uint8_t n) static inline void nvic_irq_enable(uint8_t n)
{ {
int i = n / 32; int i = n / 32;
volatile uint32_t *nvic_iser = ((volatile uint32_t *)(NVIC_ISER_BASE + 4 * i)); volatile uint32_t *nvic_iser = ((volatile uint32_t *)(NVIC_ISER_BASE + 4 * i));
*nvic_iser |= (1 << (n % 32)); *nvic_iser |= (1 << (n % 32));
} }
static inline void nvic_irq_disable(uint8_t n) static inline void nvic_irq_disable(uint8_t n)
{ {
int i = n / 32; int i = n / 32;
volatile uint32_t *nvic_icer = ((volatile uint32_t *)(NVIC_ICER_BASE + 4 * i)); volatile uint32_t *nvic_icer = ((volatile uint32_t *)(NVIC_ICER_BASE + 4 * i));
*nvic_icer |= (1 << (n % 32)); *nvic_icer |= (1 << (n % 32));
} }
static inline void nvic_irq_setprio(uint8_t n, uint8_t prio) static inline void nvic_irq_setprio(uint8_t n, uint8_t prio)
{ {
volatile uint8_t *nvic_ipri = ((volatile uint8_t *)(NVIC_IPRI_BASE + n)); volatile uint8_t *nvic_ipri = ((volatile uint8_t *)(NVIC_IPRI_BASE + n));
*nvic_ipri = prio; *nvic_ipri = prio;
} }
#endif /* !SYSTEM_H_INCLUDED */ #endif /* !SYSTEM_H_INCLUDED */

342
test-app/timer.c
View File

@ -1,171 +1,171 @@
/* timer.c /* timer.c
* *
* Test bare-metal blinking led application * Test bare-metal blinking led application
* *
* Copyright (C) 2020 wolfSSL Inc. * Copyright (C) 2020 wolfSSL Inc.
* *
* This file is part of wolfBoot. * This file is part of wolfBoot.
* *
* wolfBoot is free software; you can redistribute it and/or modify * wolfBoot is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or * the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version. * (at your option) any later version.
* *
* wolfBoot is distributed in the hope that it will be useful, * wolfBoot is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of * but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
*/ */
#ifdef PLATFORM_stm32f4 #ifdef PLATFORM_stm32f4
#include <stdint.h> #include <stdint.h>
#include "system.h" #include "system.h"
#include "led.h" #include "led.h"
/* STM32 specific defines */ /* STM32 specific defines */
#define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840)) #define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
#define APB1_CLOCK_RST (*(volatile uint32_t *)(0x40023820)) #define APB1_CLOCK_RST (*(volatile uint32_t *)(0x40023820))
#define TIM4_APB1_CLOCK_ER_VAL (1 << 2) #define TIM4_APB1_CLOCK_ER_VAL (1 << 2)
#define TIM2_APB1_CLOCK_ER_VAL (1 << 0) #define TIM2_APB1_CLOCK_ER_VAL (1 << 0)
#define TIM2_BASE (0x40000000) #define TIM2_BASE (0x40000000)
#define TIM2_CR1 (*(volatile uint32_t *)(TIM2_BASE + 0x00)) #define TIM2_CR1 (*(volatile uint32_t *)(TIM2_BASE + 0x00))
#define TIM2_DIER (*(volatile uint32_t *)(TIM2_BASE + 0x0c)) #define TIM2_DIER (*(volatile uint32_t *)(TIM2_BASE + 0x0c))
#define TIM2_SR (*(volatile uint32_t *)(TIM2_BASE + 0x10)) #define TIM2_SR (*(volatile uint32_t *)(TIM2_BASE + 0x10))
#define TIM2_PSC (*(volatile uint32_t *)(TIM2_BASE + 0x28)) #define TIM2_PSC (*(volatile uint32_t *)(TIM2_BASE + 0x28))
#define TIM2_ARR (*(volatile uint32_t *)(TIM2_BASE + 0x2c)) #define TIM2_ARR (*(volatile uint32_t *)(TIM2_BASE + 0x2c))
#define TIM4_BASE (0x40000800) #define TIM4_BASE (0x40000800)
#define TIM4_CR1 (*(volatile uint32_t *)(TIM4_BASE + 0x00)) #define TIM4_CR1 (*(volatile uint32_t *)(TIM4_BASE + 0x00))
#define TIM4_DIER (*(volatile uint32_t *)(TIM4_BASE + 0x0c)) #define TIM4_DIER (*(volatile uint32_t *)(TIM4_BASE + 0x0c))
#define TIM4_SR (*(volatile uint32_t *)(TIM4_BASE + 0x10)) #define TIM4_SR (*(volatile uint32_t *)(TIM4_BASE + 0x10))
#define TIM4_CCMR1 (*(volatile uint32_t *)(TIM4_BASE + 0x18)) #define TIM4_CCMR1 (*(volatile uint32_t *)(TIM4_BASE + 0x18))
#define TIM4_CCMR2 (*(volatile uint32_t *)(TIM4_BASE + 0x1c)) #define TIM4_CCMR2 (*(volatile uint32_t *)(TIM4_BASE + 0x1c))
#define TIM4_CCER (*(volatile uint32_t *)(TIM4_BASE + 0x20)) #define TIM4_CCER (*(volatile uint32_t *)(TIM4_BASE + 0x20))
#define TIM4_PSC (*(volatile uint32_t *)(TIM4_BASE + 0x28)) #define TIM4_PSC (*(volatile uint32_t *)(TIM4_BASE + 0x28))
#define TIM4_ARR (*(volatile uint32_t *)(TIM4_BASE + 0x2c)) #define TIM4_ARR (*(volatile uint32_t *)(TIM4_BASE + 0x2c))
#define TIM4_CCR4 (*(volatile uint32_t *)(TIM4_BASE + 0x40)) #define TIM4_CCR4 (*(volatile uint32_t *)(TIM4_BASE + 0x40))
#define TIM_DIER_UIE (1 << 0) #define TIM_DIER_UIE (1 << 0)
#define TIM_SR_UIF (1 << 0) #define TIM_SR_UIF (1 << 0)
#define TIM_CR1_CLOCK_ENABLE (1 << 0) #define TIM_CR1_CLOCK_ENABLE (1 << 0)
#define TIM_CR1_UPD_RS (1 << 2) #define TIM_CR1_UPD_RS (1 << 2)
#define TIM_CR1_ARPE (1 << 7) #define TIM_CR1_ARPE (1 << 7)
#define TIM_CCER_CC4_ENABLE (1 << 12) #define TIM_CCER_CC4_ENABLE (1 << 12)
#define TIM_CCMR1_OC1M_PWM1 (0x06 << 4) #define TIM_CCMR1_OC1M_PWM1 (0x06 << 4)
#define TIM_CCMR2_OC4M_PWM1 (0x06 << 12) #define TIM_CCMR2_OC4M_PWM1 (0x06 << 12)
#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830)) #define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
#define GPIOD_AHB1_CLOCK_ER (1 << 3) #define GPIOD_AHB1_CLOCK_ER (1 << 3)
#define GPIOD_BASE 0x40020c00 #define GPIOD_BASE 0x40020c00
#define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00)) #define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
#define GPIOD_OTYPE (*(volatile uint32_t *)(GPIOD_BASE + 0x04)) #define GPIOD_OTYPE (*(volatile uint32_t *)(GPIOD_BASE + 0x04))
#define GPIOD_PUPD (*(volatile uint32_t *)(GPIOD_BASE + 0x0c)) #define GPIOD_PUPD (*(volatile uint32_t *)(GPIOD_BASE + 0x0c))
#define GPIOD_ODR (*(volatile uint32_t *)(GPIOD_BASE + 0x14)) #define GPIOD_ODR (*(volatile uint32_t *)(GPIOD_BASE + 0x14))
static uint32_t master_clock = 0; static uint32_t master_clock = 0;
/** Use TIM4_CH4, which is linked to PD15 AF1 **/ /** Use TIM4_CH4, which is linked to PD15 AF1 **/
int pwm_init(uint32_t clock, uint32_t threshold) int pwm_init(uint32_t clock, uint32_t threshold)
{ {
uint32_t val = (clock / 100000); /* Frequency is 100 KHz */ uint32_t val = (clock / 100000); /* Frequency is 100 KHz */
uint32_t lvl; uint32_t lvl;
master_clock = clock; master_clock = clock;
if (threshold > 100) if (threshold > 100)
return -1; return -1;
lvl = (val * threshold) / 100; lvl = (val * threshold) / 100;
if (lvl != 0) if (lvl != 0)
lvl--; lvl--;
APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL; APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL;
__asm__ volatile ("dmb"); asm volatile ("dmb");
APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL; APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL;
APB1_CLOCK_ER |= TIM4_APB1_CLOCK_ER_VAL; APB1_CLOCK_ER |= TIM4_APB1_CLOCK_ER_VAL;
/* disable CC */ /* disable CC */
TIM4_CCER &= ~TIM_CCER_CC4_ENABLE; TIM4_CCER &= ~TIM_CCER_CC4_ENABLE;
TIM4_CR1 = 0; TIM4_CR1 = 0;
TIM4_PSC = 0; TIM4_PSC = 0;
TIM4_ARR = val - 1; TIM4_ARR = val - 1;
TIM4_CCR4 = lvl; TIM4_CCR4 = lvl;
TIM4_CCMR1 &= ~(0x03 << 0); TIM4_CCMR1 &= ~(0x03 << 0);
TIM4_CCMR1 &= ~(0x07 << 4); TIM4_CCMR1 &= ~(0x07 << 4);
TIM4_CCMR1 |= TIM_CCMR1_OC1M_PWM1; TIM4_CCMR1 |= TIM_CCMR1_OC1M_PWM1;
TIM4_CCMR2 &= ~(0x03 << 8); TIM4_CCMR2 &= ~(0x03 << 8);
TIM4_CCMR2 &= ~(0x07 << 12); TIM4_CCMR2 &= ~(0x07 << 12);
TIM4_CCMR2 |= TIM_CCMR2_OC4M_PWM1; TIM4_CCMR2 |= TIM_CCMR2_OC4M_PWM1;
TIM4_CCER |= TIM_CCER_CC4_ENABLE; TIM4_CCER |= TIM_CCER_CC4_ENABLE;
TIM4_CR1 |= TIM_CR1_CLOCK_ENABLE | TIM_CR1_ARPE; TIM4_CR1 |= TIM_CR1_CLOCK_ENABLE | TIM_CR1_ARPE;
__asm__ volatile ("dmb"); asm volatile ("dmb");
return 0; return 0;
} }
int timer_init(uint32_t clock, uint32_t prescaler, uint32_t interval_ms) int timer_init(uint32_t clock, uint32_t prescaler, uint32_t interval_ms)
{ {
uint32_t val = 0; uint32_t val = 0;
uint32_t psc = 1; uint32_t psc = 1;
uint32_t err = 0; uint32_t err = 0;
clock = ((clock * prescaler) / 1000) * interval_ms; clock = ((clock * prescaler) / 1000) * interval_ms;
while (psc < 65535) { while (psc < 65535) {
val = clock / psc; val = clock / psc;
err = clock % psc; err = clock % psc;
if ((val < 65535) && (err == 0)) { if ((val < 65535) && (err == 0)) {
val--; val--;
break; break;
} }
val = 0; val = 0;
psc++; psc++;
} }
if (val == 0) if (val == 0)
return -1; return -1;
nvic_irq_enable(NVIC_TIM2_IRQN); nvic_irq_enable(NVIC_TIM2_IRQN);
nvic_irq_setprio(NVIC_TIM2_IRQN, 0); nvic_irq_setprio(NVIC_TIM2_IRQN, 0);
APB1_CLOCK_RST |= TIM2_APB1_CLOCK_ER_VAL; APB1_CLOCK_RST |= TIM2_APB1_CLOCK_ER_VAL;
__asm__ volatile ("dmb"); asm volatile ("dmb");
APB1_CLOCK_RST &= ~TIM2_APB1_CLOCK_ER_VAL; APB1_CLOCK_RST &= ~TIM2_APB1_CLOCK_ER_VAL;
APB1_CLOCK_ER |= TIM2_APB1_CLOCK_ER_VAL; APB1_CLOCK_ER |= TIM2_APB1_CLOCK_ER_VAL;
TIM2_CR1 = 0; TIM2_CR1 = 0;
__asm__ volatile ("dmb"); asm volatile ("dmb");
TIM2_PSC = psc; TIM2_PSC = psc;
TIM2_ARR = val; TIM2_ARR = val;
TIM2_CR1 |= TIM_CR1_CLOCK_ENABLE; TIM2_CR1 |= TIM_CR1_CLOCK_ENABLE;
TIM2_DIER |= TIM_DIER_UIE; TIM2_DIER |= TIM_DIER_UIE;
__asm__ volatile ("dmb"); asm volatile ("dmb");
return 0; return 0;
} }
extern volatile uint32_t time_elapsed; extern volatile uint32_t time_elapsed;
void isr_tim2(void) void isr_tim2(void)
{ {
static volatile uint32_t tim2_ticks = 0; static volatile uint32_t tim2_ticks = 0;
TIM2_SR &= ~TIM_SR_UIF; TIM2_SR &= ~TIM_SR_UIF;
/* Dim the led by altering the PWM duty-cicle */ /* Dim the led by altering the PWM duty-cicle */
if (++tim2_ticks > 15) if (++tim2_ticks > 15)
tim2_ticks = 0; tim2_ticks = 0;
if (tim2_ticks > 8) if (tim2_ticks > 8)
pwm_init(master_clock, 10 * (16 - tim2_ticks)); pwm_init(master_clock, 10 * (16 - tim2_ticks));
else else
pwm_init(master_clock, 10 * tim2_ticks); pwm_init(master_clock, 10 * tim2_ticks);
time_elapsed++; time_elapsed++;
} }
#else #else
void isr_tim2(void) void isr_tim2(void)
{ {
} }
#endif /* PLATFORM_stm32f4 */ #endif /* PLATFORM_stm32f4 */

26
tools/keytools/keygen.c
View File

@ -62,18 +62,18 @@
#define KEYGEN_RSA2048 2 #define KEYGEN_RSA2048 2
#define KEYGEN_RSA4096 3 #define KEYGEN_RSA4096 3
const char Ed25519_pub_key_define[] = "const uint8_t ed25519_pub_key[32] = {"; const char Ed25519_pub_key_define[] = "const uint8_t ed25519_pub_key[32] = {";
const char Ecc256_pub_key_define[] = "const uint8_t ecc256_pub_key[64] = {"; const char Ecc256_pub_key_define[] = "const uint8_t ecc256_pub_key[64] = {";
const char Rsa_2048_pub_key_define[] = "const uint8_t rsa2048_pub_key[%d] = {"; const char Rsa_2048_pub_key_define[] = "const uint8_t rsa2048_pub_key[%d] = {";
const char Rsa_4096_pub_key_define[] = "const uint8_t rsa4096_pub_key[%d] = {"; const char Rsa_4096_pub_key_define[] = "const uint8_t rsa4096_pub_key[%d] = {";
const char Cfile_Banner[] = "/* Public-key file for wolfBoot, automatically generated. Do not edit. */\n" \ const char Cfile_Banner[] = "/* Public-key file for wolfBoot, automatically generated. Do not edit. */\n" \
"/*\n" \ "/*\n" \
" * This file has been generated and contains the public key which is\n" \ " * This file has been generated and contains the public key which is\n" \
" * used by wolfBoot to verify the updates.\n" \ " * used by wolfBoot to verify the updates.\n" \
" */" \ " */" \
"\n#include <stdint.h>\n\n"; "\n#include <stdint.h>\n\n";
static void usage(const char *pname) /* implies exit */ static void usage(const char *pname) /* implies exit */
@ -139,7 +139,7 @@ static void keygen_rsa(WC_RNG *rng, char *pubkeyfile, int size)
fprintf(fpub, "%s", Cfile_Banner); fprintf(fpub, "%s", Cfile_Banner);
if (size == 2048) if (size == 2048)
fprintf(fpub, Rsa_2048_pub_key_define, publen); fprintf(fpub, Rsa_2048_pub_key_define, publen);
else else
fprintf(fpub, Rsa_4096_pub_key_define, publen); fprintf(fpub, Rsa_4096_pub_key_define, publen);
fwritekey(pub_der, publen, fpub); fwritekey(pub_der, publen, fpub);