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Code Issues Releases Wiki Activity

TMS570LC43xx: Fix status updates via NVM_FLASH_WRITEONCE

pull/151/head
Elms 2021-09-03 06:02:52 -07:00 committed by Daniele Lacamera
parent d302c633c2
commit aaa8438f3f
3 changed files with 43 additions and 14 deletions
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5
IDE/CCS/TMS570LC43xx/.cproject
View File

@ -48,6 +48,8 @@
<listOptionValue builtIn="false" value="WOLFBOOT_VERSION=1"/>
<listOptionValue builtIn="false" value="WOLFBOOT_SIGN_ECC256"/>
<listOptionValue builtIn="false" value="BIG_ENDIAN_ORDER"/>
<listOptionValue builtIn="false" value="NVM_FLASH_WRITEONCE"/>
<listOptionValue builtIn="false" value="FLASHBUFFER_SIZE=32"/>
<listOptionValue builtIn="false" value="RAM_CODE=1"/>
<listOptionValue builtIn="false" value="CORTEX_R5"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>
@ -94,7 +96,6 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="lib/wolfboot/tools/bin-assemble"/>
<entry excluding="rsa2048_pub_key.c|rsa4096_pub_key.c|ed25519_pub_key.c|ed25519.c|rsa.c|lib" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
@ -154,6 +155,8 @@
<listOptionValue builtIn="false" value="WOLFBOOT_VERSION=1"/>
<listOptionValue builtIn="false" value="WOLFBOOT_SIGN_ECC256"/>
<listOptionValue builtIn="false" value="BIG_ENDIAN_ORDER"/>
<listOptionValue builtIn="false" value="NVM_FLASH_WRITEONCE"/>
<listOptionValue builtIn="false" value="FLASHBUFFER_SIZE=32"/>
<listOptionValue builtIn="false" value="RAM_CODE=1"/>
<listOptionValue builtIn="false" value="CORTEX_R5"/>
<listOptionValue builtIn="false" value="__WOLFBOOT"/>

32
hal/ti_hercules.c
View File

@ -112,11 +112,13 @@ static inline int RAMFUNCTION hal_flash_unlock_helper(uint32_t address) {
return 0;
}
#define WRITE_BLOCK_SIZE 32
#define WRITE_BLOCK_SIZE FLASHBUFFER_SIZE
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int st = 0;
int off = 0;
int blk_size = WRITE_BLOCK_SIZE;
uint8_t temp[WRITE_BLOCK_SIZE];
hal_flash_unlock_helper(address);
@ -134,12 +136,26 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
0,
Fapi_AutoEccGeneration);
} else {
st = Fapi_issueProgrammingCommand((void*)address,
(uint8_t*)data,
len,
NULL,
0,
Fapi_AutoEccGeneration);
off = 0;
blk_size = WRITE_BLOCK_SIZE;
while(off < len && st == 0) {
blk_size = WRITE_BLOCK_SIZE;
if (len-off < blk_size) {
blk_size = len - off;
}
st = Fapi_issueProgrammingCommand((void*)((uint8_t*)(address) + off),
(uint8_t*)data + off,
blk_size,
NULL,
0,
Fapi_AutoEccGeneration);
while(FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady)
;
off += blk_size;
}
}
if (st != 0) {
@ -212,7 +228,7 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
hal_flash_unlock_helper(address);
for(i=0; i < bank_sectors.u32NumberOfSectors; i++) {
/* perfectly done */
if (end == cur) {
if (end == cur && found_start) {
ret = 0;
break;
}

20
src/libwolfboot.c
View File

@ -58,7 +58,9 @@
# define NULL (void *)0
#endif
#ifndef NVM_CACHE_SIZE
#define NVM_CACHE_SIZE WOLFBOOT_SECTOR_SIZE
#endif
#ifdef EXT_FLASH
static uint32_t ext_cache;
@ -97,15 +99,23 @@ static const uint32_t wolfboot_magic_trail = WOLFBOOT_MAGIC_TRAIL;
static uint8_t NVM_CACHE[NVM_CACHE_SIZE] __attribute__((aligned(16)));
int RAMFUNCTION hal_trailer_write(uint32_t addr, uint8_t val) {
uint32_t addr_align = addr & (~(WOLFBOOT_SECTOR_SIZE - 1));
uint32_t addr_off = addr & (WOLFBOOT_SECTOR_SIZE - 1);
uint32_t addr_align = addr & (~(NVM_CACHE_SIZE - 1));
uint32_t addr_off = addr & (NVM_CACHE_SIZE - 1);
int ret = 0;
XMEMCPY(NVM_CACHE, (void *)addr_align, WOLFBOOT_SECTOR_SIZE);
ret = hal_flash_erase(addr_align, WOLFBOOT_SECTOR_SIZE);
XMEMCPY(NVM_CACHE, (void *)addr_align, NVM_CACHE_SIZE);
ret = hal_flash_erase(addr_align, NVM_CACHE_SIZE);
if (ret != 0)
return ret;
NVM_CACHE[addr_off] = val;
ret = hal_flash_write(addr_align, NVM_CACHE, WOLFBOOT_SECTOR_SIZE);
#if FLASHBUFFER_SIZE != WOLFBOOT_SECTOR_SIZE
addr_off = 0;
while ((addr_off < WOLFBOOT_SECTOR_SIZE) && (ret == 0)) {
ret = hal_flash_write(addr_align + addr_off, NVM_CACHE + addr_off, FLASHBUFFER_SIZE);
addr_off += FLASHBUFFER_SIZE;
}
#else
ret = hal_flash_write(addr_align, NVM_CACHE, NVM_CACHE_SIZE);
#endif
return ret;
}