mirror of https://github.com/wolfSSL/wolfBoot.git
parent
829f7b1705
commit
dbdb08b3eb
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@ -142,7 +142,7 @@ int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
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mode = 0;
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mode |= data;
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mode |= (stop << 2);
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mode |= (stops << 2);
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mode |= (parity_bits << 3);
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write_reg(X86_UART_LCR, mode);
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@ -501,6 +501,8 @@ static int fsp_silicon_init(struct fsp_info_header *fsp_info, uint8_t *fsp_s_bas
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memcpy(silicon_init_parameter, fsp_s_base + fsp_info->CfgRegionOffset,
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FSP_S_PARAM_SIZE);
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status = fsp_machine_update_s_parameters(silicon_init_parameter);
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if (status != 0)
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panic();
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SiliconInit = (silicon_init_cb)(fsp_s_base + fsp_info->FspSiliconInitEntryOffset);
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#if defined(WOLFBOOT_DUMP_FSP_UPD)
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@ -88,6 +88,7 @@ int elf_load_image_mmu(uint8_t *image, uintptr_t *entry, elf_mmu_map_cb mmu_cb)
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/* Load class and endianess */
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is_elf32 = (h32->ident[4] == ELF_CLASS_32);
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is_le = (h32->ident[5] == ELF_ENDIAN_LITTLE);
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(void)is_le;
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/* Verify this is an executable */
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if (GET_H16(type) != ELF_HET_EXEC) {
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@ -171,7 +171,6 @@ int init_sata_controller(uint32_t bus, uint32_t dev, uint32_t fun)
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uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun)
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{
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uint16_t reg16;
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uint32_t iobar;
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uint32_t reg;
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uint32_t bar;
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@ -180,8 +179,6 @@ uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun)
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bar = pci_config_read32(bus, dev, fun, AHCI_ABAR_OFFSET);
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AHCI_DEBUG_PRINTF("PCI BAR: %08x\r\n", bar);
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iobar = pci_config_read32(bus, dev, fun, AHCI_AIDPBA_OFFSET);
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AHCI_DEBUG_PRINTF("PCI I/O space: %08x\r\n", iobar);
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reg |= PCI_COMMAND_BUS_MASTER;
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reg |= PCI_COMMAND_MEM_SPACE;
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@ -197,29 +194,6 @@ uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun)
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return bar;
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}
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/**
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* @brief Dumps the status of the specified AHCI port.
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*
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* This function dumps the status of the AHCI port with the given index.
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* It prints the status of various port registers for debugging purposes.
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*
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* @param base The AHCI Base Address Register (ABAR) for accessing AHCI registers.
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* @param i The index of the AHCI port to dump status for.
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*/
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void ahci_dump_port(uint32_t base, int i)
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{
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uint32_t cmd, ci, is, tfd, serr, ssst;
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cmd = mmio_read32(AHCI_PxCMD(base, i));
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ci = mmio_read32(AHCI_PxCI(base, i));
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is = mmio_read32(AHCI_PxIS(base, i));
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tfd = mmio_read32(AHCI_PxTFD(base, i));
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serr = mmio_read32(AHCI_PxSERR(base, i));
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ssst = mmio_read32(AHCI_PxSSTS(base, i));
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AHCI_DEBUG_PRINTF("%d: cmd:0x%x ci:0x%x is: 0x%x tfd: 0x%x serr: 0x%x ssst: 0x%x\r\n",
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i, cmd, ci, is, tfd, serr, ssst);
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}
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#ifdef WOLFBOOT_ATA_DISK_LOCK
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#ifdef WOLFBOOT_ATA_DISK_LOCK_PASSWORD
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static int sata_get_unlock_secret(uint8_t *secret, int *secret_size)
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@ -362,7 +336,7 @@ static int sata_get_unlock_secret(uint8_t *secret, int *secret_size)
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#error "implement get_tpm_policy "
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#endif
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if (policy_size > TPM_MAX_POLICY_SIZE)
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if (policy_size > TPM_MAX_POLICY_SIZE || ret != 0)
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return -1;
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memcpy(policy, pol, policy_size);
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@ -464,6 +438,8 @@ int sata_unlock_disk(int drv, int freeze)
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}
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r = ata_identify_device(drv);
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AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r);
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if (r != 0)
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return -1;
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ata_st = ata_security_get_state(drv);
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wolfBoot_printf("ATA: State SEC%d\r\n", ata_st);
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}
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@ -471,8 +447,12 @@ int sata_unlock_disk(int drv, int freeze)
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AHCI_DEBUG_PRINTF("ATA identify: calling device unlock\r\n", r);
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r = ata_security_unlock_device(drv, (char*)secret, 0);
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AHCI_DEBUG_PRINTF("ATA device unlock: returned %d\r\n", r);
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if (r != 0)
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return -1;
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r = ata_identify_device(drv);
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AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r);
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if (r != 0)
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return -1;
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ata_st = ata_security_get_state(drv);
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if (ata_st == ATA_SEC5) {
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if (freeze) {
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@ -487,6 +467,8 @@ int sata_unlock_disk(int drv, int freeze)
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}
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r = ata_identify_device(drv);
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AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r);
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if (r != 0)
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return -1;
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}
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}
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ata_st = ata_security_get_state(drv);
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@ -583,6 +565,7 @@ void sata_enable(uint32_t base)
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cap = mmio_read32(AHCI_HBA_CAP(base));
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n_ports = (cap & 0x1F) + 1;
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(void)n_ports;
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sata_only = (cap & AHCI_CAP_SAM);
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cap_sud = (cap & AHCI_CAP_SSS);
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@ -601,8 +584,8 @@ void sata_enable(uint32_t base)
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if ((ports_impl & (1 << i)) != 0) {
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uint32_t reg;
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uint32_t ssts = mmio_read32(AHCI_PxSSTS(base, i));
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uint8_t ipm = (ssts >> 8) & 0xFF;
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uint8_t det = ssts & 0x0F;
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uint8_t ipm;
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volatile struct hba_cmd_header *hdr;
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@ -736,6 +719,7 @@ void sata_enable(uint32_t base)
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AHCI_DEBUG_PRINTF("ATA%d associated to AHCI port %d\r\n",
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drv, i);
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r = ata_identify_device(drv);
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(void)r;
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AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r);
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}
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} else {
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@ -601,6 +601,7 @@ int ata_identify_device(int drv)
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if (slot < 0)
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return slot;
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s_locked = s_frozen = s_enabled = 0;
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cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port;
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cmd += slot;
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@ -612,6 +613,7 @@ int ata_identify_device(int drv)
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ret = exec_cmd_slot(drv, slot);
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if (ret == 0) {
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uint16_t *id_buf = (uint16_t *)buffer;
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(void)id_buf;
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uint16_t cmd_set_supported;
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uint16_t sec_status;
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ATA_DEBUG_PRINTF("Device identified\r\n");
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@ -663,7 +665,6 @@ int ata_identify_device(int drv)
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}
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if (sec_status & (1 << 0)) {
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ATA_DEBUG_PRINTF("Security: supported\r\n");
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s_supported = 1;
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}
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if (!s_enabled && !s_frozen)
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ata->sec = ATA_SEC1;
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@ -697,6 +698,8 @@ static int ata_drive_read_sector(int drv, uint64_t start, uint32_t count,
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struct fis_reg_h2d *cmdfis;
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int i;
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int slot = prepare_cmd_h2d_slot(drv, buf, count << ata->sector_size_shift, 0);
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if (slot < 0)
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return -1;
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cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port;
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cmd += slot;
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@ -727,6 +730,8 @@ static int ata_drive_write_sector(int drv, uint64_t start, uint32_t count,
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uint8_t *buf_ptr;
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int i;
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int slot = prepare_cmd_h2d_slot(drv, buf, count << ata->sector_size_shift, 1);
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if (slot < 0)
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return -1;
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cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port;
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cmd += slot;
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tbl = (struct hba_cmd_table *)(uintptr_t)cmd->ctba;
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@ -848,6 +853,9 @@ int ata_drive_write(int drv, uint64_t start, uint32_t size,
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sect_start = start >> ata->sector_size_shift;
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sect_off = start - (sect_start << ata->sector_size_shift);
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if (size == 0)
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return 0;
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if (sect_off > 0) {
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uint32_t len = MAX_SECTOR_SIZE - sect_off;
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if (len > size)
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@ -861,6 +869,7 @@ int ata_drive_write(int drv, uint64_t start, uint32_t size,
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buffer_off += len;
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sect_start++;
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}
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count = 0;
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if (size > 0)
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count = size >> ata->sector_size_shift;
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if (count > 0) {
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@ -76,7 +76,7 @@ static struct idt_descriptor idt_descriptor;
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"call common_exception_handler\r\n" \
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"iretq\r\n" \
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: \
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: ""(X)); \
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: "Z"(X)); \
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}
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__attribute__((used)) static void common_exception_handler(uint64_t vector_number)
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@ -144,7 +144,7 @@ static void __attribute__((__naked__)) timer_handler() {
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"sti\r\n"
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"mov %0, %%eax\r\n"
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"movl $0, (%%eax)\r\n"
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"iretq\r\n"::""(LAPIC_EOI));
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"iretq\r\n"::"i"((uint32_t)LAPIC_EOI));
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}
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static void setup_apic_timer()
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@ -234,11 +234,13 @@ int disk_open(int drv)
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uint64_t address = ptable.start_array * SECTOR_SIZE +
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i * ptable.array_sz;
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r = ata_drive_read(drv, address, ptable.array_sz, (void *)&pa);
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if (r < 0)
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return -1;
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if (pa.type[0] != 0 || pa.type[1] != 0) {
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uint64_t size;
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uint32_t part_count;
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if (pa.first > pa.last) {
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wolfBoot_printf("Bad geometry for partition %d\r\n", part_count);
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wolfBoot_printf("Bad geometry for partition %d\r\n", i);
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break;
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}
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size = (1 + pa.last - pa.first) * SECTOR_SIZE;
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@ -990,7 +990,8 @@ static int tgl_setup_lpc_decode(uint32_t address, uint32_t length,
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reg = PCI_ESPI_LGIR1 + range * 4;
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/* setup up decoding in eSPI - generic I/O range 0*/
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pci_config_write32(PCI_ESPI_BUS, PCI_ESPI_DEV, PCI_ESPI_FUN, PCI_ESPI_LGIR1, val);
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pci_config_write32(PCI_ESPI_BUS, PCI_ESPI_DEV, PCI_ESPI_FUN,
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reg, val);
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return 0;
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}
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@ -1523,7 +1524,6 @@ static void setup_ece1200()
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io_write8(ECE1200_INDEX, 0x55); /* conf mode */
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io_write8(ECE1200_INDEX, 0x36);
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reg = io_read8(ECE1200_DATA);
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io_write8(ECE1200_INDEX, 0x07);
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io_write8(ECE1200_DATA, 0x01);
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