8 Commits (self-update-from-spi)

Author	SHA1	Message	Date
Daniele Lacamera	486e633069	Example workspace/project to build under IAR	2020-03-27 14:34:20 +01:00
Chris Conlon	1f57ad9f39	update copyright to 2020	2020-01-03 15:36:00 -08:00
David Garske	0f00f8e700	SiFive HiFive (FE310) RISC-V support ... * HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write. * HiFive1 update demo application for accepting firmware updates over UART. * Added test-update-server application for pushing firmware image over UART. * Fixes for building with `make SIGN=ECC256`. * Improvements to wolfCrypt `user_settings.h`. * General library cleanup (license headers and formatting) * Updated the wolfSSL submodule to latest. * Documentation updates including new `Targets.md` section for hardare instructions.	2019-06-07 13:08:15 -07:00
Daniele Lacamera	937e9d46fb	Introducing RAMCODE tag to transfer functions to RAM ... - Moved functions in the flash write path to RAM, so their execution does not depend on flash access - RAMCODE can be enabled via "make RAM_CODE=1"	2019-04-29 20:32:04 +02:00
Daniele Lacamera	fcf1985978	STM32F4 Hal: support internal flash up to 1MB	2019-03-18 12:10:03 +01:00
Daniele Lacamera	630a10eafa	Automated tests for EXT_FLASH/SPI_FLASH	2019-03-15 11:16:34 +01:00
Daniele Lacamera	503b008cf5	New feature: allow swapping from external memory (e.g. SPI flash)	2019-02-15 13:41:06 +01:00
Daniele Lacamera	ec66c47375	First version of the bootloader	2018-10-11 12:23:58 +02:00