Commit Graph

734 Commits (24841a0eb86cf3754cc206fdf1a573aeaa0edeea)

Author SHA1 Message Date
Brett Nicholas 24841a0eb8 support AURIX hw accel 2026-05-05 16:37:54 +02:00
Brett Nicholas 8ac4838b92 tc3: disable/capture bus errors for lifetime of bootloader 2026-05-05 16:37:54 +02:00
Brett Nicholas f5a8efeb25 tc3: fix for latest wolfHSM, remove devId from cryptoCtx as it no longer exists 2026-05-05 16:37:54 +02:00
Brett Nicholas e43e012e98 review feedback 2026-05-05 16:37:54 +02:00
Brett Nicholas a2e9267529 Adds generic cryptocb support for PK, hash, and symmetric crypto 2026-05-05 16:37:54 +02:00
David Garske 85fb32b1dd Fixes from peer review. Thank you Alex 2026-05-05 10:16:16 +02:00
David Garske c643215c5e fit: gzip-compressed kernel + ramdisk (initramfs) support
Wires the new wolfBoot_gunzip inflater into the FIT image-loading path
and adds initramfs (ramdisk) extraction with DTB /chosen fixup so a
single signed FIT can carry kernel, DTB, and rootfs.

GZIP path
---------
* fit_load_image_ex(out_max) added; fit_load_image kept as a wrapper.
* When a subimage carries compression="gzip", inflate straight to the
  FIT-declared load address, then verify the FIT hash-1 subnode
  (sha256 / sha384 if available) for defense in depth on top of the
  outer wolfBoot signature. The compression property is now read
  unconditionally so a build without WOLFBOOT_GZIP can warn and fail
  closed instead of silently memcpy-ing compressed bytes as if they
  were raw.
* fit_verify_hash propagates wc_InitSha256 / wc_Sha256Update /
  wc_Sha256Final return codes (and the SHA-384 equivalents) - any
  non-zero return is treated as a verification failure so a misbehaving
  backend cannot silently degrade to a no-op.
* GZIP=1 is the new default in the FIT-using example configs (zynqmp,
  zynqmp_sdcard, polarfire_mpfs250, polarfire_mpfs250_qspi,
  versal_vmk180, versal_vmk180_sdcard); set GZIP=0 to opt out.

Ramdisk path
------------
* fit_find_images() gains a ramdisk out-arg and fdt_fixup_initrd()
  writes /chosen/linux,initrd-{start,end} as 64-bit big-endian cells.
* update_disk.c and update_ram.c load the FIT ramdisk node (under
  WOLFBOOT_FIT_RAMDISK) and patch the loaded DTB. Compressed (gzip)
  ramdisks reuse the same fit_load_image_ex() decompress path.
* RAMDISK=1 build switch defines WOLFBOOT_FIT_RAMDISK;
  WOLFBOOT_LOAD_RAMDISK_ADDRESS is plumbed through tools/config.mk ->
  Makefile sed -> include/target.h.in. Defaults to 0; when 0 the
  ramdisk stays at whatever fit_load_image returned.
* hal/zynq.c and hal/versal.c bump fdt_totalsize headroom from 512 to
  768 bytes to fit the new linux,initrd-{start,end} entries.
* config/examples/zynqmp_sdcard.config gains a commented-out opt-in
  block (RAMDISK=1, WOLFBOOT_LOAD_RAMDISK_ADDRESS=0x40000000, alt
  LINUX_BOOTARGS) so a single config file covers both rootfs-on-disk
  and FIT-bundled-initramfs flows.

Builds against the existing master configs are byte-identical when
GZIP=0 and RAMDISK is unset.
2026-05-05 10:16:16 +02:00
David Garske 8c7b8640dd
Merge pull request #762 from danielinux/fenrir-fixes-2026-04-29
Fenrir fixes
2026-04-29 11:24:44 -07:00
Daniele Lacamera b0f1bf9bd1 Handle library image malloc failure
F/3038
2026-04-29 11:24:44 +02:00
Daniele Lacamera c0f6b12721 Addressed copilot's comments 2026-04-28 15:22:41 +02:00
Daniele Lacamera 42455508c0 Fix NRF52 UART DMA and Renode test infrastructure
hal/nrf52.c:
- Use static volatile buffer for UARTE DMA source instead of stack
  variable address. GCC 15.2 with -Os optimized away the store to the
  stack slot, causing the DMA to read zeros.
- Set UART0_ENABLE to 4 (UARTE mode) per NRF52840 datasheet.

tools/test-expect-version/test-expect-version.c:
- Replace deprecated termio.h and linux/serial.h with sys/ioctl.h
  for compatibility with newer glibc.

tools/renode/docker-test.sh:
- Remove unused RENODE_CHECKOUT env var.

tools/scripts/renode-test-update.sh:
- Add robust UART wait functions with timeouts and liveness checks.
- Log Renode output to /tmp/renode.log for diagnostics on failure.
- Use run_expect_version helper with configurable timeout.
2026-04-28 15:04:35 +02:00
David Garske 0baae6b318 Added boot benchmark support to update_flash.c. 2026-04-28 14:58:42 +02:00
David Garske 08232a61a1 ZynqMP: revert WOLFBOOT_ORIGIN to 0x8000000
The previous commit moved WOLFBOOT_ORIGIN from 0x8000000 to 0x10000000
to match the linker script, but WOLFBOOT_LOAD_ADDRESS is also 0x10000000.
This causes wolfBoot to overwrite itself when loading the firmware image
(32MB FIT written to 0x10000000 overwrites wolfBoot's .text at the same
address mid-read, hanging the boot).

Revert to 0x8000000 (128MB, same as U-Boot) and update linker script to
match. WOLFBOOT_LOAD_ADDRESS at 0x10000000 is safely above wolfBoot's
2MB footprint at 0x8000000-0x8200000.
2026-04-28 14:55:06 +02:00
David Garske cbaecdd5d8 Peer review fixes + ZynqMP robustness improvements
hal/zynq.c:
  - Route IOU_TAPDLY_BYPASS writes through pmu_request at EL<=2 in the
    <=40 MHz and <=100 MHz branches (previously only done at <=150 MHz);
    the register is equally unwritable from EL2/EL1 at lower clocks.
  - Add qspi_flash_reset() (RESET_ENABLE 0x66 + RESET_MEMORY 0x99),
    called per chip in qspi_init so the flash starts from a known state
    regardless of what FSBL/BootROM left behind (XIP, 4-byte addr,
    auto-boot).
  - Drop unused 'reg' in csu_aes and 'ms' in csu_init so
    -Werror=unused-variable builds (OPTIMIZATION_LEVEL=0 / DEBUG=1) pass.

hal/zynq.ld:
  - Move wolfBoot ORIGIN from 0x08000000 to 0x10000000. Large FIT images
    (kernel load=0x00200000, payload >~126 MB) would sweep across
    0x08000000 at handoff and overwrite wolfBoot's own code.

tools/scripts/zcu102/zcu102-ca53-qspi.cmm:
  - Rewrite against the Lauterbach TRACE32 ZCU102 QSPI demo: PREPAREONLY
    entry mode, single/dual toggle, READ_ID_TEST, separate flash dialogs
    for BOOT.BIN (offset 0) and test-app/image_v1_signed.bin.
  - Document the ~128 MB TRACE32 temp-memory ceiling on FLASHFILE.Create:
    larger files must be split externally and loaded in chunks.
2026-04-28 14:55:06 +02:00
David Garske 75439c7a87 Removed the redundant "FDT: Setting bootargs" print 2026-04-28 14:55:06 +02:00
David Garske c2f187dadd ZynqMP ZCU102 SD-card Linux boot: EL2 cleanup, DTS bootargs, SDHCI init
Add the pieces needed to boot Linux end-to-end from the ZCU102 SD card
with wolfBoot at EL2:

* src/boot_aarch64_start.S: new el2_flush_and_disable_mmu helper that
  cleans D-cache to PoC, invalidates I-cache to PoU, and clears
  SCTLR_EL2.{M,C,I}, then returns. Satisfies the ARM64 Linux boot
  protocol and is also correct for any other payload that sets up its
  own translation (hypervisor, RTOS, later bootloader stage).
* src/boot_aarch64.c: call el2_flush_and_disable_mmu from do_boot() on
  the EL2 direct-jump path before falling through to the br x4 block.
  Also pull in hal/zynq.h and hal/nxp_ls1028a.h so the EL_HYPERVISOR /
  BOOT_EL1 guards compile for those targets.
* hal/zynq.c: implement hal_dts_fixup() — set /chosen/bootargs from
  LINUX_BOOTARGS (with a LINUX_BOOTARGS_ROOT default of /dev/mmcblk0p4)
  and grow DTB totalsize by 512 bytes to give fdt_setprop() headroom
  (matches hal/versal.c). Add hal_get_timer_us() via CNTPCT_EL0.
* src/sdhci.c: add a 1 ms settling delay after sdhci_platform_init()
  and a CMD0 retry loop (up to 10 x 10 ms) so the ZCU102 Arasan
  controller reliably detects the card after the slot-type change +
  soft reset.
* config/examples/zynqmp_sdcard.config: stay at EL2 by default (comment
  out BOOT_EL1), default rootfs to /dev/mmcblk0p4, turn DEBUG off.
* hal/versal.c: correct the default LINUX_BOOTARGS_ROOT to
  /dev/mmcblk0p4 to match the shipped MBR layout.
* docs/Targets.md: note the unconditional EL2 cleanup in the ZynqMP
  and Versal SD-card sections.

Behavior change: non-Linux AArch64 EL2 payloads now enter with MMU
off and caches clean instead of inheriting wolfBoot's tables. No
in-tree payload relies on the old state leakage.
2026-04-28 14:55:06 +02:00
Thomas Cook d2ef348763 Rework rng a bit 2026-04-27 17:30:42 +02:00
Thomas Cook b545979da0 address several pr issues 2026-04-27 17:30:42 +02:00
Thomas Cook bba88fba92 fix build flags for hw accel 2026-04-27 17:30:42 +02:00
Thomas Cook 8c6d6e2fc6 Better hook rng into wolfCrypt 2026-04-27 17:30:42 +02:00
Thomas Cook f40b01d362 initialize casper for rsa signing 2026-04-27 17:30:42 +02:00
Thomas Cook 1f99a356e9 Add hw support for SHA1 and SHA256 2026-04-27 17:30:42 +02:00
David Garske 284a1d5eb9 Peer review fixes 2026-04-27 17:00:41 +02:00
David Garske 980022de13 Add wolfBoot port for STM32U3 (NUCLEO-U385RG-Q)
New HAL port for the STM32U3 family (Cortex-M33, no TrustZone,
1MB dual-bank flash with 4KB pages, 64-bit double-word writes).

Features:
- hal/stm32u3.c, hal/stm32u3.h, hal/stm32u3.ld: flash driver,
  clock init (96 MHz MSIRC0 via EPOD booster), inline UART, ICACHE
- config/examples/stm32u3.config: ECC384/SHA384, DEBUG_UART=1,
  NVM_FLASH_WRITEONCE=1, RAM_CODE=1, dual-bank layout
- test-app/app_stm32u3.c: LED blink + UART output + version check
- tools/scripts/prepare_update_u3.sh: v2 pBOOT update image builder
- docs/Targets.md: STM32U3 section with build/flash/update instructions
- CI: stm32u3_test job + Clang rebuild coverage

Tested on NUCLEO-U385RG-Q:
- Verified boot with ECC384/SHA384 signature
- 96 MHz clock (MSIRC0 + SMPS + EPOD booster + VOS1)
- UART output on USART1 PA9/PA10 (ST-LINK VCP)
- TEST_FLASH erase/write/readback on both flash banks
- A/B firmware update (v1 -> v2 swap with pBOOT trigger)
2026-04-27 17:00:41 +02:00
David Garske 3c11bf3f55 Peer review fixes 2026-04-22 19:08:00 +02:00
David Garske 5d71feb4ef PolarFire SoC M-Mode: Fix L2 scratchpad init, QSPI programmer, and add WDT support 2026-04-22 19:08:00 +02:00
David Garske bc454d9f4b Peer review fixes 2026-04-22 14:10:55 +02:00
David Garske 00313b3e43 Rename LPC54S018M to LPC54S0XX 2026-04-22 14:10:55 +02:00
David Garske eee953f823 Add tests and improve docs 2026-04-22 14:10:55 +02:00
David Garske 46deb232ff Fixes for clocks and testing updates. 2026-04-22 14:10:55 +02:00
Aidan Garske 9673509c04 Clean up NXP LPC54S018M port and align with LPC55S69 patterns
- HAL: Remove debug spifi_test_mode_switch(), use wolfBoot_printf
    instead of raw uart_write, add printf.h include
  - Test app: Use check_parts() (was defined but unused), replace
    custom print_str/print_hex32 with wolfBoot_printf, fix LED logic
    to show LED1 for v1 and LED2 for v2+ (was always LED1)
  - Docs: Remove incorrect MCUXpresso SDK section (port is bare-metal),
    fix typo, add swap timing note, add flash script references
  - Build: Add --no-warn-rwx-segments to arch.mk, improve Makefile
    comments
  - Add tools/scripts/nxp-lpc54s018m-flash.sh following the
    nxp-s32k142-flash.sh pattern (build, sign, flash via pyocd)

  Tested: full boot + firmware update cycle (v1 -> v2 swap) verified
  on LPC54S018M-EVK hardware.
2026-04-22 14:10:55 +02:00
Aidan Garske 943d4fd866 Fix NXP LPC54S018M SPIFI flash operations and complete boot+update cycle
The LPC54S018M HAL had three critical SPIFI controller issues preventing
   flash write/erase operations from working, which blocked wolfBoot_success(),
   wolfBoot_update_trigger(), and the firmware swap:

   1. Wrong memory-mode read command: Used opcode 0x6B (Quad Output, serial
      address) but the boot ROM configures 0xEB (Quad I/O, quad address) with
      MCMD=0xEB930000. The mismatch caused garbled address bits when re-entering
      XIP after flash operations, crashing on instruction fetch.

   2. SPIFI POLL mode not waiting: The boot ROM leaves CLIMIT[7:0]=0x00 which
      makes the hardware POLL comparison always succeed immediately. Set
      IDATA=0x00 and CLIMIT[7:0]=0x01 to properly wait for flash BUSY to clear.

   3. SPIFI reset clears CTRL/CLIMIT: The reset used to exit memory mode clears
      the boot ROM's timing config (CTRL=0x600F03E8) and cache limit
      (CLIMIT=0x08000000). Save and restore both registers around every reset.

   Additional changes:
   - Add RAMFUNCTION memcpy (src/string.o) to test app for SPIFI XIP safety
   - Add bare-metal UART driver for Flexcomm0 (non-blocking, skips if FC0
     doesn't respond — observed on some LPC54S018M-EVK boards)
   - Add DSB+ISB barriers after entering memory mode for pipeline coherency
   - Enable DEBUG_UART in example config
   - Update test app to follow LPC55S69 port patterns with LED indicators
     for boot version and update status

   Tested: cold boot, ECC256 signature verify, wolfBoot_success(),
   wolfBoot_update_trigger(), and full v1->v2 firmware swap all working.
   Swap takes ~60 seconds for the 960KB partition (240 sector operations).
2026-04-22 14:10:55 +02:00
David Garske 91145d53bb Add wolfBoot support for NXP LPC54S018M-EVK 2026-04-22 14:10:55 +02:00
Daniele Lacamera 776378ca78 Preparing release v2.8.0 + update copyright 2026-04-16 13:11:56 +02:00
Daniele Lacamera e6c1976754 Fixed wolfBoot_panic() visibility in lib + Fenrir comments 2026-04-14 18:54:31 +02:00
Daniele Lacamera 857cd36f67 Addressed another round of reviews (copilot) 2026-04-14 18:19:44 +02:00
Daniele Lacamera a64fa8fbcf Addressed Fenrir's review comments + fixed more regressions 2026-04-14 17:59:30 +02:00
Daniele Lacamera 25668dd39b zeroize OTP UDS in stm32h5 derive path
F/2594
2026-04-14 14:38:51 +02:00
Daniele Lacamera 6c9a0a0cf3 Add final sanity check in library boot path
F/2573
2026-04-14 07:59:19 +02:00
David Garske 58c2e044a6
Merge pull request #730 from danielinux/clang-linker
Fix embedded images built with the clang compiler
2026-04-13 10:55:19 -07:00
Daniele Lacamera fff5222e2d hal: document flash protect API contract 2026-04-09 14:54:14 +02:00
Daniele Lacamera e5a42e369a nrf5340: match hal_flash_protect signature 2026-04-08 22:20:17 +02:00
Daniele Lacamera e60db57bba cmake: link default flash-protect hook
Include hal/hal.c in wolfboothal and mark hal_flash_protect RAMFUNCTION so CMake RAM_CODE targets link and call the default hook correctly.
2026-04-08 21:47:07 +02:00
Daniele Lacamera 44c5b4ab0a Protect bootloader before application boot
F/2255
2026-04-08 19:53:50 +02:00
Mattia Moffa e01c613888 Fix CI tests 2026-04-03 20:29:03 +02:00
Mattia Moffa 8bfdf5b5ad Explicitly place .keystore 2026-04-03 19:19:13 +02:00
Mattia Moffa 8572e207f2 Use LLVM LDD with clang 2026-04-03 18:09:16 +02:00
Daniele Lacamera 6082543e5e Added explicit discard list for clang compiler 2026-04-03 18:09:16 +02:00
Mattia Moffa 084431ba87
Merge pull request #740 from danielinux/fixes-20260330
Fixes 20260330
2026-03-31 14:33:52 +02:00
Daniele Lacamera 909fbeb35e (review comment) remove hal_otp.h 2026-03-31 07:20:45 +02:00