Commit Graph

2 Commits (322d1b3a36e6cc74ea735ea6990e960034c7159c)

Author SHA1 Message Date
David Garske 322d1b3a36 Refactor DDR law setup for use with stage 2 as stack. 2023-10-06 15:28:16 +02:00
David Garske b3e2fb9ddd NXP T1024 wolfBoot support:
* Added DDR4 w/ECC.
* Added L2 and L2 CPC SRAM support
* Added platform SRAM 160KB support
* Added support for core timers (timebase) and platform clock.
* Added IFC driver with erase/write
* Added stage 1 loader to relocate wolfBoot to DDR
* Added CPLD, QUICC, FMAN and MP drivers
* Added eSPI driver for TPM.
* Added hal_early_init instead of calling ddr_init directly.
* Fixes for device tree (DTB) loading with update_ram and PPC boot.
* Fixes for relocating CCSRBAR to upper.
* Fixes for interrupt offsets.
2023-10-06 15:28:16 +02:00