Commit Graph

11 Commits (db8918fdd7ed4f2b994e8634fea0662bfbbdec6d)

Author SHA1 Message Date
Daniele Lacamera 1970fbdd2e Fix for header type on SPI flash 2019-09-19 08:44:55 +02:00
David Garske f2be454e08 Fixes for building STM32G0. 2019-07-16 12:04:34 -07:00
Daniele Lacamera 02e1017fb2 Moved more trailer functions to RAM to reduce long jumps 2019-07-08 18:49:17 +02:00
David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
2019-06-07 13:08:15 -07:00
Daniele Lacamera 937e9d46fb Introducing RAMCODE tag to transfer functions to RAM
- Moved functions in the flash write path to RAM, so their execution
does not depend on flash access

- RAMCODE can be enabled via "make RAM_CODE=1"
2019-04-29 20:32:04 +02:00
Daniele Lacamera 8eb8374795 Added NVM_FLASH_WRITEONCE compile option. Optimized write in kinetis HAL. 2019-03-10 12:40:21 +01:00
Daniele Lacamera 2193dcf5b1 Removed dead code 2019-03-01 19:34:09 +01:00
Daniele Lacamera 503b008cf5 New feature: allow swapping from external memory (e.g. SPI flash) 2019-02-15 13:41:06 +01:00
Daniele Lacamera 1f196bd64c Major bug fixes in new update code 2018-11-27 07:37:40 +01:00
Daniele Lacamera 861181df30 Removed unused variables 2018-11-22 16:25:05 +01:00
Daniele Lacamera 61bbfef35c Separated library functions for in-app use 2018-11-22 16:22:30 +01:00