wolfBoot

Author	SHA1	Message	Date
David Garske	d38de3b432	Update copyright year	2021-07-19 07:50:02 -07:00
Chris Conlon	1f57ad9f39	update copyright to 2020	2020-01-03 15:36:00 -08:00
David Garske	92ed57832f	Fixes for long jump. Targets.md fix for RAM_CODE typo.	2019-06-12 17:25:38 +02:00
David Garske	0f00f8e700	SiFive HiFive (FE310) RISC-V support * HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write. * HiFive1 update demo application for accepting firmware updates over UART. * Added test-update-server application for pushing firmware image over UART. * Fixes for building with `make SIGN=ECC256`. * Improvements to wolfCrypt `user_settings.h`. * General library cleanup (license headers and formatting) * Updated the wolfSSL submodule to latest. * Documentation updates including new `Targets.md` section for hardare instructions.	2019-06-07 13:08:15 -07:00
Daniele Lacamera	fc547e4a25	wolfBoot can update itself when compiled with RAM_CODE=1 - Added wolfBoot version - Added extra 16bit header tag to identify the image type and authentication - Implemented optional in-ram self-update of the bootloader, with version control and authentication mechanism (not fail-safe)	2019-04-29 20:32:04 +02:00
Daniele Lacamera	b5fd49a82a	Initial experimental support for RISC-V - New Makefile to support multiple architectures - Separate architecture-specific start-up files - Stub for a hifive1 HAL port	2019-04-01 14:01:14 +02:00