mirror of https://github.com/wolfSSL/wolfBoot.git
356 lines
11 KiB
Markdown
356 lines
11 KiB
Markdown
# Xilinx SDK wolfBoot Project
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To use this example project:
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1. Copy `.cproject` and `.project` into the wolfBoot root.
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2. From the Xilinx SDK Import wolfBoot using "Import" -> "Existing Projects into Workspace".
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## Xilinx SDK BSP
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This project uses a BSP named `standalone_bsp_0`, which must be configured to use "hypervisor guest" in the BSP configuration settings, which is edited by opening the `platform.spr` file under "standalone on psa_cortexa53_0" -> "Board Support Package" -> "Modify BSP Settings".
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This will enable the EL-1 support required with Bl31 (ARM Trusted Firmware). The BSP generates a `include/bspconfig.h`, which should have these defines set:
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```
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#define EL1_NONSECURE 1
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#define HYP_GUEST 1
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```
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You may need to adjust/add the following project settings under Properties -> C/C++ General:
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1) Platform bspInclude path: "Paths and Symbols" -> "Includes" -> "GNU C" -> "Add" -> Workspace Path for platform (example: `/zcu102/export/zcu102/sw/zcu102/standalone_domain/bspinclude/include`).
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2) Platform BSP Library path: See "Library Paths" -> "Add" (example: `/zcu102/psu_cortexa53_0/standalone_domain/bsp/psu_cortexa53_0/lib`).
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## wolfBoot Configuration
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A build settings template for Zynq UltraScale+ can be found here `./config/examples/zynqmp.config`. This file can be copied to wolfBoot root as `.config` for building from the command line.
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```sh
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$ cp ./config/examples/zynqmp.config .config
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$ make keytools
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```
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These template settings are also in this `.cproject` as preprocessor macros. These settings are loaded into the `target.h.in` template by the wolfBoot `make`. If not using the built-in make then the following defines will need to be manually created in `target.h`:
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```
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#define WOLFBOOT_SECTOR_SIZE 0x20000
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#define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x800000
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#define WOLFBOOT_LOAD_ADDRESS 0x10000000
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#define WOLFBOOT_PARTITION_SIZE 0x2A00000
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#define WOLFBOOT_PARTITION_UPDATE_ADDRESS 0x3A00000
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#define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x63E0000
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#define WOLFBOOT_DTS_BOOT_ADDRESS 0x7E0000
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#define WOLFBOOT_DTS_UPDATE_ADDRESS 0x39E0000
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#define WOLFBOOT_LOAD_DTS_ADDRESS 0x11800000
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```
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The default .cproject build symbols are:
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```
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ARCH_AARCH64
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ARCH_FLASH_OFFSET=0x0
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CORTEX_A53
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DEBUG_ZYNQ=1
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EXT_FLASH=1
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FILL_BYTE=0xFF
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IMAGE_HEADER_SIZE=1024
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MMU
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NO_QNX
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NO_XIP
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PART_BOOT_EXT=1
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PART_SWAP_EXT=1
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PART_UPDATE_EXT=1
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TARGET_zynq
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WC_HASH_DATA_ALIGNMENT=8
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WOLFBOOT_ARCH_AARCH64
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WOLFBOOT_DUALBOOT
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WOLFBOOT_ELF
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WOLFBOOT_HASH_SHA3_384
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WOLFBOOT_ORIGIN=0x0
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WOLFBOOT_SHA_BLOCK_SIZE=4096
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WOLFBOOT_SIGN_RSA4096
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WOLFBOOT_UBOOT_LEGACY
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```
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Note: If not using Position Independent Code (PIC) the linker script `ldscript.ld` must have the start address offset to match the `WOLFBOOT_LOAD_ADDRESS`.
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## Zynq UltraScale+ ARMv8 Crypto Extensions
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To enable ARM assembly speedups for SHA:
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1) Add these build symbols:
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```
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WOLFSSL_ARMASM
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WOLFSSL_ARMASM_INLINE
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```
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2) Add these compiler misc flags: `-mcpu=generic+crypto -mstrict-align -DWOLFSSL_AARCH64_NO_SQRMLSH`
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## Generate signing key
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The keygen tool creates an RSA 4096-bit private key (`wolfboot_signing_private_key.der`) and exports the public key to `src/keystore.c` for wolfBoot to use at compile-time as the default root-of-trust.
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```sh
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$ ./tools/keytools/keygen --rsa4096 -g wolfboot_signing_private_key.der
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Keytype: RSA4096
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Generating key (type: RSA4096)
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RSA public key len: 550 bytes
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Associated key file: wolfboot_signing_private_key.der
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Partition ids mask: ffffffff
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Key type : RSA4096
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Public key slot: 0
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Done.
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```
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## Signing Example
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```sh
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$ ./tools/keytools/sign --rsa4096 --sha3 ../hello_world/Debug/hello_world.elf ./wolfboot_signing_private_key.der 1
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wolfBoot KeyTools (Compiled C version)
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wolfBoot version 2020000
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Update type: Firmware
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Input image: ../hello_world/Debug/hello_world.elf
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Selected cipher: RSA4096
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Selected hash : SHA3
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Public key: ./wolfboot_signing_private_key.der
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Output image: ../hello_world/Debug/hello_world_v1_signed.bin
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Target partition id : 1
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Found RSA512 key
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image header size calculated at runtime (1024 bytes)
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Calculating SHA3 digest...
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Signing the digest...
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Output image(s) successfully created.
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```
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## Bootgen
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Xilinx uses a `bootgen` tool for generating a boot binary image that has Xilinx headers, which the FSBL (First Stage Boot Loader) understands. See the `boot.bif` and `boot_auth.bif` as examples.
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* Use "partition_owner=uboot" to prevent a partition from being loaded into RAM.
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* Use "offset=" option to place the application into a specific location in flash.
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* Use "load=" option to have FSBL load into specific location in RAM.
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Default install locations for bootgen tools:
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* Linux: `/tools/Xilinx/Vitis/2022.1/bin`
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* Windows: `C:\Xilinx\Vitis\2022.1\bin`
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Open the Vitis Shell from the IDE by using file menu "Xilinx" -> "Vitis Shell".
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Generating a boot.bin (from boot.bif).
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Example boot.bif in workspace root:
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```
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// Boot BIF example for wolfBoot with signed Hello World
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// Note: "partition_owner=uboot" prevents partition from being loaded to RAM
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the_ROM_image:
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{
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[bootloader, destination_cpu=a53-0] zcu102\zynqmp_fsbl\fsbl_a53.elf
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[destination_cpu=a53-0, exception_level=el-2] wolfboot\Debug\wolfboot.elf
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[destination_cpu=a53-0, partition_owner=uboot, offset=0x800000] hello_world\Debug\hello_world_v1_signed.bin
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}
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```
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You can also use exception level 3 or 1 depending on your needs.
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From the workspace root:
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```sh
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bootgen -image boot.bif -arch zynqmp -w -o BOOT.bin
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****** Xilinx Bootgen v2022.1
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**** Build date : Apr 18 2022-16:02:32
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** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
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[INFO] : Bootimage generated successfully
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```
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## Running Boot.bin
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* QSPI: Flash using Vitis -> Xilinx (menu) -> Program Flash
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* SD: or copy boot.bin to SDCARD
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| Boot Mode | MODE Pins 3:0 | Mode SW6[4:1] |
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| --------- | ------------- | -------------- |
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| JTAG | 0 0 0 0 | on, on, on, on |
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| QSPI32 | 0 0 1 0 | on, on, off,on |
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| SD | 1 1 1 0 | off,off,off,on |
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## Example boot output
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```
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wolfBoot Secure Boot
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Read FlashID Lower: Ret 0, 20 BB 20
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Read FlashID Upper: Ret 0, 20 BB 20
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Versions: Boot 1, Update 0
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Trying Boot partition at 800000
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Boot partition: 800000 (size 226024, version 0x1)
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info: LMS wolfBoot_verify_signature
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info: using LMS parameters: L2-H5-W8
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info: wc_LmsKey_Verify returned OK
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Successfully selected image in part: 0
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Firmware Valid
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Loading flash image from 8014A8 to RAM at 10000000 (226024 bytes)
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Loading elf at 10000000
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Found valid elf64 (little endian)
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Program Headers 2 (size 56)
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Load 57536 bytes (offset 10000) to 0 (p 0)
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Clear 20600 bytes at 0 (p 0)
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Entry point 0
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DTB boot partition: 7B0000
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Failed parsing DTB to load
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Booting at 0
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Hello World
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Successfully ran Hello World application
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```
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### Adding RSA Authentication
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1. Generate keys:
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* `bootgen.exe -generate_keys auth pem -arch zynqmp -image boot.bif`
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2. Create hash for primary key:
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* `bootgen.exe -image boot.bif -arch zynqmp -w -o i BOOT.BIN -efuseppkbits ppkf_hash.txt`
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3. Import example project for programming eFuses:
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* New BSP project (program efuses , ZCU102_hw_platform, standalone, CPU: PSU_cortexa53_0)
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* Goto Xilinx Board Support Packet Settings.
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* Scroll down to Supported Libraries and Check the xiskey library
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* In the system.mss pane, scroll down to Libraries and click Import Examples.
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* Check the xilskey_esfuseps_zynqmp_example
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4. Edit `xilskey_efuseps_zynqmp_input.h`
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* 433 `#define XSK_EFUSEPS_WRITE_PPK0_HASH TRUE`
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* 453 `#define XSK_EFUSEPS_PPK0_IS_SHA3 TRUE`
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* 454 `#define XSK_EFUSEPS_PPK0_HASH "0000000000000000000000000000000000000000000000000000000000000000" /* from ppkf_hash.txt */``
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5. Update boot.bif (see boot_auth.bif)
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```
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[auth_params] ppk_select=0; spk_id=0x00000000
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[pskfile] pskf.pem
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[sskfile] sskf.pem
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authentication=rsa
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```
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6. Build “boot.bin” image:
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* `bootgen -image boot.bif -arch zynqmp -o i BOOT.BIN -w`
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Note: To generate a report of a boot.bin use the `bootgen_utility` or after 2022.1 use `bootgen -read`:
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`bootgen -arch zynqmp -read BOOT.BIN`
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## Post Quantum
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### PQ XMSS
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1) Add these build symbols to the Xilinx project:
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Note: Make sure and remove the existing `WOLFBOOT_SIGN_*`, `WOLFBOOT_HASH_*` and `IMAGE_HEADER_SIZE`
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```
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WOLFBOOT_SIGN_XMSS
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WOLFBOOT_HASH_SHA256
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WOLFSSL_HAVE_XMSS
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WOLFSSL_WC_XMSS
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WOLFSSL_WC_XMSS_SMALL
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WOLFBOOT_XMSS_PARAMS='\"XMSS-SHA2_10_256\"'
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WOLFSSL_XMSS_VERIFY_ONLY
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WOLFSSL_XMSS_MAX_HEIGHT=32
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WOLFBOOT_SHA_BLOCK_SIZE=4096
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IMAGE_SIGNATURE_SIZE=2500
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XMSS_IMAGE_SIGNATURE_SIZE=2500
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IMAGE_HEADER_SIZE=5000
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```
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2) Create and sign image:
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```sh
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$ ./tools/keytools/keygen --xmss -g wolfboot_signing_private_key.der
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Keytype: XMSS
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Generating key (type: XMSS)
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info: using XMSS parameters: XMSS-SHA2_10_256
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Associated key file: wolfboot_signing_private_key.der
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Partition ids mask: ffffffff
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Key type : XMSS
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Public key slot: 0
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Done.
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$ ./tools/keytools/sign --xmss ../hello_world/Debug/hello_world.elf wolfboot_signing_private_key.der 1
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wolfBoot KeyTools (Compiled C version)
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wolfBoot version 2020000
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Update type: Firmware
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Input image: ../hello_world/Debug/hello_world.elf
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Selected cipher: XMSS
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Selected hash : SHA256
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Public key: wolfboot_signing_private_key.der
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Output image: ../hello_world/Debug/hello_world_v1_signed.bin
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Target partition id : 1
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info: using XMSS parameters: XMSS-SHA2_10_256
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info: XMSS signature size: 2500
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info: xmss sk len: 1343
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info: xmss pk len: 68
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Found XMSS key
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image header size calculated at runtime (5000 bytes)
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Calculating SHA256 digest...
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Signing the digest...
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Output image(s) successfully created.
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```
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### PQ LMS
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1) Add these build symbols to the Xilinx project:
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Note: Make sure and remove the existing `WOLFBOOT_SIGN_*`, `WOLFBOOT_HASH_*` and `IMAGE_HEADER_SIZE`
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```
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WOLFBOOT_SIGN_LMS
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WOLFBOOT_HASH_SHA256
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WOLFSSL_HAVE_LMS
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WOLFSSL_WC_LMS
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WOLFSSL_WC_LMS_SMALL
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WOLFSSL_LMS_VERIFY_ONLY
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WOLFSSL_LMS_MAX_LEVELS=2
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WOLFSSL_LMS_MAX_HEIGHT=5
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LMS_LEVELS=2
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LMS_HEIGHT=5
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LMS_WINTERNITZ=8
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IMAGE_SIGNATURE_SIZE=2644
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IMAGE_HEADER_SIZE=5288
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```
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2) Create and sign image:
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```sh
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$ ./tools/keytools/keygen --lms -g wolfboot_signing_private_key.der
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Keytype: LMS
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Generating key (type: LMS)
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info: using LMS parameters: L2-H5-W8
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Associated key file: wolfboot_signing_private_key.der
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Partition ids mask: ffffffff
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Key type : LMS
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Public key slot: 0
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Done.
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$ ./tools/keytools/sign --lms ../hello_world/Debug/hello_world.elf wolfboot_signing_private_key.der 1
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wolfBoot KeyTools (Compiled C version)
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wolfBoot version 2020000
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Update type: Firmware
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Input image: ../hello_world/Debug/hello_world.elf
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Selected cipher: LMS
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Selected hash : SHA256
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Public key: wolfboot_signing_private_key.der
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Output image: ../hello_world/Debug/hello_world_v1_signed.bin
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Target partition id : 1
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info: using LMS parameters: L2-H5-W8
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info: LMS signature size: 2644
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Found LMS key
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image header size calculated at runtime (5288 bytes)
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Calculating SHA256 digest...
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Signing the digest...
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Output image(s) successfully created.
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```
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### References:
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* [ZAPP1319](https://www.xilinx.com/support/documentation/application_notes/xapp1319-zynq-usp-prog-nvm.pdf): Programming BBRAM and eFUSEs
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* [UG1283](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug1283-bootgen-user-guide.pdf): Bootgen User Guide
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* [Using Cryptography in Zynq UltraScale MPSoC](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842541/Using+Cryptography+in+Zynq+UltraScale+MPSoC)
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