2020-05-15 09:00:36 -05:00
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/* spi_drv_nrf52.c
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*
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* Driver for the SPI back-end of the SPI_FLASH module.
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*
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* Example implementation for nrf52F4.
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*
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* Pinout: see spi_drv_nrf52.h
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*
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2021-07-19 09:49:44 -05:00
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* Copyright (C) 2021 wolfSSL Inc.
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2020-05-15 09:00:36 -05:00
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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2024-04-16 09:46:15 -05:00
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* the Free Software Foundation; either version 3 of the License, or
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2020-05-15 09:00:36 -05:00
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <stdint.h>
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#include "spi_drv.h"
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#include "spi_drv_nrf52.h"
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2023-05-04 15:47:37 -05:00
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#if defined(SPI_FLASH) || defined(WOLFBOOT_TPM)
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2020-05-15 09:00:36 -05:00
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#define SPI0 (0x40003000)
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#define SPI1 (0x40004000)
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#define SPI2 (0x40023000)
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#define SPI SPI0
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#define SPI_TASKS_START *((volatile uint32_t *)(SPI + 0x10))
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#define SPI_TASKS_STOP *((volatile uint32_t *)(SPI + 0x14))
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#define SPI_EVENTS_ENDRX *((volatile uint32_t *)(SPI + 0x110))
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#define SPI_EVENTS_END *((volatile uint32_t *)(SPI + 0x118))
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#define SPI_EVENTS_ENDTX *((volatile uint32_t *)(SPI + 0x120))
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#define SPI_EV_RDY *((volatile uint32_t *)(SPI + 0x108))
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#define SPI_INTENSET *((volatile uint32_t *)(SPI + 0x304))
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#define SPI_INTENCLR *((volatile uint32_t *)(SPI + 0x308))
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#define SPI_ENABLE *((volatile uint32_t *)(SPI + 0x500))
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#define SPI_PSEL_SCK *((volatile uint32_t *)(SPI + 0x508))
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#define SPI_PSEL_MOSI *((volatile uint32_t *)(SPI + 0x50C))
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#define SPI_PSEL_MISO *((volatile uint32_t *)(SPI + 0x510))
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#define SPI_RXDATA *((volatile uint32_t *)(SPI + 0x518))
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#define SPI_TXDATA *((volatile uint32_t *)(SPI + 0x51C))
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#define SPI_FREQUENCY *((volatile uint32_t *)(SPI + 0x524))
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#define SPI_CONFIG *((volatile uint32_t *)(SPI + 0x554))
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2022-11-30 17:15:22 -06:00
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#define K125 0x02000000
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#define K250 0x04000000
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#define K500 0x08000000
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#define M1 0x10000000
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#define M2 0x20000000
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#define M4 0x40000000
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#define M8 0x80000000
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2020-05-15 09:00:36 -05:00
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2022-11-30 17:15:22 -06:00
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void RAMFUNCTION spi_cs_off(uint32_t base, int pin)
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2020-05-15 09:00:36 -05:00
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{
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GPIO_OUTSET = (1 << pin);
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while ((GPIO_OUT & (1 << pin)) == 0)
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;
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(void)base;
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2020-05-15 09:00:36 -05:00
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}
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2022-11-30 17:15:22 -06:00
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void RAMFUNCTION spi_cs_on(uint32_t base, int pin)
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2020-05-15 09:00:36 -05:00
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{
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GPIO_OUTCLR = (1 << pin);
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while ((GPIO_OUT & (1 << pin)) != 0)
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;
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(void)base;
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2020-05-15 09:00:36 -05:00
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}
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2020-07-06 03:13:52 -05:00
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uint8_t RAMFUNCTION spi_read(void)
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2020-05-15 09:00:36 -05:00
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{
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volatile uint32_t reg = SPI_EV_RDY;
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while (!reg)
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reg = SPI_EV_RDY;
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reg = SPI_RXDATA;
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SPI_EV_RDY = 0;
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return reg;
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}
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2020-07-06 03:13:52 -05:00
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void RAMFUNCTION spi_write(const char byte)
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2020-05-15 09:00:36 -05:00
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{
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uint32_t reg;
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SPI_EV_RDY = 0;
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SPI_TXDATA = (uint32_t)byte;
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2020-05-19 02:13:58 -05:00
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reg = SPI_EV_RDY;
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2020-05-15 09:00:36 -05:00
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while (!reg)
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reg = SPI_EV_RDY;
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}
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void spi_init(int polarity, int phase)
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{
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static int initialized = 0;
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if (!initialized) {
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initialized++;
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GPIO_PIN_CNF[SPI_CS_PIN] = GPIO_CNF_OUT;
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GPIO_PIN_CNF[SPI_SCLK_PIN] = GPIO_CNF_OUT;
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GPIO_PIN_CNF[SPI_MOSI_PIN] = GPIO_CNF_OUT;
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GPIO_PIN_CNF[SPI_MISO_PIN] = GPIO_CNF_IN;
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//GPIO_DIRSET = ((1 << SPI_CS_PIN) | (1 << SPI_SCLK_PIN) | (1 << SPI_MOSI_PIN));
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GPIO_OUTSET = (1 << SPI_CS_PIN);
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GPIO_OUTCLR = (1 << SPI_MOSI_PIN) | (1 << SPI_SCLK_PIN);
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SPI_PSEL_MISO = SPI_MISO_PIN;
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SPI_PSEL_MOSI = SPI_MOSI_PIN;
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SPI_PSEL_SCK = SPI_SCLK_PIN;
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SPI_FREQUENCY = M1;
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SPI_CONFIG = 0; /* mode 0,0 default */
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SPI_ENABLE = 1;
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}
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}
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void spi_release(void)
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{
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}
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2023-05-04 15:47:37 -05:00
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#ifdef WOLFBOOT_TPM
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2023-08-03 11:35:21 -05:00
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int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int flags)
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{
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uint32_t i;
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spi_cs_on(SPI_CS_TPM_PIO_BASE, cs);
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for (i = 0; i < sz; i++) {
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spi_write((const char)tx[i]);
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rx[i] = spi_read();
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}
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2023-08-03 11:35:21 -05:00
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if (!(flags & SPI_XFER_FLAG_CONTINUE)) {
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2023-05-10 17:11:56 -05:00
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spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
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}
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2023-05-04 15:47:37 -05:00
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return 0;
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}
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#endif /* WOLFBOOT_TPM */
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#endif /* SPI_FLASH || WOLFBOOT_TPM */
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