Commit Graph

21 Commits (2d6cf95c20d19a09d87881345f4149d10f5af340)

Author SHA1 Message Date
David Garske 322aa325b6 Consolidate duplicate TEST_FLASH code. 2024-10-11 10:29:59 +02:00
David Garske f0b340068a Documentation for T1024 DDR4 registers. 2024-05-20 18:51:21 +02:00
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
David Garske c2388cd142 Fix for NXP T1024 PHY address mapping. Add ability to override macros. 2024-02-27 13:21:55 +01:00
David Garske 9e2aaebed3 Fix for NXP T1024 to get MAC address from Integrity OS ethernet configuration area in flash. 2024-02-13 08:55:11 +01:00
David Garske 85b59634a1 Peer review feedback. 2024-02-12 19:54:12 +01:00
David Garske 87d60ddbe5 Added NXP T1024 mEMAC, MDIO and PHY setup. Setting PHY fixes Integrity OS Ethernet issues and task crash.
Example Output:
```
PHY 2: SGMII, Mac DC:A7:D9:0:6:F6
PHY 2: TI DP83867 (OUI 80028, Mdl 23, Rev 1)
PHY 1: SGMII, Mac DC:A7:D9:0:6:F5
PHY 1: TI DP83867 (OUI 80028, Mdl 23, Rev 1)
PHY 3: RGMII, Mac DC:A7:D9:0:6:F7
PHY 3: TI DP83867 (OUI 80028, Mdl 23, Rev 1)
PHY 4: RGMII, Mac DC:A7:D9:0:6:F8
PHY 4: TI DP83867 (OUI 80028, Mdl 23, Rev 1)
```
2024-02-12 19:54:12 +01:00
David Garske 2a93b0936c Fix for eSDHC to update FDT with status and clock. Fix eSPI base address. 2024-02-12 19:54:12 +01:00
David Garske 5808b4c59e Fix for T1024 CPU core clock calculation. 2024-02-12 19:54:12 +01:00
David Garske 349231b982 Cleanups. 2024-02-12 19:54:12 +01:00
David Garske 275222f0cb CPLD Fixes. Add MRAM support. 2024-02-12 19:54:12 +01:00
David Garske 7b1d180951 Improvements for CPLD. Patch for PCIe from TigerLake. 2024-02-12 19:54:12 +01:00
David Garske ffa31caa56 Fix for T1024 CPLD.
Reads:
```
CPLD BOARD_ID: 0x41503031
CPLD PLD_VER: 0x42
```
2024-02-12 19:54:12 +01:00
David Garske fea3b9ed1d Improve PCIe code. 2024-02-12 19:54:12 +01:00
David Garske 0b206d6758 Fixes for NXP T1024 with Integrity OS. Adds additional FDT fixups for FMAN, Ethernet, PCI. Add PCI init and enumeration. 2024-02-12 19:54:12 +01:00
David Garske 83283c6cf7 Fixes for NXP T1024 and booting Integrity OS:
* Fixed PPC spin table based on ePAPR 1.1.
* Added flattened device tree (FDT) support. Setting required FDT fields per ePAPR 1.1.
* Added Frame Manager microcode upload.
* Fixed CPLD and setting QE clock.
* Added support for setting logical device numbers and updated device tree.
* Fixed QUICC Engine base address (was incorrect, should be 0x140000).
* Fixed "cpu-release-addr" to use 64-bit value.
* Added secondary cached boot page.
* Added L2 cache support to multi-core.
* Added flattened device tree parser tool for testing (`make fdt-parser` and `tools/fdt-parser/fdt-parser`).
* Added checks for FDT header.
* Added automated test case for NXP T1024 FDT.
2024-01-17 14:16:15 +01:00
Daniele Lacamera c3c6d21675 Added cppcheck --enable-portability, fixed UBs
Fixed reported UBs involving (void *) ptr arithmetic
2023-10-13 16:14:07 +02:00
David Garske 389e12faf1 Fixes to get TPM working with T1024 and MMU enabled. 2023-10-06 15:28:16 +02:00
David Garske 3e8d6fb061 Added NXP IFC NOR Flash erase/write. 2023-10-06 15:28:16 +02:00
David Garske 322d1b3a36 Refactor DDR law setup for use with stage 2 as stack. 2023-10-06 15:28:16 +02:00
David Garske b3e2fb9ddd NXP T1024 wolfBoot support:
* Added DDR4 w/ECC.
* Added L2 and L2 CPC SRAM support
* Added platform SRAM 160KB support
* Added support for core timers (timebase) and platform clock.
* Added IFC driver with erase/write
* Added stage 1 loader to relocate wolfBoot to DDR
* Added CPLD, QUICC, FMAN and MP drivers
* Added eSPI driver for TPM.
* Added hal_early_init instead of calling ddr_init directly.
* Fixes for device tree (DTB) loading with update_ram and PPC boot.
* Fixes for relocating CCSRBAR to upper.
* Fixes for interrupt offsets.
2023-10-06 15:28:16 +02:00