Mattia Moffa
e07df6d4bd
Merge pull request #584 from danielinux/release-2.6.0
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wolfBoot 2.6.0: Updated Changelog, version
2025-08-01 13:31:52 +02:00
Daniele Lacamera
68e688eeb6
Updated Changelog, version
2025-08-01 13:21:47 +02:00
Mattia Moffa
6ccdd685ed
Merge pull request #583 from danielinux/ramcode-bugfixes
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Fixed missing long_call attribute, hal erase/write
2025-08-01 11:15:31 +02:00
Daniele Lacamera
a8012e8096
Avoid including target's CFLAGS in tools
2025-07-31 15:49:20 +02:00
Daniele Lacamera
4dd87d766c
Fixed missing long_call attribute, hal erase/write
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Fix definition of secure/non-secure flash areas
+ other minor fixes
2025-07-31 15:49:20 +02:00
David Garske
b5a7e770ce
Merge pull request #582 from danielinux/update-submodules-2.6.0
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Updated submodules
2025-07-31 06:47:52 -07:00
Daniele Lacamera
3d32c381b9
Rp2350: use absolute paths for linker scripts
2025-07-31 13:19:52 +02:00
Daniele Lacamera
4c94a52668
Added submodule initialization for pico-sdk
2025-07-31 11:27:21 +02:00
Daniele Lacamera
05642fd9d0
Change toolchain for zynqmp build
2025-07-31 11:10:08 +02:00
Daniele Lacamera
9b121f27ae
Updated wolfHSM to latest main
2025-07-30 17:53:51 +02:00
Daniele Lacamera
ae97fca60d
Updated wolfPKCS11 submodule
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+ Fix visibility of clock_gettime for benchmark in test applications
2025-07-30 11:02:24 +02:00
Daniele Lacamera
fbc5286951
Updated footprint sizes
2025-07-29 17:29:09 +02:00
Daniele Lacamera
a54f46415e
Added HAVE_UNISTD_H to TPM build in sim
2025-07-29 15:44:24 +02:00
Daniele Lacamera
90d8535189
Update wolfssl to master
2025-07-24 22:06:10 +02:00
Daniele Lacamera
01014386c7
Updated submodules
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wolfSSL: 5.8.2
wolfTPM: latest
wolfHSM: latest
wolfPKCS11: latest
2025-07-24 14:38:45 +02:00
Mattia Moffa
b897746d30
Add note about image header size in signing tool
2025-07-09 17:09:14 +02:00
Mattia Moffa
6fc2ad5803
Document IMAGE_HEADER_SIZE changes
2025-07-09 17:09:14 +02:00
Mattia Moffa
13d697fa5a
Increase IMAGE_HEADER_SIZE on stm32h5
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This is needed to accommodate for the ARM Cortex-M33 interrupt vector
alignment requirements. The number of interrupts on the STM32H5 is 149;
the next power of 2 is 256; in bytes, that is 1024.
2025-07-09 17:09:14 +02:00
Mattia Moffa
6151834479
Use correct VTOR_NS location
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Fixes regression introduced in 6681e54
2025-07-09 17:09:14 +02:00
David Garske
0bfb8a0958
Merge pull request #581 from danielinux/cortex_a_no_unaligned_access
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Fixed unaligned access report by user (Cortex-A5)
2025-07-08 10:20:41 -07:00
Daniele Lacamera
c6295f043a
Fixed unaligned access report by user (Cortex-A5)
2025-07-08 13:51:21 +02:00
David Garske
80f9e991cc
Merge pull request #573 from danielinux/update-trigger-doublewrite-fix
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wolfBoot_update_trigger: Fix double-write-after-erase in NVM...WRITEONCE
2025-06-30 07:55:55 -07:00
Daniele Lacamera
9e8ed9029e
Update unit tests: inverted selection
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after correcting update_trigger double write
2025-06-30 13:33:36 +02:00
Daniele Lacamera
d14045aee6
Account for flags offset when FLAGS_HOME is defined
2025-06-30 13:16:53 +02:00
Daniele Lacamera
81a63eebcd
Attempt to fix double write in update_trigger
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(when NVM_FLASH_WRITEONCE workaround is active)
2025-06-30 12:58:57 +02:00
David Garske
4b93736525
Fix for documented option bytes on STM32H5 with TrustZone enabled. Flash bank 2 watermark (SECWM2_STRT=0x0 and SECWM2_END=0x1F). ZD 20037
2025-06-26 17:20:15 +02:00
Brett Nicholas
1febfd906e
unify global HAL names between server/client, update docs
2025-06-25 12:17:39 +02:00
Brett Nicholas
c106d92a48
wolfHSM server support with X509 auth
2025-06-25 12:17:39 +02:00
David Garske
499c0812ee
Add logic to detect ELF loader collision and skip.
2025-06-24 19:02:49 +02:00
David Garske
754d313f3f
Fixes for wolfssl submodule update. Also requires https://github.com/wolfSSL/wolfssl/pull/8913
2025-06-24 19:02:49 +02:00
David Garske
ac71a77523
Update wolfssl submodule to resolve issue with TPM builds (no malloc, cert gen, crypto callback missing max digest size).
2025-06-24 19:02:49 +02:00
David Garske
0b10eb0765
Fix issue with wolfssl submodule update and random.c change keytool failure because of NO_FILESYTEM.
2025-06-24 19:02:49 +02:00
David Garske
1712edc136
Add support for PowerPC 32-bit SHA256 assembly speedups. Minor fix for ELF loading to set entry point before copying sections (resolves issue with loading on top of current location). Rename elf_load_image_mmu argument `entry` to `pentry` to avoid confusion with GET_H64 macro's use of header member "entry".
2025-06-24 19:02:49 +02:00
David Garske
865c681254
Merge pull request #572 from AlexLanzano/stm32f411-support
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Implement clock and uart configuration macros for the stm32f4
2025-06-23 14:06:30 -07:00
Alex Lanzano
1b37378a80
Fix shift overflow issue in stm32 uart driver
2025-06-21 15:02:24 -04:00
Alex Lanzano
5b36a6dddd
Fix build and test issues with stm32f4 targets
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- Add the new CLOCK_SPEED and STM32_PLLx variables to the CMakeLists
file
- Rename references of 'stm32f4.config' to 'stm32f407-discovery.config'
documentation and github workflow files.
2025-06-21 15:02:11 -04:00
Alex Lanzano
248fd985b3
Update stm32f4 test-app to use config options to setup clock and uart
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Allows the pll clock to be configured using the config macros instead of
being hard coded.
2025-06-21 14:54:04 -04:00
Alex Lanzano
72baf96440
Rename CPU_FREQ macro to CLOCK_SPEED. Remove CPU_FREQ from system.h
2025-06-21 14:54:04 -04:00
Alex Lanzano
af09857f70
Replace example stm32f4 config
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This replaces the base stm32f4 config with more board specific examples
for the stm32f407 discovery kit and stm32f411 blackpill board.
2025-06-21 14:54:04 -04:00
Alex Lanzano
10faed06a4
Update stm32f4 hal to use config options to setup clock and uart
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Modifies the stm32f4 hal to use the new config options to configure the
PLL clock. This also modifies the stm32f4 uart driver to allow the user
to specify which uart they want to use via the config option.
2025-06-21 14:54:04 -04:00
Alex Lanzano
f9fd9fec2e
Add config options for stm32f4 boards
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This introduces the following configuration options to allow for easier
support for boards using the stm32f4 MCU
CLOCK_SPEED: This defines the clock speed in Hz
STM32_PLLM: This defines the PLLM parameter in the pll clock setup
STM32_PLLN: This defines the PLLN parameter in the pll clock setup
STM32_PLLP: This defines the PLLP parameter in the pll clock setup
STM32_PLLQ: This defines the PLLQ parameter in the pll clock setup
2025-06-21 14:54:00 -04:00
David Garske
374d6058f6
Merge pull request #575 from rizlik/pic32_fixes
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Pic32c: fix unaligned read, always check flash done after flash operations
2025-06-19 08:53:07 -07:00
Marco Oliverio
1151f5ffda
pic32c: flash: check done flag after operations
2025-06-19 17:03:06 +02:00
Marco Oliverio
3a5bffaaf1
pic32c: fix buffer alignment issues in flash driver
2025-06-19 17:03:06 +02:00
David Garske
dea8b4e347
Don't use XALIGNED_STACK on static.
2025-06-16 19:05:49 +02:00
David Garske
dd03cf19c4
Disabled `wolfBoot_swap_and_final_erase` with `CUSTOM_PARTITION_TRAILER` (not compatible). Added a few more `uint8_t` alignments.
2025-06-16 19:05:49 +02:00
David Garske
79cef5f605
Peer review fixes (thank you Copilot).
2025-06-16 19:05:49 +02:00
David Garske
b79be86a56
Fix for `NO_SWAP_EXT=1` with encryption enabled. Peer review fixes.
2025-06-16 19:05:49 +02:00
David Garske
bd179ed339
Added TSIP support to the set_key, get_key and erase_key API's. Finished full encrypted update testing on Renesas RX with TSIP. Fixed issue with `No rule to make target `NONE’` using encrypted AES.
2025-06-16 19:05:49 +02:00
David Garske
566f3b99cb
Cleanup duplicate code in `aes_init`.
2025-06-16 19:05:49 +02:00