Daniele Lacamera
fce6149cf8
Update license GPL2 -> GPL3
2024-04-16 16:46:15 +02:00
Daniele Lacamera
b5c8bc8024
Fix cppcheck warnings
2023-10-13 15:49:12 +02:00
David Garske
d38de3b432
Update copyright year
2021-07-19 07:50:02 -07:00
Chris Conlon
1f57ad9f39
update copyright to 2020
2020-01-03 15:36:00 -08:00
Daniele Lacamera
88d0e4dcfb
HiFive1 eSPI driver: Fixed return-to-hwmode, refactoring hal_flash_write
...
for short write operations
2019-07-08 19:10:16 +02:00
Daniele Lacamera
93fdc4a848
[hifive1] Flash Frequency set back to 50MHz
2019-06-27 13:11:32 +02:00
Daniele Lacamera
9cc558b7a2
[hifive1] fixed hal_flash_write
2019-06-27 12:40:40 +02:00
Daniele Lacamera
e08d282879
[Hifive1 SPI] Changed order of SPI operations/direction changes
2019-06-26 19:24:39 +02:00
David Garske
68b5f67f23
Fix for `hal_flash_write` to use incremented data pointer for page.
2019-06-24 11:11:07 -07:00
David Garske
0a0e8f6a22
Fix for compile warning with operators and parens.
2019-06-24 10:54:47 -07:00
Daniele Lacamera
5c8bad047c
Moved hifive1_write_page to separate module
2019-06-20 15:46:47 +02:00
Daniele Lacamera
637ffa9801
hifive hal: switch back to "hw mode" after erase/write operations
2019-06-19 15:56:39 +02:00
David Garske
92ed57832f
Fixes for long jump. Targets.md fix for RAM_CODE typo.
2019-06-12 17:25:38 +02:00
David Garske
0f00f8e700
SiFive HiFive (FE310) RISC-V support
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* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
2019-06-07 13:08:15 -07:00
Daniele Lacamera
937e9d46fb
Introducing RAMCODE tag to transfer functions to RAM
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- Moved functions in the flash write path to RAM, so their execution
does not depend on flash access
- RAMCODE can be enabled via "make RAM_CODE=1"
2019-04-29 20:32:04 +02:00
Daniele Lacamera
b5fd49a82a
Initial experimental support for RISC-V
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- New Makefile to support multiple architectures
- Separate architecture-specific start-up files
- Stub for a hifive1 HAL port
2019-04-01 14:01:14 +02:00