WolfSSL
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wolfBoot
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31 Commits (fce6149cf8df011484da689d064ef1909e18cddc)

Author SHA1 Message Date
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
David Garske 1766864a6b Fixes for STM32 QSPI and cleanups. Added build-option for QSPI clock (`QSPI_CLOCK_MHZ`). 2022-12-20 13:31:28 +01:00
Daniele Lacamera 5a15fe1138 Added armored panic() function form arm cortex-m 2022-03-14 13:06:13 +01:00
David Garske 5463105eab Adds STM32U5 support. Thank you ST. 2022-01-24 00:07:03 -08:00
Elms 78ace2ee17 Fixes for Cortex R5 self-update 
- load `f021_lookup_bank()` into RAM
 - `arch_reboot()` for TMS570
 2021-12-20 10:08:07 -08:00
David Garske 905730d927 Fixes for secure user memory feature. 2021-11-29 23:17:43 -08:00
Elms d302c633c2 TMS570LC43xx: flash updates and init stack pointer 
- cleanup warnings and rework exceptions to be more robust
 - CORTEX R5: Initialization of stack pointer
 - updates to F021 flash from testing
 - sync options for command line build with IDE
 2021-10-07 01:45:18 -07:00
Elms 4b1aa608dd Fix error in arm refactor that impacts self-update 2021-06-29 14:04:10 -07:00
Elms 529b138b7c TMS570LC43xx: cleanup ISR and add build release project 2021-06-23 09:12:17 +02:00
Elms 8c1b3713d0 TMS570LC43xx: update `do_boot` and exception handling 2021-06-23 09:12:17 +02:00
Elms b15a9a5b14 TMS570LC43xx: Add code to jump to app and links for ECC and RSA to IDE 2021-06-23 09:12:17 +02:00
Elms ee0f93fee0 TMS570LC43xx: Add flash from RAM and test-app and cleanup 
* add flash demo from RAM
 * clean up linker script and flags
 * Add hercules test-app: link script and minimal c file

`make CCS_ROOT=/c/ti/ccs1031/ccs/tools/compiler/ti-cgt-arm_20.2.4.LTS F021_DIR=/c/ti/Hercules/F021\ Flash\ API/02.01.01`
 2021-06-23 09:12:17 +02:00
David Garske a7b61db9e1 Cleanup ARM boot code. TI R5 support. 2021-06-23 09:12:17 +02:00
Daniele Lacamera 5614c75f1e Fixed address alignment, TZEN=0 mode not yet working 2020-09-09 14:26:30 -07:00
Daniele Lacamera 28b275d3f5 Fixed partition size in stm32l5 config 2020-09-09 14:26:30 -07:00
Daniele Lacamera 81acc3fc6d Moved target-specific initialization to hal/ 2020-09-09 14:26:30 -07:00
Daniele Lacamera 313ed1f9d7 Cortex-M33: simplified boot code, unused isr in vector 2020-09-09 14:26:30 -07:00
David Garske 43c2e3dd79 Experimental support for STM32L5 2020-09-09 14:26:30 -07:00
Daniele Lacamera ded67d494e MPU: fix RO flag in flash preventing the update 2020-05-26 16:18:06 +02:00
Daniele Lacamera dd17aa74f4 Fixed indentation 2020-05-26 15:35:41 +02:00
Daniele Lacamera 7ade0ee2c0 Added support for memory protection on ARM using MPU 2020-05-25 15:14:41 +02:00
Daniele Lacamera 5d932fe857 Removed custom assembly code for psoc6: using boot_arm startup (in C) 2020-05-20 06:53:00 -07:00
Daniele Lacamera 6dcbc3572d Psoc6: fixes for correct device bring-up 2020-05-20 06:53:00 -07:00
Daniele Lacamera 3db37a6b5c Updated NVM_CACHE_SIZE to match different configurations. 
Progress on psoc6 HAL, fixed memory mapping and test app
 2020-05-20 06:53:00 -07:00
Daniele Lacamera 10186cac09 Added support for LPC (tested on LPC54606) 2020-03-04 08:53:13 +01:00
Daniele Lacamera c32c5da6a1 Renamed KINETIS to MCUXPRESSO, added initial support for LPC family 2020-03-04 08:01:05 +01:00
Chris Conlon 1f57ad9f39 update copyright to 2020 2020-01-03 15:36:00 -08:00
Daniele Lacamera 34def41dd1 Added support for STM32F7 + DUALBANK_SWAP hw-assisted support 2019-07-17 11:37:43 -07:00
David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support 
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
 2019-06-07 13:08:15 -07:00
Daniele Lacamera fc547e4a25 wolfBoot can update itself when compiled with RAM_CODE=1 
- Added wolfBoot version
- Added extra 16bit header tag to identify the image type and authentication
- Implemented optional in-ram self-update of the bootloader, with version control
and authentication mechanism (not fail-safe)
 2019-04-29 20:32:04 +02:00
Daniele Lacamera b5fd49a82a Initial experimental support for RISC-V 
- New Makefile to support multiple architectures
- Separate architecture-specific start-up files
- Stub for a hifive1 HAL port
 2019-04-01 14:01:14 +02:00