WolfSSL
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wolfBoot
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606 Commits (master)

Author SHA1 Message Date
David Garske 4bfe5e7035
Merge pull request #972 from danielinux/fix-makefile-assignments 
make: let user-provided options win over target defaults
 2026-11-05 10:53:38 -08:00
Thomas Cook 6f57d57f3a update docs 2026-11-04 20:24:54 +01:00
Thomas Cook e7eb152a83 Address copilot and fenrir issues 2026-11-04 20:24:54 +01:00
Thomas Cook 13d11a85bc Misc cleanup 2026-11-04 20:24:54 +01:00
Daniele Lacamera 6925d20c55 make: let user-provided options win over target defaults 
Target-specific assignments in arch.mk/options.mk/board.mk used hard
'=', silently clobbering values the user set via command line,
environment, or a sourced .config (e.g. LSCRIPT_IN from PR #958 was
defeated on every target with a dedicated script).

Convert the target-default assignments to '?=' (first-set wins) and,
for LSCRIPT_IN, capture the user value before the target files are
parsed so the last-resort default (hal/$(TARGET).ld) and the ARMClang
.sct default only apply when the user provided nothing.

CMake: WOLFBOOT_LSCRIPT_TEMPLATE had the same flaw (plain set() over a
user -D value); guard it with NOT DEFINED and let test-app use an
absolute user template as-is.

Document LSCRIPT_IN as a user option in docs/compile.md.

The x86 FSP TGL boards (kontron_vx3060_s2, nai_68int6) share
hal/x86_fsp_tgl_stage1.ld; arch.mk selects it via 'LSCRIPT_IN ?=', but
the hard default here ran first, so the stage1 build of those boards
looked for a non-existent hal/kontron_vx3060_s2_stage1.ld (CI:
'kontron_vx3060_s2 build test', red on master).
 2026-11-04 18:16:06 +01:00
David Garske 767ef3de3c Add compressed firmware updates installed into an execute-in-place slot 2026-11-04 14:35:53 +01:00
David Garske 80a186f5c5
Merge pull request #953 from bigbrett/tc3-port-tweaks 
Monolithic self-update version check + TC3xx/wolfHSM changes
 2026-10-30 10:47:03 -07:00
Mattia Moffa 6d79499e45
Merge pull request #962 from dgarske/mpfs250_emmc_qspi 
Add PolarFire SoC support for M-Mode (HSS replacement) booting from eMMC and QSPI into DDR
 2026-10-29 19:04:07 +01:00
Yosuke Shimizu 49975c9751 Add RX71M CC-RX e2 studio projects 
- hal/renesas-rx.c builds the RX71M flash driver with CC-RX: the
  driver runs from RAM through #pragma section FRAM and copyfuncs(),
  and FPCKAR follows the BSP clock settings.
- IDE/Renesas/e2studio/RX71M holds the wolfBoot and app_RenesasRX01
  CC-RX projects, their headers, make_images.sh and a Readme.
- docs/Renesas.md and docs/Targets.md point to the new projects, and
  .gitignore lists their build and generated folders.
 2026-10-29 07:01:54 +01:00
Yosuke Shimizu bd7dee208a Add RX71M CI jobs and documentation 
- test-configs.yml: RX71M build jobs, little endian and
  BIG_ENDIAN=1 with WOLFBOOT_RENESAS_OSM.
- test-build-renesas-rx.yml: check that ROMCODE in wolfboot.bin is
  0xFFFFFFFF for rx71m.
- Targets.md: Renesas RX71M section; Renesas.md and the CI image
  README list RX71M.
 2026-10-29 07:01:54 +01:00
David Garske 29b5476ead PolarFire SoC: boot the HSS replacement from eMMC and QSPI into DDR 2026-10-28 21:06:08 -07:00
Mattia Moffa 24776f3b7a
Merge pull request #949 from dgarske/psoc_e8 
Add wolfBoot target for Infineon PSOC Edge E8
 2026-10-28 23:02:17 +01:00
Brett Nicholas 3c56b4bac0 Make wolfHSM cert chain name constraints optional, updates to support new wolfHSM keygen macro protection, further reducing codesize 2026-10-28 14:25:29 -07:00
David Garske 3681ea8996 Add wolfBoot target for Infineon PSOC Edge E8 2026-10-28 14:24:42 -07:00
twcook86 aa9685b03a
Merge pull request #950 from aidangarske/lpc55s69-port-update 
Harden LPC55S69 TrustZone isolation and add tests, CI and docs
 2026-10-28 15:12:27 -04:00
Daniele Lacamera 76a8b2b3ea Refuse partitions too small for the trailer, add STM32F4 custom trailer (#937) 2026-10-28 14:35:31 +01:00
David Garske 5d02ce6811 lpc55s69: repair ECC-corrupt pages at boot, lock bus masters non-secure under TZ, set MSPLIM 2026-10-27 17:17:02 -07:00
Aidan Garske 3345f87fba Harden LPC55S69 TrustZone isolation and add tests, CI and docs 2026-10-27 16:15:37 -07:00
David Garske 3b5bc1f064 PolarFire SoC: skip a watchdog refresh inside the forbidden window 2026-10-27 16:06:05 -07:00
David Garske 682d0b982b PolarFire SoC: make the Athena hash offload selectable with MPFS_ATHENA_SHA 2026-10-27 16:06:05 -07:00
David Garske 58ba1038ec PolarFire SoC: correct the MSS watchdog and reset-cause register semantics 2026-10-27 16:06:05 -07:00
David Garske da26b3fa5a PolarFire SoC: read-only sNVM page survey behind MPFS_SNVM_DUMP 2026-10-27 16:06:05 -07:00
David Garske 84e4e16328 PolarFire SoC: consolidate the documentation into docs/PolarFire.md with a quick start 2026-10-27 16:06:05 -07:00
David Garske e5badf5ae5 PolarFire SoC: QSPI clock divider knob and word-mode FIFO reads 2026-10-27 16:06:05 -07:00
David Garske 14a9081f3c PolarFire SoC: watchdog hand-off to the OS 2026-10-27 16:06:05 -07:00
David Garske b4e2436040 PolarFire SoC: boot mode 2 User Boot Loader stub verifying the eNVM wolfBoot 2026-10-27 16:06:05 -07:00
David Garske e10b343500 PolarFire SoC: SBI vendor extension for the OS: PUF keys, System Controller services and flash access 2026-10-27 16:06:05 -07:00
David Garske 4f0948e11d PolarFire SoC: a FIT ramdisk that must load, and failover actions before the golden boot 2026-10-27 16:06:05 -07:00
David Garske 6778bf3bb2 PolarFire SoC: read DDR once after init so CPU writes land, drop the workarounds 2026-10-27 16:06:05 -07:00
David Garske a91c824e45 PolarFire SoC: sNVM/PUF key storage and disk image encryption 2026-10-27 16:06:04 -07:00
David Garske 0e2e7e7e31 PolarFire SoC: M-mode scratchpad, DDR training, SBI and CI fixes 2026-10-27 16:06:04 -07:00
Brett Nicholas 49313ec8da self-update: check self-header version in monolithic mode 2026-10-27 09:09:21 -07:00
Brett Nicholas 213d7d75ce bounds-check journal sector flags, test ECC self-update, fix doc typos 2026-10-27 16:46:40 +01:00
Brett Nicholas 258c640459 Add journal marker sector to better detect cut erase 2026-10-27 16:46:40 +01:00
Brett Nicholas 8b9fd4ca59 Update docs and comment cleanup 2026-10-27 16:46:40 +01:00
Brett Nicholas 1f6d07227d add ELF_FLASH_SCATTER_PRESERVE_SECTORS and associated tests 2026-10-27 16:46:40 +01:00
Brett Nicholas 41fbe4b326 Improve support for ECC flash parts: 
- Add NVM ECC mode, which introduces a new erase check HAL API to use
   flash controller HW to blank check sectors instead of reading them
   and comparing to an erased byte (which typically triggers an ECC
   fault)
 - Add NVM Journal mode as an alternative to NVM_FLASH_WRITE_ONCE that
   does not require a sector-size RAM buffer and dramatically reduces
   the number of erases and programs required to set individual flags,
   while also being much more robust to power-cuts.
 2026-10-27 16:46:40 +01:00
David Garske b555895193
Merge pull request #948 from aidangarske/mcxn-secure-app 
Add an MCXN947 secure application handoff config
 2026-10-26 16:07:49 -07:00
David Garske 2ab656528a zynqmp: report the PUF control fuses and correct the regeneration API 2026-10-26 19:59:53 +01:00
Aidan Garske 051a2a47ac
Merge pull request #787 from twcook86/lpc55s69_hwpuf 
Support for PUF in LPC55S69
 2026-10-26 08:28:51 -07:00
Marco Oliverio b240ee7aaa
Merge pull request #933 from dgarske/nai_68int6 
Add wolfBoot target for the NAI 68INT6 (Intel Tiger Lake UP3) OpenVPX SBC
 2026-10-26 10:04:12 +01:00
Zackery 8685a5a28c
Merge pull request #946 from dgarske/pl011_uart_rx 
Add a non-blocking uart_rx() to the PL011 consoles
 2026-10-23 15:55:28 -06:00
David Garske d490e36d2e fdt: boot a FIT with no kernel load/entry and no device tree 2026-10-23 11:49:49 -07:00
David Garske 8d34051e6e uart: add a non-blocking uart_rx() to the PL011 consoles 2026-10-23 11:48:36 -07:00
Thomas Cook 28d717103a address pr comments 2026-10-23 13:53:08 -04:00
Aidan Garske 1d47fa7b62 Add an MCXN947 secure application handoff config with m33mu tests 2026-10-23 18:27:33 +01:00
Thomas Cook 38d7655080 address pr comments 2026-10-22 17:36:22 -04:00
David Garske aef57a113d versal: support the system watchdog timer (WWDT) 2026-10-22 18:11:12 +02:00
David Garske 43655708c3 zynqmp: add the eFuse programming gate and a report-only write transport 2026-10-22 18:05:42 +02:00
David Garske 942f3b938c zynqmp: add BBRAM AES key programming and an eFuse security state accessor 2026-10-22 18:05:42 +02:00