WolfSSL
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wolfBoot
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605 Commits (6dfe2671f5666fe6fa3bcc25d8520de6e1fb582c)

Author SHA1 Message Date
David Garske 4bbe28920c Fixes to wolfBoot self-update (memcmp was used which is not a RAMFUNCTION). 2026-01-19 19:13:01 +01:00
David Garske b92e2ca0cd Added `WOLFBOOT_REPRODUCIBLE_BUILD`. 2026-01-19 19:13:01 +01:00
David Garske 4e3e55d53a Add NXP S32K1xx support with full update functionality 
- HAL: Flash (FTFC), UART (LPUART1), Clock (FIRC 48MHz), Watchdog
- Requires NVM_FLASH_WRITEONCE=1 and RAM_CODE=1 for proper operation
- Test app with interactive console: status, trigger, success, reboot
- LED indicators: Green (v1), Blue (v2+)
- Flash automation script: tools/scripts/nxp-s32k142-flash.sh
- Tested on S32K142EVB with sector swap update

Supported variants: S32K142 (256KB), S32K144 (512KB), S32K146 (1MB), S32K148 (2MB)
 2026-01-19 19:13:01 +01:00
Daniele Lacamera 9e7f6c24ec Fixes after reviewer's comment 
- Fix misnamed STM32U585 register
- Remove emu-test-apps linker scripts as they are autogenerated
 2026-01-19 12:37:37 +01:00
Daniele Lacamera fca80c9fd4 stm32l5 hal: removed debug printf 2026-01-15 13:54:10 +01:00
Daniele Lacamera 97b6f3b63b Fixes for stm32u5, added workflow test 2026-01-15 13:54:10 +01:00
David Garske 16887c6e3d
Merge pull request #665 from danielinux/armored-tz-fixes 
Improve ARMORED code + minor fixes
 2026-01-14 12:52:04 -08:00
Daniele Lacamera 847f1f15c4 Fix incorrectly mapped SAU for NS-RAM 2026-01-14 20:54:29 +01:00
Daniele Lacamera 224d0ea2a1 Removed leftover debug traces for rng testing 2026-01-14 10:26:57 +01:00
Daniele Lacamera 22fbc78508 Simplified/fixed SAU setup 2026-01-13 13:57:34 +01:00
Daniele Lacamera 5ac5191553 Uniform STM32L5 flash write hal 
- update partition is now secure, only accessible via NSC
- removed legacy security settings in hal_flash_write/erase when running
  in secure mode
- Added explicit IMAGE_HEADER_SIZE to default config
 2026-01-13 13:46:58 +01:00
David Garske e3803652ba
Merge pull request #658 from bigbrett/imxrt-serial-clk-fix 
i.mx RT serial clk fix
 2026-01-12 09:08:28 -08:00
Daniele Lacamera 08692b1d8e Fix handling rollback when ARMORED=1 and FLASH_TOP 2026-01-12 09:44:44 +01:00
David Garske 8577188eaa
Merge pull request #663 from bigbrett/sim-self-update 
basic simulator self-update test
 2026-01-09 10:10:03 -08:00
Brett Nicholas d661c2afb3 Add support for simulator self-update test 2026-01-08 09:40:44 -08:00
David Garske 4673c8272d Add support for fixing up the Ethernet MAC using device serial number (matches U-Boot behavior). 2026-01-01 12:52:09 +01:00
David Garske 46677d76e7 Refactor eMMC/SD code to reduce duplicate code. Moved SDHCI driver into generic module that can be used by other platforms. 2026-01-01 12:52:09 +01:00
David Garske 247a9eb20e Add support for eMMC (tested) 2026-01-01 12:52:09 +01:00
David Garske 42dcebb6c4 Add eMMC support. 2026-01-01 12:52:09 +01:00
David Garske cf08819d8e Support for CUSTOM_ENCRYPT_KEY that allows customer to supply their own implementation 2026-01-01 12:52:09 +01:00
David Garske 5a4862525d Fixes for mmc_write. 2026-01-01 12:52:09 +01:00
Brett Nicholas 24d8599e05 imxrt: modify hal_init to no longer override clk frequency and respect CONFIG_SERIAL_CLK_FREQ 2025-12-30 10:50:09 -08:00
David Garske d38551a143 Add update_disk encryption support. 2025-12-30 11:10:21 +01:00
David Garske 249c8282f5 Add kernel boot args (for rootfs). Added optional SD tuning support. Yocto Linux is fully working now! 2025-12-30 11:10:21 +01:00
David Garske 609fd81890 Fixes for PolarFire SoC eMMC/SD to stabilize and add read DMA support. Refactor the RISC-V boot/vector code for use on both 32-bit and 64-bit architectures. 2025-12-30 11:10:21 +01:00
Mattia Moffa b8f70ad57d Various small fixes for nrf5340 TrustZone PKCS11 2025-12-24 18:58:33 +01:00
David Garske 2fc6fe8335 Peer review fixes 2025-12-24 18:31:55 +01:00
David Garske d3ff5783b3 Add support for multi-block reads (performance improvements) 2025-12-24 18:31:55 +01:00
David Garske 963cdadeaf Peer review fixes 2025-12-24 18:31:55 +01:00
David Garske 6547a74fcf Documentation cleanups 2025-12-24 18:31:55 +01:00
David Garske 5f51e0febc Working Secure boot of PolarFire SoC 2025-12-24 18:31:55 +01:00
David Garske afb9c84cdf Fix for uSD read to handle start that is not block aligned 2025-12-24 18:31:55 +01:00
David Garske 3317fba381 Cleanups and improvements 2025-12-24 18:31:55 +01:00
David Garske 0292da582b Refactor disk.c for generic use. Wired up uSD read for MBR/GPT 2025-12-24 18:31:55 +01:00
David Garske 66fac44062 Fixes to get uSD driver working 2025-12-24 18:31:55 +01:00
David Garske ab614a93c8 Progress with eMMC/SD driver 2025-12-24 18:31:55 +01:00
David Garske f89704d7e1 Progress with eMMC/SD driver. 2025-12-24 18:31:55 +01:00
David Garske e055585942 Support for Microchip PolarFire SoC (MPFS250) 2025-12-24 18:31:55 +01:00
Mattia Moffa e716a18405
Merge pull request #654 from danielinux/stm32h5_fix_gtzc1_base 
STM32H5: Fixed GTZC1 base address
 2025-12-24 15:01:42 +01:00
Daniele Lacamera 660100d072 STM32H5: Fixed GTZC1 base address 
These are used in hal_prepare_boot() for setting peripheral as
non-secure.

The base address for those registers were 0x4000 too high.

Fixed according to RM0841 Chapter 2 Table 5, page 120.
 2025-12-24 10:59:01 +01:00
Mattia Moffa 26171affe0 Preserve CRYPTOCELL_ENABLE; don't hardcode RNG FIFO depth 2025-12-15 17:29:00 +01:00
Mattia Moffa dd226cad0c Minor cleanup 2025-12-15 15:02:17 +01:00
Mattia Moffa 5134eea96a Support WOLFCRYPT_TZ and PKCS11 on nRF5340 2025-12-13 04:05:32 +01:00
Mattia Moffa 2e103d27b2 Fix stm32h5 hal_flash_write alignment issues 2025-12-10 07:41:38 +01:00
Mattia Moffa 23ba33140e MCXW TrustZone support 2025-12-05 01:27:58 +01:00
jackctj117 90a5f29dd3 CI-tests: 
- STM32L4 and STM32WB using CubeMX SDK
- Add test-build-riscv.yml workflow for RISC-V HiFive1 targets
- Enable tests for hifive1, nxp-ls1028a, nxp-ls1028a-tpm,
  imx-rt1060_hab, raspi3-encrypted
 2025-12-03 13:47:02 -07:00
David Garske 84bf772271
Merge pull request #598 from gojimmypi/pr-cmake-improvements 
CMake Improvements
 2025-11-25 10:27:13 -08:00
Mattia Moffa df49fbf7f5 Fix GPIO pin assignment 2025-11-25 05:22:33 +01:00
Mattia Moffa 63aa160c96 Fix comments 2025-11-25 03:03:23 +01:00
Mattia Moffa 5fb5b4b6ea nRF5340 TrustZone port 2025-11-25 03:01:03 +01:00