WolfSSL
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wolfBoot
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28 Commits (master)

Author SHA1 Message Date
David Garske 4fedc93ed8 imx95_m7: fix console/status overlap, cache handoff, timebase and build wiring 2026-08-24 18:46:41 +02:00
David Garske 724ca34677 Add wolfBoot target for NXP i.MX95 Cortex-M7 2026-08-24 18:46:41 +02:00
Marco Oliverio 955b07cc0b mc: pic32cz: better state reset before boot 2026-08-06 15:31:25 +02:00
Mattia Moffa 6b8702dd63 Add uart driver for stm32u5 2026-07-31 16:00:14 +02:00
Marco Oliverio 36b665bfcc pic32cz: add wolfHSM client target 
Run wolfBoot on the PIC32CZ CA9x host core (Cortex-M7) as a wolfHSM client,
offloading the image digest (SHA-256) and the ECDSA P-256 signature check to
the wolfHSM server.
 2026-07-29 18:07:45 +02:00
Daniele Lacamera 776378ca78 Preparing release v2.8.0 + update copyright 2026-04-16 13:11:56 +02:00
Daniele Lacamera a20101d6df Add support for DICE attestation + PSA attestation 2026-02-06 18:36:47 +01:00
David Garske 2546ebcaf9 Fixes for unused variables. Also repaired STM32WB55 build with PKA 2025-11-20 18:26:58 +01:00
David Garske 8cb3d33339 Added STM32H5 SPI Driver and support for TPM 
Cleanup STM32H5 HAL port.
Refactor `__ARM_FEATURE_CMSE` to `TZ_SECURE()`
Refactor attribute cmse_nonsecure_entry to use new macro `CSME_NSE_API`
Added TPM Non Secure Callable API's
Added TPM support to STM32H5 test application
 2025-11-19 16:29:28 +01:00
gojimmypi fbd8dcf8a2
Update Copyright year to 2025 2025-10-15 11:33:53 -07:00
David Garske 7f193af97d Fixes for STM32H5 TrustZone and PKCS11 store 2025-10-10 19:42:20 +02:00
Alex Lanzano 1b37378a80 Fix shift overflow issue in stm32 uart driver 2025-06-21 15:02:24 -04:00
Alex Lanzano 10faed06a4 Update stm32f4 hal to use config options to setup clock and uart 
Modifies the stm32f4 hal to use the new config options to configure the
PLL clock. This also modifies the stm32f4 uart driver to allow the user
to specify which uart they want to use via the config option.
 2025-06-21 14:54:04 -04:00
David Garske 8a7f5e5baa Refactor to eliminate PLATFORM_ -> TARGET_. Fix CI errors. 2024-08-14 18:06:12 +02:00
David Garske 3687851f75 Xilinx zynqmp documentation cleanups. Fixes for building with Eclipse wildcard .c include pains. 2024-08-14 18:06:12 +02:00
Daniele Lacamera 9d563ae60f Added XMODEM update 2024-07-09 10:22:42 -07:00
Daniele Lacamera aff2072694 Demo app: added test, benchmark, other gadgets 2024-07-09 10:22:42 -07:00
Daniele Lacamera 34d5ec15ea Fixed UART devices in NS-mode, fixed H5 clock 2024-07-09 10:22:42 -07:00
Daniele Lacamera 059868ec45 STM32H5 uart support, work in progress 2024-07-09 10:22:42 -07:00
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
Daniele Lacamera b5c8bc8024 Fix cppcheck warnings 2023-10-13 15:49:12 +02:00
Daniele Lacamera c849ddfebb Reverted accidental changes in uart_drv_stm32wb 2023-09-21 07:57:18 +02:00
Daniele Lacamera 41b11ed1dd Added uart support for stm32l5 (LPUART1) 2023-09-21 07:57:18 +02:00
David Garske d38de3b432 Update copyright year 2021-07-19 07:50:02 -07:00
Daniele Lacamera 119954115f Added UART driver for stm32l0 2020-12-08 12:09:54 +01:00
Daniele Lacamera eb2774e78b Updated comment in uart_drv_stm32wb.c 2020-06-16 17:52:50 +02:00
Daniele Lacamera c9f8f6a12e Added uart driver for stm32wb 2020-06-16 17:52:50 +02:00
Daniele Lacamera 7ffcdca098 External, emulated non-volatile memory over UART 2020-04-03 14:27:42 +02:00