- HAL: Remove debug spifi_test_mode_switch(), use wolfBoot_printf
instead of raw uart_write, add printf.h include
- Test app: Use check_parts() (was defined but unused), replace
custom print_str/print_hex32 with wolfBoot_printf, fix LED logic
to show LED1 for v1 and LED2 for v2+ (was always LED1)
- Docs: Remove incorrect MCUXpresso SDK section (port is bare-metal),
fix typo, add swap timing note, add flash script references
- Build: Add --no-warn-rwx-segments to arch.mk, improve Makefile
comments
- Add tools/scripts/nxp-lpc54s018m-flash.sh following the
nxp-s32k142-flash.sh pattern (build, sign, flash via pyocd)
Tested: full boot + firmware update cycle (v1 -> v2 swap) verified
on LPC54S018M-EVK hardware.
Removed NVM_FLASH_WRITEONCE restriction for psoc6.
Update flash hal functions to support read-modify-erase-write way to perform the programming of flash.
Adds support for running wolfBoot in **Machine Mode (M-mode)** on the PolarFire SoC MPFS250T, booting from eNVM and loading a signed application from **SC QSPI flash** into on-chip LIM (Loosely Integrated Memory). No HSS (Hart Software Services) or DDR is required. It also extends the existing PolarFire HAL with multi-hart support, L2 cache configuration, per-hart UART, and refactors shared code (SDHCI, SCB mailbox, linker/test-app) for both S-mode and M-mode builds.
* Initial port refresh for the NXP T2080 target
* IFC Flash driver and multi-core support on T2080
* Working wolfBoot test-app startup on T2080
* Support for NAII and Curtiss-Wright T2080 vendor boards
Before this commit the LUT in the FCB for all i.MX RT targets had a
quad-read (0xEB) command as the read command in the LUT in the FCB.
However, this assumes the flash chip support QSPI, which it may not,
either at all or by default. To support such flash chips this commit
adds the option to use a single-read (0x03) command instead in the LUT.
QSPI can then be enabled later on (by e.g. the BootROM or the
application wolfBoot boots).
The single-read command sequence is taken from the NXP SDK.