Commit Graph

325 Commits (9a4f80054689a315ebd5ea54c0f5bc065cc72516)

Author SHA1 Message Date
David Garske 9a4f800546 cm4: hardware-validate eMMC A/B disk boot and FIPS on CM4 (arm64 header, 0x200000 load, mini-UART console) 2026-08-24 12:47:34 +02:00
David Garske eb7ad83ca0 cm4: add Raspberry Pi Compute Module 4 (BCM2711 Cortex-A72) target with authenticated boot 2026-08-24 12:47:34 +02:00
David Garske 27edd0f5e7 tegra234: bare-metal BL33 target with verified EL2->EL1 + device-tree boot 2026-08-18 11:01:45 +02:00
David Garske 2b3b7034a5 aarch64_efi: address PR818 review (measure cmdline, DTB GUID, size/page/desc fixes) 2026-08-10 21:03:50 +02:00
David Garske 34941079e1 Add aarch64_efi target: wolfBoot as an AArch64 UEFI application 2026-08-10 21:03:50 +02:00
Marco Oliverio c46c3278a4 arch.mk: add default HSM microchip folder (../) 2026-08-06 15:31:25 +02:00
David Garske e718eed709 PolarFire SoC: LPDDR4 DDR init for MPFS250T Video Kit (M-Mode) 2026-08-03 12:27:22 +02:00
Mattia Moffa 6da07ffc3d Add support for ARM Compiler for Embedded on stm32u5 2026-07-31 16:00:14 +02:00
Mattia Moffa 357734d691 Fixes for old Maxim SDK 2026-07-31 14:33:56 +02:00
Mattia Moffa 190de90224 Clean up build flag usage, use trng healthtest in test-app 2026-07-31 14:33:56 +02:00
Mattia Moffa 6862d57dea Support older Maxim SDK ("LPSDK") 2026-07-31 14:33:56 +02:00
Mattia Moffa 60b9e87413 SHA256 acceleration for bootloader 2026-07-31 14:33:56 +02:00
Mattia Moffa f5f54c294e Implementation of test-app crypto test 2026-07-31 14:33:56 +02:00
Mattia Moffa bcda09e4ed Fix UART; support FTHR2 board 2026-07-31 14:33:56 +02:00
David Garske 9d9305eebb Support for MAX32666 2026-07-31 14:33:56 +02:00
David Garske 4e1dd615cd
Merge pull request #837 from bigbrett/tc3-se-mode
TC3: expose DFLASH mode as option
2026-07-30 13:42:12 -07:00
David Garske eaa39be9e4 renesas-rx: fix build for GCC RX 8.3/14.2 2026-07-30 15:32:31 +02:00
David Garske 87c34064d9 Add NXP LS1028A ENETC wolfIP support 2026-07-30 13:29:09 +02:00
David Garske 29c9ea1ce1 test-app: add wolfIP + wolfCrypt test harness and PPC crypto asm 2026-07-30 13:29:09 +02:00
Brett Nicholas c9ddf32678 TC3: expose DFLASH mode as option 2026-07-29 16:20:35 -06:00
Marco Oliverio 36b665bfcc pic32cz: add wolfHSM client target
Run wolfBoot on the PIC32CZ CA9x host core (Cortex-M7) as a wolfHSM client,
offloading the image digest (SHA-256) and the ECDSA P-256 signature check to
the wolfHSM server.
2026-07-29 18:07:45 +02:00
David Garske 1ceaef3eee zynqmp: wolfBoot ZynqMP FSBL with signed FIT Linux boot and EL3 security (eFuse/PUF/AES-CSU) 2026-07-22 11:56:40 +02:00
David Garske a3e2bc89d2 Add wolfBoot HAL port for RealTek RTL8735B (AmebaPro2) 2026-07-16 10:16:25 +02:00
Daniele Lacamera 781a2d620e arm: skip broken newlib stdatomic.h under clang 2026-07-02 22:58:46 +02:00
Alex Lanzano 337dabf2f2 Implement port for STM32WBA. Bump wolfHAL lib to latest 2026-07-02 08:44:45 +02:00
David Garske 7cdfb4266a NXP T2080 / CW VPX3-152: VxWorks 7 64-bit boot support
Add wolfBoot support for booting VxWorks 7 SMP 64-bit (and signed ELF
images) on the NXP T2080 (e6500) / Curtiss-Wright VPX3-152.

Key fix: bring up the e6500 cluster L2 cache in the correct order -- set
L2PE (ECC) in its own polled write BEFORE enabling L2E, with L2FI|L2LFC --
matching CW U-Boot (SDK2.0). The previous bare-L2E init left the L2 ECC
array uninitialized for the kernel's 0x1E0000 set, machine-checking VxWorks
(MCSR[IF], L2ERRDET MBECC).

Also: ePAPR spin-table SMP bring-up of all four cores, ELF in-place loader
staging-overlap fix, DPAA/LIODN + QMan/BMan init, 64-bit OS handoff
(LAW/TLB/IVOR), and NAII 68PPC2 + CW VPX3-152 board configs.
2026-06-15 06:13:28 +02:00
Alex Lanzano 01c52d87e8 remove wolfhal TARGET. Add WOLFHAL option 2026-06-10 17:12:25 +02:00
Alex Lanzano 125872c571 Create STM32WB wolfHAL example. GC sections on all test apps 2026-06-10 17:12:25 +02:00
David Garske 14f6e4a298 Add wolfBoot FIT support for loading bitstream 2026-06-09 15:30:27 +02:00
David Garske c075549ea2 Add wolfBoot support for STM32G4 2026-05-29 13:10:15 +02:00
David Garske 9786f5608b Add wolfBoot port for STM32N6 (NUCLEO-N657X0-Q)
Co-authored-by: Aidan Garske <aidan@wolfssl.com>
2026-05-28 16:49:57 +02:00
Yosuke Shimizu f4d5340641 Add hardware-based DICE on mcxn 2026-05-21 20:49:20 +02:00
David Garske b94954eab4 Add Xilinx Zynq-7000 (ZC702) wolfBoot port 2026-05-12 12:06:05 +02:00
Thomas Cook 6093b68f15 Fix lingering lpc55s69 issues 2026-05-07 17:06:35 -04:00
Mattia Moffa fda8668cc3 Address Copilot comments 2026-05-07 21:39:34 +02:00
Mattia Moffa dc6cfaaf83 Kinetis KL26 port 2026-05-07 21:39:34 +02:00
David Garske af40ae1471 Add STM32C5 target (NUCLEO-C5A3ZG) 2026-05-06 19:02:58 +02:00
Brett Nicholas 9a667f2a75 set TC3 ARCH_FLASH_OFFSET with ?= 2026-05-05 16:37:54 +02:00
Brett Nicholas 24841a0eb8 support AURIX hw accel 2026-05-05 16:37:54 +02:00
Brett Nicholas a2e9267529 Adds generic cryptocb support for PK, hash, and symmetric crypto 2026-05-05 16:37:54 +02:00
Thomas Cook d2ef348763 Rework rng a bit 2026-04-27 17:30:42 +02:00
Thomas Cook b545979da0 address several pr issues 2026-04-27 17:30:42 +02:00
Thomas Cook 8c6d6e2fc6 Better hook rng into wolfCrypt 2026-04-27 17:30:42 +02:00
Thomas Cook 1f99a356e9 Add hw support for SHA1 and SHA256 2026-04-27 17:30:42 +02:00
David Garske 980022de13 Add wolfBoot port for STM32U3 (NUCLEO-U385RG-Q)
New HAL port for the STM32U3 family (Cortex-M33, no TrustZone,
1MB dual-bank flash with 4KB pages, 64-bit double-word writes).

Features:
- hal/stm32u3.c, hal/stm32u3.h, hal/stm32u3.ld: flash driver,
  clock init (96 MHz MSIRC0 via EPOD booster), inline UART, ICACHE
- config/examples/stm32u3.config: ECC384/SHA384, DEBUG_UART=1,
  NVM_FLASH_WRITEONCE=1, RAM_CODE=1, dual-bank layout
- test-app/app_stm32u3.c: LED blink + UART output + version check
- tools/scripts/prepare_update_u3.sh: v2 pBOOT update image builder
- docs/Targets.md: STM32U3 section with build/flash/update instructions
- CI: stm32u3_test job + Clang rebuild coverage

Tested on NUCLEO-U385RG-Q:
- Verified boot with ECC384/SHA384 signature
- 96 MHz clock (MSIRC0 + SMPS + EPOD booster + VOS1)
- UART output on USART1 PA9/PA10 (ST-LINK VCP)
- TEST_FLASH erase/write/readback on both flash banks
- A/B firmware update (v1 -> v2 swap with pBOOT trigger)
2026-04-27 17:00:41 +02:00
David Garske 00313b3e43 Rename LPC54S018M to LPC54S0XX 2026-04-22 14:10:55 +02:00
Aidan Garske 9673509c04 Clean up NXP LPC54S018M port and align with LPC55S69 patterns
- HAL: Remove debug spifi_test_mode_switch(), use wolfBoot_printf
    instead of raw uart_write, add printf.h include
  - Test app: Use check_parts() (was defined but unused), replace
    custom print_str/print_hex32 with wolfBoot_printf, fix LED logic
    to show LED1 for v1 and LED2 for v2+ (was always LED1)
  - Docs: Remove incorrect MCUXpresso SDK section (port is bare-metal),
    fix typo, add swap timing note, add flash script references
  - Build: Add --no-warn-rwx-segments to arch.mk, improve Makefile
    comments
  - Add tools/scripts/nxp-lpc54s018m-flash.sh following the
    nxp-s32k142-flash.sh pattern (build, sign, flash via pyocd)

  Tested: full boot + firmware update cycle (v1 -> v2 swap) verified
  on LPC54S018M-EVK hardware.
2026-04-22 14:10:55 +02:00
David Garske 91145d53bb Add wolfBoot support for NXP LPC54S018M-EVK 2026-04-22 14:10:55 +02:00
Mattia Moffa a0a3daedb3 Use llvm-ar, llvm-objcopy, llvm-size when USE_CLANG=1 2026-04-03 18:09:16 +02:00
Mattia Moffa 8572e207f2 Use LLVM LDD with clang 2026-04-03 18:09:16 +02:00