WolfSSL
/
wolfBoot
mirror of https://github.com/wolfSSL/wolfBoot.git
1
0
Fork 0
Code Issues Releases Wiki Activity
1,518 Commits
29 Branches
28 Tags
20 MiB
Commit Graph

18 Commits (fce6149cf8df011484da689d064ef1909e18cddc)

Author SHA1 Message Date
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
David Garske b3e2fb9ddd NXP T1024 wolfBoot support: 
* Added DDR4 w/ECC.
* Added L2 and L2 CPC SRAM support
* Added platform SRAM 160KB support
* Added support for core timers (timebase) and platform clock.
* Added IFC driver with erase/write
* Added stage 1 loader to relocate wolfBoot to DDR
* Added CPLD, QUICC, FMAN and MP drivers
* Added eSPI driver for TPM.
* Added hal_early_init instead of calling ddr_init directly.
* Fixes for device tree (DTB) loading with update_ram and PPC boot.
* Fixes for relocating CCSRBAR to upper.
* Fixes for interrupt offsets.
 2023-10-06 15:28:16 +02:00
Dimitri Papadopoulos be037ca04d Fix typos found by codespell 2023-07-04 07:43:02 +02:00
David Garske 8dd0ee347f Support for the STM32 OCTOSPI peripheral. 2023-02-02 12:11:23 -08:00
Daniele Lacamera 74a26d20c8 Fixed regressions on TPM SPI communication 
that were introduced in #265
 2022-12-29 16:11:34 +01:00
David Garske a93eacf510 Improve QSPI driver performance. 2022-12-22 15:29:24 -08:00
David Garske c3cf21a81f STM32 QSPI cleanups. 2022-12-21 14:06:31 -08:00
David Garske 26bed3e893 Fixes for QSPI driver (CS is controller by QSPI). Fix little endian byte ordering for UART printf feature. 2022-12-20 15:00:26 -08:00
Daniele Lacamera bf62ebe3fd Fix GPIO mode for SPI CS pins 2022-12-20 13:54:17 +01:00
David Garske 1766864a6b Fixes for STM32 QSPI and cleanups. Added build-option for QSPI clock (`QSPI_CLOCK_MHZ`). 2022-12-20 13:31:28 +01:00
David Garske a9526bab8f STM32 QSPI Flash support. Refactor SPI to allow different GPIO base/AF for each pin. Adds `DEBUG_UART` support for H7. 2022-12-20 13:31:28 +01:00
David Garske c3b5ac156b Experimental STM32U5 external flash support. 2022-11-23 18:13:03 +01:00
Daniele Lacamera a6fdec3901 self-encrypt prototype; tested on stm32l0 2022-09-21 18:49:52 +02:00
Glenn Ergeerts 3682e66818 stm32l0: add support for external SPI flash 2020-11-19 13:30:14 +01:00
David Garske a342b7824f Minor cleanups. 2019-12-20 10:22:13 -08:00
Daniele Lacamera 2f05d44c95 Fixed SPI defines, fix TPM SHA alignment in header 2019-12-20 19:08:31 +01:00
David Garske 5779baa8a9 Various items for STM32WB55 2019-12-20 19:08:31 +01:00
Daniele Lacamera 25455744b6 Make Stm32 SPI driver more generic to reuse on other STM32 platforms 2019-12-20 19:08:31 +01:00